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pinctrl: tegra264: fix DAP2 DIN/DOUT mux functions

PATCH In review Prathamesh Shete 3 participants 3 messages Jul 15 – Jul 16

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GPIO Tegra architecture support Pin control
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Prathamesh Shete

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PATCH 1/1 pinctrl: tegra264: fix DAP2 DIN/DOUT mux functions

The dap2_din_pv7 and dap2_dout_pw0 pin groups were assigned swapped primary mux functions: dap2_din_pv7 (data input) was muxed to I2S2_SDATA_OUT and dap2_dout_pw0 (data output) to I2S2_SDATA_IN. As a result the I2S2 data-in and data-out signals were routed to the wrong pins, breaking DAP2 audio.

Correct the functions so dap2_din_pv7 uses I2S2_SDATA_IN and dap2_dout_pw0 uses I2S2_SDATA_OUT. The register offsets and drive-group macros are already correct and are left unchanged.

Fixes c98506206912 ("pinctrl: tegra: Add Tegra264 pinmux driver")
Signed-off-by Prathamesh Shete <[email protected]>
---
 drivers/pinctrl/tegra/pinctrl-tegra264.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/pinctrl/tegra/pinctrl-tegra264.c +2 -2
index be64fba34dce..3802e480d39e 100644
@@ -2051,8 +2051,8 @@ static const struct tegra_pingroup tegra264_main_groups[] = {
 	PINGROUP(gen1_i2c_sda_pw3, I2C1_DAT, RSVD1, RSVD2, RSVD3, 0x6018, 0, Y, 5, 7, 6, 8, -1, 10, 11),
 	PINGROUP(dap2_fs_pw1, I2S2_LRCK, RSVD1, RSVD2, RSVD3, 0x6040, 0, Y, 5, 7, 6, 8, -1, 10, 11),
 	PINGROUP(dap2_clk_pv6, I2S2_SCLK, RSVD1, RSVD2, RSVD3, 0x6048, 0, Y, 5, 7, 6, 8, -1, 10, 11),
-	PINGROUP(dap2_din_pv7, I2S2_SDATA_OUT, RSVD1, RSVD2, RSVD3, 0x6050, 0, Y, 5, 7, 6, 8, -1, 10, 11),
-	PINGROUP(dap2_dout_pw0, I2S2_SDATA_IN, RSVD1, RSVD2, RSVD3, 0x6058, 0, Y, 5, 7, 6, 8, -1, 10, 11),
+	PINGROUP(dap2_din_pv7, I2S2_SDATA_IN, RSVD1, RSVD2, RSVD3, 0x6050, 0, Y, 5, 7, 6, 8, -1, 10, 11),
+	PINGROUP(dap2_dout_pw0, I2S2_SDATA_OUT, RSVD1, RSVD2, RSVD3, 0x6058, 0, Y, 5, 7, 6, 8, -1, 10, 11),
 	PINGROUP(pwm10_pv1, GP_PWM10, SDMMC1_CD, I2S7_LRCK, RSVD3, 0x6060, 0, Y, 5, 7, 6, 8, -1, 10, 11),
 	PINGROUP(soc_gpio170_pu0, RSVD0, I2S7_SDATA_IN, CCLA_LA_TRIGGER_MUX, RSVD3, 0x6068, 0, Y, 5, 7, 6, 8, -1, 10, 11),
 	PINGROUP(soc_gpio171_pu1, RSVD0, SPI4_SCK, RSVD2, RSVD3, 0x6070, 0, Y, 5, 7, 6, 8, -1, 10, 11),
Signature · 1 line
2.17.1
maintainer Acked-by on v1 1/1
#1 lore raw
Quoted 10 lines · Prathamesh Shete

The dap2_din_pv7 and dap2_dout_pw0 pin groups were assigned swapped primary mux functions: dap2_din_pv7 (data input) was muxed to I2S2_SDATA_OUT and dap2_dout_pw0 (data output) to I2S2_SDATA_IN. As a result the I2S2 data-in and data-out signals were routed to the wrong pins, breaking DAP2 audio.

Correct the functions so dap2_din_pv7 uses I2S2_SDATA_IN and dap2_dout_pw0 uses I2S2_SDATA_OUT. The register offsets and drive-group macros are already correct and are left unchanged.

Quoted 5 lines
Fixes c98506206912 ("pinctrl: tegra: Add Tegra264 pinmux driver")
Signed-off-by Prathamesh Shete <[email protected]>
---
 drivers/pinctrl/tegra/pinctrl-tegra264.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
Acked-by Thierry Reding <[email protected]>
maintainer
#2 lore raw
In reply to Prathamesh Shete
Quoted 21 lines · Prathamesh Shete

The dap2_din_pv7 and dap2_dout_pw0 pin groups were assigned swapped primary mux functions: dap2_din_pv7 (data input) was muxed to I2S2_SDATA_OUT and dap2_dout_pw0 (data output) to I2S2_SDATA_IN. As a result the I2S2 data-in and data-out signals were routed to the wrong pins, breaking DAP2 audio.

Correct the functions so dap2_din_pv7 uses I2S2_SDATA_IN and dap2_dout_pw0 uses I2S2_SDATA_OUT. The register offsets and drive-group macros are already correct and are left unchanged.

Fixes c98506206912 ("pinctrl: tegra: Add Tegra264 pinmux driver")
Signed-off-by Prathamesh Shete <[email protected]>
---
  drivers/pinctrl/tegra/pinctrl-tegra264.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)
drivers/pinctrl/tegra/pinctrl-tegra264.c +0 -0
index be64fba34dce..3802e480d39e 100644

drivers/pinctrl/tegra/pinctrl-tegra264.c static const struct tegra_pingroup tegra264_main_groups[] = { · line 2058

Quoted 10 lines
drivers/pinctrl/tegra/pinctrl-tegra264.c +2 -2
@@ -2051,8 +2051,8 @@ static const struct tegra_pingroup tegra264_main_groups[] = {
  	PINGROUP(gen1_i2c_sda_pw3, I2C1_DAT, RSVD1, RSVD2, RSVD3, 0x6018, 0, Y, 5, 7, 6, 8, -1, 10, 11),
  	PINGROUP(dap2_fs_pw1, I2S2_LRCK, RSVD1, RSVD2, RSVD3, 0x6040, 0, Y, 5, 7, 6, 8, -1, 10, 11),
  	PINGROUP(dap2_clk_pv6, I2S2_SCLK, RSVD1, RSVD2, RSVD3, 0x6048, 0, Y, 5, 7, 6, 8, -1, 10, 11),
-	PINGROUP(dap2_din_pv7, I2S2_SDATA_OUT, RSVD1, RSVD2, RSVD3, 0x6050, 0, Y, 5, 7, 6, 8, -1, 10, 11),
-	PINGROUP(dap2_dout_pw0, I2S2_SDATA_IN, RSVD1, RSVD2, RSVD3, 0x6058, 0, Y, 5, 7, 6, 8, -1, 10, 11),
+	PINGROUP(dap2_din_pv7, I2S2_SDATA_IN, RSVD1, RSVD2, RSVD3, 0x6050, 0, Y, 5, 7, 6, 8, -1, 10, 11),
+	PINGROUP(dap2_dout_pw0, I2S2_SDATA_OUT, RSVD1, RSVD2, RSVD3, 0x6058, 0, Y, 5, 7, 6, 8, -1, 10, 11),
  	PINGROUP(pwm10_pv1, GP_PWM10, SDMMC1_CD, I2S7_LRCK, RSVD3, 0x6060, 0, Y, 5, 7, 6, 8, -1, 10, 11),
  	PINGROUP(soc_gpio170_pu0, RSVD0, I2S7_SDATA_IN, CCLA_LA_TRIGGER_MUX, RSVD3, 0x6068, 0, Y, 5, 7, 6, 8, -1, 10, 11),
  	PINGROUP(soc_gpio171_pu1, RSVD0, SPI4_SCK, RSVD2, RSVD3, 0x6070, 0, Y, 5, 7, 6, 8, -1, 10, 11),

This is still not correct. The ball numbers for these pads are switched. It should be dap2_din_pw0 and dap2_dout_pv7. Please fix.

Thanks!
Jon

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