Skip to contentSkip to conversation

mtd: spinand: fmsh: fix FM25G01B/FM25G02B Quad I/O read dummy cycles

PATCH Superseded Aleksandr Mineev 2 participants 2 messages Jul 15 – Jul 17

Subsystems (2)
Memory technology devices (MTD) NAND flash

v1 of 2 Superseded Latest is v2 →

lore
Share & tools
lore

Aleksandr Mineev

author
#0 lore raw

PATCH 1/1 mtd: spinand: fmsh: fix FM25G01B/FM25G02B Quad I/O read dummy cycles

The FM25G01B/FM25G02B datasheets specify a single dummy byte for the 0xEB Quad I/O read-from-cache operation, but the generic read_cache_variants set uses two dummy bytes for the 1S-4S-4S variant. The extra dummy byte shifts the data phase and returns corrupted data with no ECC error, breaking boot on boards using these chips.

Use a dedicated read-from-cache variant set with ndummy=1 for the 1S-4S-4S (0xEB) operation.

FM25G01B datasheet: https://www.fmsh.com/nvm/FM25G01B_ds_eng.pdf
FM25G02B datasheet: https://www.fmsh.com/nvm/FM25G02B_ds_eng.pdf

Fixes d5a5c9eb2ee9 ("mtd: spinand: fmsh: add support for FM25G{01,02}B")
Signed-off-by Aleksandr Mineev <[email protected]>
---
 drivers/mtd/nand/spi/fmsh.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)
drivers/mtd/nand/spi/fmsh.c +10 -2
index be5db9f9502b..6352e9c9e502 100644
@@ -44,6 +44,14 @@ static SPINAND_OP_VARIANTS(update_cache_variants,
 		SPINAND_PROG_LOAD_1S_1S_4S_OP(false, 0, NULL, 0),
 		SPINAND_PROG_LOAD_1S_1S_1S_OP(false, 0, NULL, 0));
 
+static SPINAND_OP_VARIANTS(fm25g_read_cache_variants,
+		SPINAND_PAGE_READ_FROM_CACHE_1S_4S_4S_OP(0, 1, NULL, 0, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_1S_1S_4S_OP(0, 1, NULL, 0, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_1S_2S_2S_OP(0, 1, NULL, 0, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_1S_1S_2S_OP(0, 1, NULL, 0, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_FAST_1S_1S_1S_OP(0, 1, NULL, 0, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_1S_1S_1S_OP(0, 1, NULL, 0, 0));
+
 static int fm25g01b_ooblayout_ecc(struct mtd_info *mtd, int section,
 				  struct mtd_oob_region *region)
 {

@@ -192,7 +200,7 @@ static const struct spinand_info fmsh_spinand_table[] = {
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xd1),
 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 21, 1, 1, 1),
 		     NAND_ECCREQ(8, 528),
-		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+		     SPINAND_INFO_OP_VARIANTS(&fm25g_read_cache_variants,
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,

@@ -202,7 +210,7 @@ static const struct spinand_info fmsh_spinand_table[] = {
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xd2),
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 41, 1, 1, 1),
 		     NAND_ECCREQ(8, 528),
-		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+		     SPINAND_INFO_OP_VARIANTS(&fm25g_read_cache_variants,
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
Signature · 1 line
2.54.0
maintainer
#1 lore raw

Hi Aleksandr,

Quoted 6 lines · Aleksandr Mineev

The FM25G01B/FM25G02B datasheets specify a single dummy byte for the 0xEB Quad I/O read-from-cache operation, but the generic read_cache_variants set uses two dummy bytes for the 1S-4S-4S variant. The extra dummy byte shifts the data phase and returns corrupted data with no ECC error, breaking boot on boards using these chips.

Quoted 7 lines

Use a dedicated read-from-cache variant set with ndummy=1 for the 1S-4S-4S (0xEB) operation.

FM25G01B datasheet: https://www.fmsh.com/nvm/FM25G01B_ds_eng.pdf
FM25G02B datasheet: https://www.fmsh.com/nvm/FM25G02B_ds_eng.pdf

Fixes d5a5c9eb2ee9 ("mtd: spinand: fmsh: add support for FM25G{01,02}B")

Missing Cc: stable tag.

Quoted 1 line
Signed-off-by Aleksandr Mineev <[email protected]>

Otherwise LGTM.

Thanks,
Miquèl