KVM: x86/mmu: Use LOCK CMPXCHG to clear Accessed bits

Use LOCK CMPXCHG instead of LOCK AND to clear the Accessed bit when aging SPTEs in the TDP MMU, as doing a LOCK AND can corrupt a FROZEN SPTE and allow a third CPU to effectively overwrite the FROZEN SPTE. As pointed out by AI of some kind, because the magic FROZEN_SPTE value is a "full" SPTE, not a single bit, and includes the Accessed bit, clearing the Accessed bit in a FROZEN SPTE will result in is_frozen_spte() getting a false negative.

E.g. if CPU0 freezes an SPTE, and CPU1 clears the Accessed bitin the frozen SPTE, then CPU2 could come along and overwrite the frozen SPTE with a shadow-present SPTE.

Thankfully, the false negative is largely benign, because outside of TDX, which doesn't support aging, KVM only freezes leaf SPTEs when removing an upper level shadow page. So while KVM could clobber a frozen SPTE back to a shadow-present SPTE, and could even use the new SPTE, the subsequent TLB flush will make the orphaned, shadow-present SPTE unreachable. Failure to ever zap the orphaned leaf SPTE would show up in KVM's stats, but otherwise is benign (because KVM no longer keeps an elevated refcount for leaf SPTEs).

Opportunistically add a comment to warn future developers away from using kvm_tdp_mmu_write_spte_atomic() and tdp_mmu_clear_spte_bits_atomic(), as they are generally unsafe. Keep the helpers, e.g. instead of open-coding the atomic64_fetch_and() in tdp_mmu_clear_spte_bits(), as scary warnings usually are more effective deterrent against recidivism than removal of the dangerous code.

Alternatively, KVM could use different bits for the magic FROZEN_SPTE value, e.g. setting the Dirty bits (with effective IPAT and Global aliases) would likely be "ok", as IPAT/Global are extremely unlikely to be cleared without doing a full SPTE write, and KVM's clearing of Dirty bits shares logic with Write-Protection, which must do a full SPTE write (via cmpxchg64() in the TDP MMU) to ensure KVM isn't clobbering state. But there is zero reason to carry that risk (beyond stubbornness in wanting to preserve a "cute" idea), as the cost of LOCK CMPXCHG and LOCK AND are within 1-2 uops of each other on modern hardware.

Fixes b146a9b34aed ("KVM: x86/mmu: Age TDP MMU SPTEs without holding mmu_lock")

Cc [email protected]

Signed-off-by Sean Christopherson <[email protected]>

Use LOCK CMPXCHG instead of LOCK AND to clear the Accessed bit when aging SPTEs in the TDP MMU, as doing a LOCK AND can corrupt a FROZEN SPTE and allow a third CPU to effectively overwrite the FROZEN SPTE. As pointed out by AI of some kind, because the magic FROZEN_SPTE value is a "full" SPTE, not a single bit, and includes the Accessed bit, clearing the Accessed bit in a FROZEN SPTE will result in is_frozen_spte() getting a false negative.

E.g. if CPU0 freezes an SPTE, and CPU1 clears the Accessed bitin the frozen

SPTE, then CPU2 could come along and overwrite the frozen SPTE with a shadow-present SPTE.

Thankfully, the false negative is largely benign, because outside of TDX, which doesn't support aging, KVM only freezes leaf SPTEs when removing an upper level shadow page. So while KVM could clobber a frozen SPTE back to a shadow-present SPTE, and could even use the new SPTE, the subsequent TLB flush will make the orphaned, shadow-present SPTE unreachable. Failure to ever zap the orphaned leaf SPTE would show up in KVM's stats, but otherwise is benign (because KVM no longer keeps an elevated refcount for leaf SPTEs).

Opportunistically add a comment to warn future developers away from using kvm_tdp_mmu_write_spte_atomic() and tdp_mmu_clear_spte_bits_atomic(), as they are generally unsafe. Keep the helpers, e.g. instead of open-coding the atomic64_fetch_and() in tdp_mmu_clear_spte_bits(), as scary warnings usually are more effective deterrent against recidivism than removal of the dangerous code.

Alternatively, KVM could use different bits for the magic FROZEN_SPTE value, e.g. setting the Dirty bits (with effective IPAT and Global aliases) would likely be "ok", as IPAT/Global are extremely unlikely to be cleared without doing a full SPTE write, and KVM's clearing of Dirty bits shares logic with Write-Protection, which must do a full SPTE write (via cmpxchg64() in the TDP MMU) to ensure KVM isn't clobbering state. But there is zero reason to carry that risk (beyond stubbornness in wanting to preserve a "cute" idea), as the cost of LOCK CMPXCHG and LOCK AND are within 1-2 uops of each other on modern hardware.

Fixes b146a9b34aed ("KVM: x86/mmu: Age TDP MMU SPTEs without holding mmu_lock")

Cc [email protected]

Signed-off-by Sean Christopherson <[email protected]>

Use CMPXCHG instead of clear_bit(), which currently emits a LOCK BTR since the to-be-cleared bit isn't a compiled-time constant, when aging SPTEs in the shadow MMU to align with the approach taken by the TDP MMU, and because using CMPXCHG is far more robust against bugs in KVM. E.g. if the SPTE is somehow no longer an SPTE due to a KVM bug, CMPXCHG will fail gracefully, whereas clear_bit() would potentially corrupt/clobber memory.

Clearing the Accessed bit without atomically ensuring the SPTE is still the old SPTE is "fine", as holding the rmap's lock ensures zapping the old SPTE can't fully complete, which in turn ensures a new, different SPTE can't be installed. But that chain of logic isn't exactly obvious, and there's zero reason to avoid CMPXCHG as its cost on modern hardware is within ~1-2 uops of LOCK BTR (and may even be cheaper on some microarchitectures). Doing a 64-bit CMPXCHG on 32-bit kernels does requires a more expensive CMPXCHG8B, but 32-bit KVM is all but dead at this point.

Cc James Houghton <[email protected]>

Signed-off-by Sean Christopherson <[email protected]>

Use CMPXCHG instead of clear_bit(), which currently emits a LOCK BTR since the to-be-cleared bit isn't a compiled-time constant, when aging SPTEs in

the shadow MMU to align with the approach taken by the TDP MMU, and because using CMPXCHG is far more robust against bugs in KVM. E.g. if the SPTE is somehow no longer an SPTE due to a KVM bug, CMPXCHG will fail gracefully, whereas clear_bit() would potentially corrupt/clobber memory.

Clearing the Accessed bit without atomically ensuring the SPTE is still the old SPTE is "fine", as holding the rmap's lock ensures zapping the old SPTE can't fully complete, which in turn ensures a new, different SPTE can't be installed. But that chain of logic isn't exactly obvious, and there's zero reason to avoid CMPXCHG as its cost on modern hardware is within ~1-2 uops of LOCK BTR (and may even be cheaper on some microarchitectures). Doing a 64-bit CMPXCHG on 32-bit kernels does requires a more expensive CMPXCHG8B,

but 32-bit KVM is all but dead at this point.

Cc James Houghton <[email protected]>

Signed-off-by Sean Christopherson <[email protected]>

I initially was planning on tweaking the FROZEN_SPTE value to make it ok to use LOCK AND on Accessed bits, but AFAICT there's no meaningful downside to using CMPXCHG.

Quoted 3 lines · Sean Christopherson

I initially was planning on tweaking the FROZEN_SPTE value to make it ok to use LOCK AND on Accessed bits, but AFAICT there's no meaningful downside to using CMPXCHG.

Maybe do both, e.g., still remove the A-bit from FROZEN_SPTE? AFAICT there's no good reason to keep the A-bit in FROZEN_SPTE.

Quoted 7 lines · Kai Huang

Quoted 3 lines · Sean Christopherson

I initially was planning on tweaking the FROZEN_SPTE value to make it ok to use LOCK AND on Accessed bits, but AFAICT there's no meaningful downside to using CMPXCHG.

Maybe do both, e.g., still remove the A-bit from FROZEN_SPTE? AFAICT there's no good reason to keep the A-bit in FROZEN_SPTE.

Hmm, I'm leaning "no".

Once aging uses CMPXCHG, the A-bit isn't any more or less likely to be corrupted than any other bits. And arguably, using the A-bit is "safer", because (a) it's got the same bit position on EPT and everything else, and (b) spuriously setting or clearing the bit is more likely to be benign.

Use LOCK CMPXCHG instead of LOCK AND or LOCK BTR to clear Accessed bits when aging SPTEs, as LOCK AND could clobber a !PRESENT SPTE. Specificaly, as flagged by AI of some kind, a LOCK AND in the TDP MMU could clobber a FROZEN_SPTE and ultimately result in a false negative since the Accessed bit is included in FROZEN_SPTE.

I initially was planning on tweaking the FROZEN_SPTE value to make it ok to use LOCK AND on Accessed bits, but AFAICT there's no meaningful downside to using CMPXCHG.

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