ASoC: Realtek codecs: sort the reg_defaults tables

PATCH In review Peter Ujfalusi 2 participants 19 messages Aug 5 – Aug 8

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Stable branch Sound ASoC Realtek audio codecs

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Peter Ujfalusi

author

2026-08-05 09:02 UTC #0 lore raw

cover ASoC: Realtek codecs: sort the reg_defaults tables

Hi,

reg_defaults must be sorted by ascending register address as regcache_lookup_reg() locates the entries in it with bsearch(), see commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").

These tables have entries which are out of order, so the binary search does not find part of them. For those registers regcache_reg_needs_sync() cannot compare the cached value against the default and reports that a sync is needed, so they are written to the device on every regcache_sync() even when they were never touched.

On a RT712-VA this is not silent: the MIC_ARRAY function does not exist on that part, so the extra writes are NAKed by the codec and the bus driver reports

soundwire_intel.link.0: Msg ignored for Slave 6 (for addr: 0x8e00)

for every resume. For the other tables the extra writes are accepted and only cost bus bandwidth on every runtime resume.

The sorting patches only reorder the existing entries, the text of every entry is kept verbatim and no default value is changed. Each table was verified by evaluating the register addresses and replaying lib/bsearch.c on them.

Entries not reachable by the binary search, per table:

  rt274_reg                     7 (of 33)
  rt286_reg                     7 (of 39)
  rt298_reg                     7 (of 39)
  rt700_reg_defaults            6 (of 320)
  rt711_reg_defaults            5 (of 269)
  rt711_sdca_reg_defaults       1 (of 54)
  rt711_sdca_mbq_defaults       2 (of 25)
  rt712_sdca_dmic_reg_defaults  3 (of 42)
  rt712_sdca_reg_defaults       4 (of 19)
  rt715_reg_defaults           25 (of 323)
  rt715_reg_defaults_sdca       7 (of 78)
  rt715_mbq_reg_defaults_sdca   1 (of 32)
  rt721_sdca_reg_defaults      12 (of 41)
  rt1017_sdca_reg_defaults      4 (of 110)
  rt1316_reg_defaults           1 (of 47)
  rt1318_reg                    2 (of 142)
  rt1318_reg_defaults           3 (of 81)

rt700 and rt715-sdca also have entries listed twice, those are dropped in separate patches first so that the sorting patches are pure reorders.

Found by an audit of all reg_defaults tables under sound/. Other codec drivers have unsorted reg_defaults too, those are not addressed here.

Regards,
Peter

Peter Ujfalusi (17):
ASoC: rt274: sort the register default table
ASoC: rt286: sort the register default table
ASoC: rt298: sort the register default table
ASoC: rt700: drop duplicate reg_default entry
ASoC: rt700: sort the register default table
ASoC: rt711: sort the register default table
ASoC: rt711-sdca: sort the register default tables
ASoC: rt712-sdca-dmic: sort the register default table
ASoC: rt712-sdca-sdw: sort the register default table
ASoC: rt715: sort the register default table
ASoC: rt715-sdca: drop duplicate reg_default entries
ASoC: rt715-sdca: sort the register default tables
ASoC: rt721-sdca-sdw: sort the register default table
ASoC: rt1017-sdca-sdw: sort the register default table
ASoC: rt1316-sdw: sort the register default table
ASoC: rt1318: sort the register default table
ASoC: rt1318-sdw: sort the register default table

 sound/soc/codecs/rt1017-sdca-sdw.h | 10 +++++-----
 sound/soc/codecs/rt1316-sdw.c      |  2 +-
 sound/soc/codecs/rt1318-sdw.c      |  2 +-
 sound/soc/codecs/rt1318.c          |  4 ++--
 sound/soc/codecs/rt274.c           |  8 ++++----
 sound/soc/codecs/rt286.c           | 12 +++++------
 sound/soc/codecs/rt298.c           | 12 +++++------
 sound/soc/codecs/rt700-sdw.h       | 11 +++++-----
 sound/soc/codecs/rt711-sdca-sdw.h  |  6 +++---
 sound/soc/codecs/rt711-sdw.h       | 10 +++++-----
 sound/soc/codecs/rt712-sdca-dmic.h |  6 ++++--
 sound/soc/codecs/rt712-sdca-sdw.h  | 11 +++++-----
 sound/soc/codecs/rt715-sdca-sdw.h  | 12 ++++-------
 sound/soc/codecs/rt715-sdw.h       | 32 +++++++++++++++---------------
 sound/soc/codecs/rt721-sdca-sdw.h  | 28 +++++++++++++-------------
 15 files changed, 82 insertions(+), 84 deletions(-)

base-commit: 05eebef3c7b2e8595fdd1bd46912aac9c1de8587

Signature · 1 line

2.55.0

Peter Ujfalusi

author

2026-08-05 09:02 UTC #1 lore raw

PATCH 1/17 ASoC: rt274: sort the register default table

reg_defaults must be sorted by ascending register address, as regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").

Four entries were appended to the end of rt274_reg[] instead of being inserted at their sorted position, which leaves 7 of the 33 entries unreachable for the binary search. regcache_reg_needs_sync() then cannot compare them against their default and reports that a sync is needed, so they are written to the device on every regcache_sync() even when they were never touched.

Sort the table by register address.

Fixes c7e79b2b2d2d ("ASoC: rt274: add rt274 codec driver")

Cc [email protected]

Signed-off-by Peter Ujfalusi <[email protected]>

---
 sound/soc/codecs/rt274.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

sound/soc/codecs/rt274.c +4 -4

index 63b5fc439773..f8c370106504 100644
@@ -184,8 +184,10 @@ static const struct reg_default rt274_reg[] = {
 	{ 0x0023a000, 0x00000057 },
 	{ 0x00270500, 0x00000400 },
 	{ 0x00370500, 0x00000400 },
+	{ 0x00830000, 0x00000097 },
 	{ 0x00870500, 0x00000400 },
 	{ 0x00920000, 0x00000031 },
+	{ 0x00930000, 0x00000097 },
 	{ 0x00935000, 0x00000097 },
 	{ 0x00936000, 0x00000097 },
 	{ 0x00970500, 0x00000400 },

@@ -195,10 +197,12 @@ static const struct reg_default rt274_reg[] = {
 	{ 0x00c37000, 0x00000400 },
 	{ 0x00c37100, 0x00000400 },
 	{ 0x01270500, 0x00000400 },
+	{ 0x01270700, 0x00000000 },
 	{ 0x01370500, 0x00000400 },
 	{ 0x01371f00, 0x411111f0 },
 	{ 0x01937000, 0x00000000 },
 	{ 0x01970500, 0x00000400 },
+	{ 0x01970700, 0x00000020 },
 	{ 0x02050000, 0x0000001b },
 	{ 0x02139000, 0x00000080 },
 	{ 0x0213a000, 0x00000080 },

@@ -207,10 +211,6 @@ static const struct reg_default rt274_reg[] = {
 	{ 0x02170700, 0x00000000 },
 	{ 0x02270100, 0x00000000 },
 	{ 0x02370100, 0x00000000 },
-	{ 0x01970700, 0x00000020 },
-	{ 0x00830000, 0x00000097 },
-	{ 0x00930000, 0x00000097 },
-	{ 0x01270700, 0x00000000 },
 };
 
 static bool rt274_volatile_register(struct device *dev, unsigned int reg)

Signature · 1 line

2.55.0

Peter Ujfalusi

author

2026-08-05 09:02 UTC #2 lore raw

PATCH 2/17 ASoC: rt286: sort the register default table

In reply to Peter Ujfalusi

Four entries were appended to the end of rt286_reg[] instead of being inserted at their sorted position and the 0x01470100 entry is listed after 0x01470c00, which leaves 7 of the 39 entries unreachable for the binary search. regcache_reg_needs_sync() then cannot compare them against their default and reports that a sync is needed, so they are written to the device on every regcache_sync() even when they were never touched.

Sort the table by register address.

Fixes 07cf7cbadb4d ("ASoC: add RT286 CODEC driver")

Cc [email protected]

Signed-off-by Peter Ujfalusi <[email protected]>

---
 sound/soc/codecs/rt286.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

sound/soc/codecs/rt286.c +6 -6

index ded0ea332480..4217467904d6 100644
@@ -77,8 +77,10 @@ static const struct reg_default rt286_reg[] = {
 	{ 0x0023a000, 0x0000007f },
 	{ 0x00270500, 0x00000400 },
 	{ 0x00370500, 0x00000400 },
+	{ 0x00830000, 0x000000c3 },
 	{ 0x00870500, 0x00000400 },
 	{ 0x00920000, 0x00000031 },
+	{ 0x00930000, 0x000000c3 },
 	{ 0x00935000, 0x000000c3 },
 	{ 0x00936000, 0x000000c3 },
 	{ 0x00970500, 0x00000400 },

@@ -88,16 +90,18 @@ static const struct reg_default rt286_reg[] = {
 	{ 0x00c37000, 0x00000000 },
 	{ 0x00c37100, 0x00000080 },
 	{ 0x01270500, 0x00000400 },
+	{ 0x01270700, 0x00000000 },
 	{ 0x01370500, 0x00000400 },
 	{ 0x01371f00, 0x411111f0 },
 	{ 0x01439000, 0x00000080 },
 	{ 0x0143a000, 0x00000080 },
-	{ 0x01470700, 0x00000000 },
+	{ 0x01470100, 0x00000000 },
 	{ 0x01470500, 0x00000400 },
+	{ 0x01470700, 0x00000000 },
 	{ 0x01470c00, 0x00000000 },
-	{ 0x01470100, 0x00000000 },
 	{ 0x01837000, 0x00000000 },
 	{ 0x01870500, 0x00000400 },
+	{ 0x01870700, 0x00000020 },
 	{ 0x02050000, 0x00000000 },
 	{ 0x02139000, 0x00000080 },
 	{ 0x0213a000, 0x00000080 },

@@ -106,10 +110,6 @@ static const struct reg_default rt286_reg[] = {
 	{ 0x02170700, 0x00000000 },
 	{ 0x02270100, 0x00000000 },
 	{ 0x02370100, 0x00000000 },
-	{ 0x01870700, 0x00000020 },
-	{ 0x00830000, 0x000000c3 },
-	{ 0x00930000, 0x000000c3 },
-	{ 0x01270700, 0x00000000 },
 };
 
 static bool rt286_volatile_register(struct device *dev, unsigned int reg)

Signature · 1 line

2.55.0

Peter Ujfalusi

author

2026-08-05 09:02 UTC #3 lore raw

PATCH 3/17 ASoC: rt298: sort the register default table

In reply to Peter Ujfalusi

Four entries were appended to the end of rt298_reg[] instead of being inserted at their sorted position and the 0x01470100 entry is listed after 0x01470c00, which leaves 7 of the 39 entries unreachable for the binary search. regcache_reg_needs_sync() then cannot compare them against their default and reports that a sync is needed, so they are written to the device on every regcache_sync() even when they were never touched.

Sort the table by register address.

Fixes 6adcafae6ed2 ("ASoC: add rt298 codec driver")

Cc [email protected]

Signed-off-by Peter Ujfalusi <[email protected]>

---
 sound/soc/codecs/rt298.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

sound/soc/codecs/rt298.c +6 -6

index 5414a1712b57..09aed08b5b79 100644
@@ -78,8 +78,10 @@ static const struct reg_default rt298_reg[] = {
 	{ 0x0023a000, 0x0000007f },
 	{ 0x00270500, 0x00000400 },
 	{ 0x00370500, 0x00000400 },
+	{ 0x00830000, 0x000000c3 },
 	{ 0x00870500, 0x00000400 },
 	{ 0x00920000, 0x00000031 },
+	{ 0x00930000, 0x000000c3 },
 	{ 0x00935000, 0x000000c3 },
 	{ 0x00936000, 0x000000c3 },
 	{ 0x00970500, 0x00000400 },

@@ -89,16 +91,18 @@ static const struct reg_default rt298_reg[] = {
 	{ 0x00c37000, 0x00000000 },
 	{ 0x00c37100, 0x00000080 },
 	{ 0x01270500, 0x00000400 },
+	{ 0x01270700, 0x00000000 },
 	{ 0x01370500, 0x00000400 },
 	{ 0x01371f00, 0x411111f0 },
 	{ 0x01439000, 0x00000080 },
 	{ 0x0143a000, 0x00000080 },
-	{ 0x01470700, 0x00000000 },
+	{ 0x01470100, 0x00000000 },
 	{ 0x01470500, 0x00000400 },
+	{ 0x01470700, 0x00000000 },
 	{ 0x01470c00, 0x00000000 },
-	{ 0x01470100, 0x00000000 },
 	{ 0x01837000, 0x00000000 },
 	{ 0x01870500, 0x00000400 },
+	{ 0x01870700, 0x00000020 },
 	{ 0x02050000, 0x00000000 },
 	{ 0x02139000, 0x00000080 },
 	{ 0x0213a000, 0x00000080 },

@@ -107,10 +111,6 @@ static const struct reg_default rt298_reg[] = {
 	{ 0x02170700, 0x00000000 },
 	{ 0x02270100, 0x00000000 },
 	{ 0x02370100, 0x00000000 },
-	{ 0x01870700, 0x00000020 },
-	{ 0x00830000, 0x000000c3 },
-	{ 0x00930000, 0x000000c3 },
-	{ 0x01270700, 0x00000000 },
 };
 
 static bool rt298_volatile_register(struct device *dev, unsigned int reg)

Signature · 1 line

2.55.0

Peter Ujfalusi

author

2026-08-05 09:02 UTC #4 lore raw

PATCH 4/17 ASoC: rt700: drop duplicate reg_default entry

In reply to Peter Ujfalusi

rt700_reg_defaults[] lists register 0x7303 twice with the same value. The identical rt711 table has the entry only once, so this is a copy-paste error.

Drop the duplicate. No functional change, regcache_lookup_reg() only ever finds one of the two entries.

Fixes 7d2a5f9ae41e ("ASoC: rt700: add rt700 codec driver")

Cc [email protected]

Signed-off-by Peter Ujfalusi <[email protected]>

---
 sound/soc/codecs/rt700-sdw.h | 1 -
 1 file changed, 1 deletion(-)

sound/soc/codecs/rt700-sdw.h +0 -1

index 4ad0dcfd16fd..d2e7381d03b8 100644
@@ -313,7 +313,6 @@ static const struct reg_default rt700_reg_defaults[] = {
 	{ 0x3122, 0x0000 },
 	{ 0x3123, 0x0000 },
 	{ 0x7303, 0x0057 },
-	{ 0x7303, 0x0057 },
 	{ 0x8383, 0x0057 },
 	{ 0x7308, 0x0097 },
 	{ 0x8388, 0x0097 },

Signature · 1 line

2.55.0

Peter Ujfalusi

author

2026-08-05 09:02 UTC #5 lore raw

PATCH 5/17 ASoC: rt700: sort the register default table

In reply to Peter Ujfalusi

At the end of rt700_reg_defaults[] the 0x83xx entries are interleaved with the 0x73xx entries they belong to, which leaves 6 of the entries unreachable for the binary search. regcache_reg_needs_sync() then cannot compare them against their default and reports that a sync is needed, so they are written to the device on every regcache_sync() even when they were never touched.

Sort the table by register address.

Fixes 7d2a5f9ae41e ("ASoC: rt700: add rt700 codec driver")

Cc [email protected]

Signed-off-by Peter Ujfalusi <[email protected]>

---
 sound/soc/codecs/rt700-sdw.h | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

sound/soc/codecs/rt700-sdw.h +5 -5

index d2e7381d03b8..002f94493b01 100644
@@ -313,16 +313,16 @@ static const struct reg_default rt700_reg_defaults[] = {
 	{ 0x3122, 0x0000 },
 	{ 0x3123, 0x0000 },
 	{ 0x7303, 0x0057 },
-	{ 0x8383, 0x0057 },
 	{ 0x7308, 0x0097 },
-	{ 0x8388, 0x0097 },
 	{ 0x7309, 0x0097 },
-	{ 0x8389, 0x0097 },
 	{ 0x7312, 0x0000 },
-	{ 0x8392, 0x0000 },
 	{ 0x7313, 0x0000 },
-	{ 0x8393, 0x0000 },
 	{ 0x7319, 0x0000 },
+	{ 0x8383, 0x0057 },
+	{ 0x8388, 0x0097 },
+	{ 0x8389, 0x0097 },
+	{ 0x8392, 0x0000 },
+	{ 0x8393, 0x0000 },
 	{ 0x8399, 0x0000 },
 	{ 0x75201a, 0x8003 },
 	{ 0x752045, 0x5289 },

Signature · 1 line

2.55.0

Peter Ujfalusi

author

2026-08-05 09:02 UTC #6 lore raw

PATCH 6/17 ASoC: rt711: sort the register default table

In reply to Peter Ujfalusi

At the end of rt711_reg_defaults[] the 0x83xx entries are interleaved with the 0x73xx entries they belong to, which leaves 5 of the 269 entries unreachable for the binary search. regcache_reg_needs_sync() then cannot compare them against their default and reports that a sync is needed, so they are written to the device on every regcache_sync() even when they were never touched.

Sort the table by register address.

Fixes 320b8b0d13b8 ("ASoC: rt711: add rt711 codec driver")

Cc [email protected]

Signed-off-by Peter Ujfalusi <[email protected]>

---
 sound/soc/codecs/rt711-sdw.h | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

sound/soc/codecs/rt711-sdw.h +5 -5

index 6acf9858330d..82da0e62d9d7 100644
@@ -256,16 +256,16 @@ static const struct reg_default rt711_reg_defaults[] = {
 	{ 0x3122, 0x00 },
 	{ 0x3123, 0x00 },
 	{ 0x7303, 0x57 },
-	{ 0x8383, 0x57 },
 	{ 0x7308, 0x97 },
-	{ 0x8388, 0x97 },
 	{ 0x7309, 0x97 },
-	{ 0x8389, 0x97 },
 	{ 0x7312, 0x00 },
-	{ 0x8392, 0x00 },
 	{ 0x7313, 0x00 },
-	{ 0x8393, 0x00 },
 	{ 0x7319, 0x00 },
+	{ 0x8383, 0x57 },
+	{ 0x8388, 0x97 },
+	{ 0x8389, 0x97 },
+	{ 0x8392, 0x00 },
+	{ 0x8393, 0x00 },
 	{ 0x8399, 0x00 },
 	{ 0x752008, 0xa807 },
 	{ 0x752009, 0x1029 },

Signature · 1 line

2.55.0

Peter Ujfalusi

author

2026-08-05 09:02 UTC #7 lore raw

PATCH 7/17 ASoC: rt711-sdca: sort the register default tables

In reply to Peter Ujfalusi

Both tables group the entries by SDCA entity instead: in rt711_sdca_reg_defaults[] the CS01 sample frequency index is listed before the FU05 controls (1 of 54 entries unreachable), and in rt711_sdca_mbq_defaults[] the MIC_ARRAY FU1E volumes are listed before the JACK_CODEC FU0F volumes (2 of 25 entries unreachable). regcache_reg_needs_sync() then cannot compare those against their default and reports that a sync is needed, so they are written to the device on every regcache_sync() even when they were never touched.

Sort both tables by register address.

Fixes 7ad4d237e7c4 ("ASoC: rt711-sdca: Add RT711 SDCA vendor-specific driver")

Cc [email protected]

Signed-off-by Peter Ujfalusi <[email protected]>

---
 sound/soc/codecs/rt711-sdca-sdw.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

sound/soc/codecs/rt711-sdca-sdw.h +3 -3

index 0d774e473ab9..9aa22b52d556 100644
@@ -58,12 +58,12 @@ static const struct reg_default rt711_sdca_reg_defaults[] = {
 	{ 0x2f0f, 0x00 },
 	{ 0x2f50, 0x03 },
 	{ 0x2f5a, 0x00 },
-	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT711_SDCA_ENT_CS01, RT711_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
 	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT711_SDCA_ENT_USER_FU05, RT711_SDCA_CTL_FU_MUTE, CH_L), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT711_SDCA_ENT_USER_FU05, RT711_SDCA_CTL_FU_MUTE, CH_R), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT711_SDCA_ENT_USER_FU0F, RT711_SDCA_CTL_FU_MUTE, CH_L), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT711_SDCA_ENT_USER_FU0F, RT711_SDCA_CTL_FU_MUTE, CH_R), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT711_SDCA_ENT_PDE28, RT711_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
+	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT711_SDCA_ENT_CS01, RT711_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
 	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT711_SDCA_ENT_USER_FU1E, RT711_SDCA_CTL_FU_MUTE, CH_L), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT711_SDCA_ENT_USER_FU1E, RT711_SDCA_CTL_FU_MUTE, CH_R), 0x01 },
 };

@@ -86,14 +86,14 @@ static const struct reg_default rt711_sdca_mbq_defaults[] = {
 	{ 0x610003f, 0xff12 },
 	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT711_SDCA_ENT_USER_FU05, RT711_SDCA_CTL_FU_VOLUME, CH_L), 0x00 },
 	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT711_SDCA_ENT_USER_FU05, RT711_SDCA_CTL_FU_VOLUME, CH_R), 0x00 },
-	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT711_SDCA_ENT_USER_FU1E, RT711_SDCA_CTL_FU_VOLUME, CH_L), 0x00 },
-	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT711_SDCA_ENT_USER_FU1E, RT711_SDCA_CTL_FU_VOLUME, CH_R), 0x00 },
 	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT711_SDCA_ENT_USER_FU0F, RT711_SDCA_CTL_FU_VOLUME, CH_L), 0x00 },
 	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT711_SDCA_ENT_USER_FU0F, RT711_SDCA_CTL_FU_VOLUME, CH_R), 0x00 },
 	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT711_SDCA_ENT_PLATFORM_FU44, RT711_SDCA_CTL_FU_CH_GAIN, CH_L), 0x00 },
 	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT711_SDCA_ENT_PLATFORM_FU44, RT711_SDCA_CTL_FU_CH_GAIN, CH_R), 0x00 },
 	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT711_SDCA_ENT_PLATFORM_FU15, RT711_SDCA_CTL_FU_CH_GAIN, CH_L), 0x00 },
 	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT711_SDCA_ENT_PLATFORM_FU15, RT711_SDCA_CTL_FU_CH_GAIN, CH_R), 0x00 },
+	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT711_SDCA_ENT_USER_FU1E, RT711_SDCA_CTL_FU_VOLUME, CH_L), 0x00 },
+	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT711_SDCA_ENT_USER_FU1E, RT711_SDCA_CTL_FU_VOLUME, CH_R), 0x00 },
 };
 
 #endif /* __RT711_SDW_SDCA_H__ */

Signature · 1 line

2.55.0

Peter Ujfalusi

author

2026-08-05 09:02 UTC #8 lore raw

PATCH 8/17 ASoC: rt712-sdca-dmic: sort the register default table

In reply to Peter Ujfalusi

rt712_sdca_dmic_reg_defaults[] is grouped by SDCA entity instead, so the binary search does not find 3 of its entries. regcache_reg_needs_sync() then cannot compare those against their default and reports that a sync is needed, so they are written to the device on every regcache_sync() even when they were never touched.

Sort the table by register address.

Fixes 63a511284c9e ("ASoC: rt712-sdca: Add RT712 SDCA driver for Mic topology")

Cc [email protected]

Signed-off-by Peter Ujfalusi <[email protected]>

---
 sound/soc/codecs/rt712-sdca-dmic.h | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

sound/soc/codecs/rt712-sdca-dmic.h +4 -2

index 110154e74efe..2f08e58ed519 100644
@@ -36,6 +36,7 @@ struct rt712_sdca_dmic_kctrl_priv {
 #define CH_03	0x03
 #define CH_04	0x04
 
+/* must stay sorted by register address, regcache_lookup_reg() does a bsearch() */
 static const struct reg_default rt712_sdca_dmic_reg_defaults[] = {
 	{ 0x201a, 0x00 },
 	{ 0x201b, 0x00 },

@@ -72,15 +73,16 @@ static const struct reg_default rt712_sdca_dmic_reg_defaults[] = {
 	{ 0x2f59, 0x07 },
 	{ 0x3201, 0x01 },
 	{ 0x320c, 0x00 },
-	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_IT26, RT712_SDCA_CTL_VENDOR_DEF, 0), 0x00 },
 	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_01), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_02), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_03), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_04), 0x01 },
-	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_CS1F, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
 	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_CS1C, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
+	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_CS1F, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
+	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_IT26, RT712_SDCA_CTL_VENDOR_DEF, 0), 0x00 },
 };
 
+/* must stay sorted by register address, regcache_lookup_reg() does a bsearch() */
 static const struct reg_default rt712_sdca_dmic_mbq_defaults[] = {
 	{ 0x0590001e, 0x0020 },
 	{ 0x06100000, 0x0010 },

Signature · 1 line

2.55.0

Peter Ujfalusi

author

2026-08-05 09:02 UTC #9 lore raw

PATCH 9/17 ASoC: rt712-sdca-sdw: sort the register default table

In reply to Peter Ujfalusi

rt712_sdca_reg_defaults[] is grouped by SDCA function instead, so the binary search does not find 4 of its entries. regcache_reg_needs_sync() then cannot compare those against their default and reports that a sync is needed, so they are written to the device on every regcache_sync() even when they were never touched.

One of them is the Mic Array Clock Source 0x1C Sample Frequency Index control, which a part without that function rejects:

soundwire_intel.link.0: Msg ignored for Slave 6, addr: 0x8e00

Sort the table by register address.

Fixes 936abb09c1c7 ("ASoC: rt712-sdca: add the function for version B")

Cc [email protected]

Signed-off-by Peter Ujfalusi <[email protected]>

---
 sound/soc/codecs/rt712-sdca-sdw.h | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

sound/soc/codecs/rt712-sdca-sdw.h +6 -5

index 99fd2d67f04d..7ad25cc27f62 100644
@@ -11,21 +11,21 @@
 #include <linux/regmap.h>
 #include <linux/soundwire/sdw_registers.h>
 
+/* must stay sorted by register address, regcache_lookup_reg() does a bsearch() */
 static const struct reg_default rt712_sdca_reg_defaults[] = {
-
-	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_CS01, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
-	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_CS11, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
 	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_USER_FU05, RT712_SDCA_CTL_FU_MUTE, CH_01), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_USER_FU05, RT712_SDCA_CTL_FU_MUTE, CH_02), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_USER_FU0F, RT712_SDCA_CTL_FU_MUTE, CH_01), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_USER_FU0F, RT712_SDCA_CTL_FU_MUTE, CH_02), 0x01 },
-	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_PDE40, RT712_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
 	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_PDE12, RT712_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
-	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_CS1C, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
+	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_CS01, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
+	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_CS11, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
+	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_PDE40, RT712_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
 	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_01), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_02), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_03), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_04), 0x01 },
+	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_CS1C, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
 	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_CS1F, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
 	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_USER_FU06, RT712_SDCA_CTL_FU_MUTE, CH_01), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_USER_FU06, RT712_SDCA_CTL_FU_MUTE, CH_02), 0x01 },

@@ -34,6 +34,7 @@ static const struct reg_default rt712_sdca_reg_defaults[] = {
 	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_OT23, RT712_SDCA_CTL_VENDOR_DEF, 0), 0x00 },
 };
 
+/* must stay sorted by register address, regcache_lookup_reg() does a bsearch() */
 static const struct reg_default rt712_sdca_mbq_defaults[] = {
 	{ 0x2000004, 0xaa01 },
 	{ 0x200000e, 0x21e0 },

Signature · 1 line

2.55.0

Peter Ujfalusi

author

2026-08-05 09:02 UTC #10 lore raw

PATCH 10/17 ASoC: rt715: sort the register default table

In reply to Peter Ujfalusi

At the end of rt715_reg_defaults[] the 0x82xx and 0x83xx entries are interleaved with the 0x72xx and 0x73xx entries they belong to, and 0x385e is listed before 0x3859. This leaves 25 of the 323 entries unreachable for the binary search. regcache_reg_needs_sync() then cannot compare them against their default and reports that a sync is needed, so they are written to the device on every regcache_sync() even when they were never touched.

Sort the table by register address.

Fixes d1ede0641b05 ("ASoC: rt715: add RT715 codec driver")

Cc [email protected]

Signed-off-by Peter Ujfalusi <[email protected]>

---
 sound/soc/codecs/rt715-sdw.h | 32 ++++++++++++++++----------------
 1 file changed, 16 insertions(+), 16 deletions(-)

sound/soc/codecs/rt715-sdw.h +16 ~~-16~~

index 5d7661e335ae..f19fafb913f0 100644
@@ -281,8 +281,8 @@ static const struct reg_default rt715_reg_defaults[] = {
 	{ 0x371b, 0x00 },
 	{ 0x371d, 0x00 },
 	{ 0x3729, 0x00 },
-	{ 0x385e, 0x00 },
 	{ 0x3859, 0x00 },
+	{ 0x385e, 0x00 },
 	{ 0x4c12, 0x411111f0 },
 	{ 0x4c13, 0x411111f0 },
 	{ 0x4c1d, 0x411111f0 },

@@ -300,36 +300,36 @@ static const struct reg_default rt715_reg_defaults[] = {
 	{ 0x4f1d, 0x411111f0 },
 	{ 0x4f29, 0x411111f0 },
 	{ 0x7207, 0x00 },
-	{ 0x8287, 0x00 },
 	{ 0x7208, 0x00 },
-	{ 0x8288, 0x00 },
 	{ 0x7209, 0x00 },
-	{ 0x8289, 0x00 },
 	{ 0x7227, 0x00 },
-	{ 0x82a7, 0x00 },
 	{ 0x7307, 0x97 },
-	{ 0x8387, 0x97 },
 	{ 0x7308, 0x97 },
-	{ 0x8388, 0x97 },
 	{ 0x7309, 0x97 },
-	{ 0x8389, 0x97 },
 	{ 0x7312, 0x00 },
-	{ 0x8392, 0x00 },
 	{ 0x7313, 0x00 },
-	{ 0x8393, 0x00 },
 	{ 0x7318, 0x00 },
-	{ 0x8398, 0x00 },
 	{ 0x7319, 0x00 },
-	{ 0x8399, 0x00 },
 	{ 0x731a, 0x00 },
-	{ 0x839a, 0x00 },
 	{ 0x731b, 0x00 },
-	{ 0x839b, 0x00 },
 	{ 0x731d, 0x00 },
-	{ 0x839d, 0x00 },
 	{ 0x7327, 0x97 },
-	{ 0x83a7, 0x97 },
 	{ 0x7329, 0x00 },
+	{ 0x8287, 0x00 },
+	{ 0x8288, 0x00 },
+	{ 0x8289, 0x00 },
+	{ 0x82a7, 0x00 },
+	{ 0x8387, 0x97 },
+	{ 0x8388, 0x97 },
+	{ 0x8389, 0x97 },
+	{ 0x8392, 0x00 },
+	{ 0x8393, 0x00 },
+	{ 0x8398, 0x00 },
+	{ 0x8399, 0x00 },
+	{ 0x839a, 0x00 },
+	{ 0x839b, 0x00 },
+	{ 0x839d, 0x00 },
+	{ 0x83a7, 0x97 },
 	{ 0x83a9, 0x00 },
 	{ 0x752039, 0xa500 },
 };

Signature · 1 line

2.55.0

Peter Ujfalusi

author

2026-08-05 09:02 UTC #11 lore raw

PATCH 11/17 ASoC: rt715-sdca: drop duplicate reg_default entries

In reply to Peter Ujfalusi

The last two entries of rt715_reg_defaults_sdca[] repeat the ADC7_27 volume mute controls for CH_01 and CH_02, which are already listed a few lines above with the same value.

Drop the duplicates. No functional change, regcache_lookup_reg() only ever finds one of the two copies.

Fixes 20d17057f0a8 ("ASoC: rt715-sdca: Add RT715 sdca vendor-specific driver")

Cc [email protected]

Signed-off-by Peter Ujfalusi <[email protected]>

---
 sound/soc/codecs/rt715-sdca-sdw.h | 4 ----
 1 file changed, 4 deletions(-)

sound/soc/codecs/rt715-sdca-sdw.h +0 -4

index 0cbc14844f8c..774762480195 100644
@@ -102,10 +102,6 @@ static const struct reg_default rt715_reg_defaults_sdca[] = {
 		RT715_SDCA_SMPU_TRIG_EN_CTRL, CH_00), 0x02 },
 	{ SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_SMPU_TRIG_ST_EN,
 		RT715_SDCA_SMPU_TRIG_ST_CTRL, CH_00), 0x00 },
-	{ SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC7_27_VOL,
-		RT715_SDCA_FU_MUTE_CTRL, CH_01), 0x01 },
-	{ SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC7_27_VOL,
-		RT715_SDCA_FU_MUTE_CTRL, CH_02), 0x01 },
 };
 
 static const struct reg_default rt715_mbq_reg_defaults_sdca[] = {

Signature · 1 line

2.55.0

Peter Ujfalusi

author

2026-08-05 09:02 UTC #12 lore raw

PATCH 12/17 ASoC: rt715-sdca: sort the register default tables

In reply to Peter Ujfalusi

Both tables group the entries by SDCA entity instead: in rt715_reg_defaults_sdca[] the CX_CLK_SEL control is listed before the ADC8_9, ADC10_11 and ADC7_27 mute controls (7 of 78 entries unreachable), and in rt715_mbq_reg_defaults_sdca[] the AMIC_GAIN_EN CH_08 entry is listed before the DMIC_GAIN_EN entries (1 of 32 entries unreachable). regcache_reg_needs_sync() then cannot compare those against their default and reports that a sync is needed, so they are written to the device on every regcache_sync() even when they were never touched.

Sort both tables by register address.

Fixes 20d17057f0a8 ("ASoC: rt715-sdca: Add RT715 sdca vendor-specific driver")

Cc [email protected]

Signed-off-by Peter Ujfalusi <[email protected]>

---
 sound/soc/codecs/rt715-sdca-sdw.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

sound/soc/codecs/rt715-sdca-sdw.h +4 -4

index 774762480195..d408f2d7d0f2 100644
@@ -76,8 +76,6 @@ static const struct reg_default rt715_reg_defaults_sdca[] = {
 	{ 0x2f52, 0x01 },
 	{ 0x2f5a, 0x02 },
 	{ 0x2f5b, 0x05 },
-	{ SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_CX_CLK_SEL_EN,
-		RT715_SDCA_CX_CLK_SEL_CTRL, CH_00), 0x1 },
 	{ SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC8_9_VOL,
 		RT715_SDCA_FU_MUTE_CTRL, CH_01), 0x01 },
 	{ SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC8_9_VOL,

@@ -98,6 +96,8 @@ static const struct reg_default rt715_reg_defaults_sdca[] = {
 		RT715_SDCA_FU_MUTE_CTRL, CH_01), 0x01 },
 	{ SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC7_27_VOL,
 		RT715_SDCA_FU_MUTE_CTRL, CH_02), 0x01 },
+	{ SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_CX_CLK_SEL_EN,
+		RT715_SDCA_CX_CLK_SEL_CTRL, CH_00), 0x1 },
 	{ SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_SMPU_TRIG_ST_EN,
 		RT715_SDCA_SMPU_TRIG_EN_CTRL, CH_00), 0x02 },
 	{ SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_SMPU_TRIG_ST_EN,

@@ -145,8 +145,6 @@ static const struct reg_default rt715_mbq_reg_defaults_sdca[] = {
 		RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_06), 0x00 },
 	{ SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_AMIC_GAIN_EN,
 		RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_07), 0x00 },
-	{ SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_AMIC_GAIN_EN,
-		RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_08), 0x00 },
 	{ SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_DMIC_GAIN_EN,
 		RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_01), 0x00 },
 	{ SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_DMIC_GAIN_EN,

@@ -161,6 +159,8 @@ static const struct reg_default rt715_mbq_reg_defaults_sdca[] = {
 		RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_06), 0x00 },
 	{ SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_DMIC_GAIN_EN,
 		RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_07), 0x00 },
+	{ SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_AMIC_GAIN_EN,
+		RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_08), 0x00 },
 	{ SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_DMIC_GAIN_EN,
 		RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_08), 0x00 },
 };

Signature · 1 line

2.55.0

Peter Ujfalusi

author

2026-08-05 09:02 UTC #13 lore raw

PATCH 13/17 ASoC: rt721-sdca-sdw: sort the register default table

In reply to Peter Ujfalusi

rt721_sdca_reg_defaults[] is grouped by SDCA function instead, so the binary search does not find 12 of its entries. regcache_reg_needs_sync() then cannot compare those against their default and reports that a sync is needed, so they are written to the device on every regcache_sync() even when they were never touched.

Sort the table by register address.

Fixes 86ce355c1f9a ("ASoC: rt721-sdca: Add RT721 SDCA driver")

Cc [email protected]

Signed-off-by Peter Ujfalusi <[email protected]>

---
 sound/soc/codecs/rt721-sdca-sdw.h | 28 ++++++++++++++--------------
 1 file changed, 14 insertions(+), 14 deletions(-)

sound/soc/codecs/rt721-sdca-sdw.h +14 ~~-14~~

index 214b31b82583..13d6227f3392 100644
@@ -29,14 +29,6 @@ static const struct reg_default rt721_sdca_reg_defaults[] = {
 	{ 0x2f5b, 0x07 },
 	{ 0x2f5c, 0x27 },
 	{ 0x2f5d, 0x07 },
-	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_CS01,
-		RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
-	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_CS11,
-		RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
-	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE12,
-		RT721_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
-	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE40,
-		RT721_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
 	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05,
 		RT721_SDCA_CTL_FU_MUTE, CH_L), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05,

@@ -45,6 +37,14 @@ static const struct reg_default rt721_sdca_reg_defaults[] = {
 		RT721_SDCA_CTL_FU_MUTE, CH_L), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F,
 		RT721_SDCA_CTL_FU_MUTE, CH_R), 0x01 },
+	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE12,
+		RT721_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
+	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_CS01,
+		RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
+	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_CS11,
+		RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
+	{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE40,
+		RT721_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
 	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E,
 		RT721_SDCA_CTL_FU_MUTE, CH_01), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E,

@@ -53,30 +53,30 @@ static const struct reg_default rt721_sdca_reg_defaults[] = {
 		RT721_SDCA_CTL_FU_MUTE, CH_03), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E,
 		RT721_SDCA_CTL_FU_MUTE, CH_04), 0x01 },
+	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_PDE2A,
+		RT721_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
 	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_CS1F,
 		RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
 	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_IT26,
 		RT721_SDCA_CTL_VENDOR_DEF, 0), 0x00 },
-	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_PDE2A,
-		RT721_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
-	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_CS31,
-		RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
 	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06,
 		RT721_SDCA_CTL_FU_MUTE, CH_L), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06,
 		RT721_SDCA_CTL_FU_MUTE, CH_R), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23,
 		RT721_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
-	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_OT23,
-		RT721_SDCA_CTL_VENDOR_DEF, 0), 0x00 },
 	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23,
 		RT721_SDCA_CTL_FU_MUTE, CH_01), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23,
 		RT721_SDCA_CTL_FU_MUTE, CH_02), 0x01 },
+	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_CS31,
+		RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
 	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_FU55,
 		RT721_SDCA_CTL_FU_MUTE, CH_01), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_FU55,
 		RT721_SDCA_CTL_FU_MUTE, CH_02), 0x01 },
+	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_OT23,
+		RT721_SDCA_CTL_VENDOR_DEF, 0), 0x00 },
 };
 
 static const struct reg_default rt721_sdca_mbq_defaults[] = {

Signature · 1 line

2.55.0

Peter Ujfalusi

author

2026-08-05 09:02 UTC #14 lore raw

PATCH 14/17 ASoC: rt1017-sdca-sdw: sort the register default table

In reply to Peter Ujfalusi

rt1017_sdca_reg_defaults[] places the SDCA controls before the lower vendor registers instead, so the binary search does not find 4 of its entries. regcache_reg_needs_sync() then cannot compare those against their default and reports that a sync is needed, so they are written to the device on every regcache_sync() even when they were never touched.

Sort the table by register address.

Fixes 2b7aecd58528 ("ASoC: rt1017: Add RT1017 SDCA amplifier driver")

Cc [email protected]

Signed-off-by Peter Ujfalusi <[email protected]>

---
 sound/soc/codecs/rt1017-sdca-sdw.h | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

sound/soc/codecs/rt1017-sdca-sdw.h +5 -5

index 4932b5dbe3c0..1604e1cfd85e 100644
@@ -165,19 +165,19 @@ static const struct reg_default rt1017_sdca_reg_defaults[] = {
 	{ 0xdb09, 0x0f },
 	{ 0xdb0a, 0xff },
 	{ 0xdb14, 0x00 },
-
-	{ SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_UDMPU21,
-			RT1017_SDCA_CTL_UDMPU_CLUSTER, 0), 0x00 },
 	{ SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_FU,
 			RT1017_SDCA_CTL_FU_MUTE, 0x01), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_XU22,
 			RT1017_SDCA_CTL_BYPASS, 0), 0x01 },
-	{ SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_CS21,
-			RT1017_SDCA_CTL_FS_INDEX, 0), 0x09 },
 	{ SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_PDE23,
 			RT1017_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
 	{ SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_PDE22,
 			RT1017_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
+
+	{ SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_UDMPU21,
+			RT1017_SDCA_CTL_UDMPU_CLUSTER, 0), 0x00 },
+	{ SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_CS21,
+			RT1017_SDCA_CTL_FS_INDEX, 0), 0x09 },
 };
 
 #endif /* __RT1017_SDW_H__ */

Signature · 1 line

2.55.0

Peter Ujfalusi

author

2026-08-05 09:02 UTC #15 lore raw

PATCH 15/17 ASoC: rt1316-sdw: sort the register default table

In reply to Peter Ujfalusi

rt1316_reg_defaults[] is not in address order, so the binary search does not find one of its entries. regcache_reg_needs_sync() then cannot compare it against its default and reports that a sync is needed, so it is written to the device on every regcache_sync() even when it was never touched.

Sort the table by register address.

Fixes 2b719fd20f32 ("ASoC: rt1316: Add RT1316 SDCA vendor-specific driver")

Cc [email protected]

Signed-off-by Peter Ujfalusi <[email protected]>

---
 sound/soc/codecs/rt1316-sdw.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

sound/soc/codecs/rt1316-sdw.c +1 -1

index ca318dbd946e..0f6fc36e50f0 100644
@@ -59,13 +59,13 @@ static const struct reg_default rt1316_reg_defaults[] = {
 	{ 0xd101, 0x00 },
 	{ 0xd102, 0x30 },
 	{ 0xd103, 0x00 },
-	{ SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1316_SDCA_ENT_UDMPU21, RT1316_SDCA_CTL_UDMPU_CLUSTER, 0), 0x00 },
 	{ SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1316_SDCA_ENT_FU21, RT1316_SDCA_CTL_FU_MUTE, CH_L), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1316_SDCA_ENT_FU21, RT1316_SDCA_CTL_FU_MUTE, CH_R), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1316_SDCA_ENT_XU24, RT1316_SDCA_CTL_BYPASS, 0), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1316_SDCA_ENT_PDE23, RT1316_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
 	{ SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1316_SDCA_ENT_PDE22, RT1316_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
 	{ SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1316_SDCA_ENT_PDE24, RT1316_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
+	{ SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1316_SDCA_ENT_UDMPU21, RT1316_SDCA_CTL_UDMPU_CLUSTER, 0), 0x00 },
 };
 
 static const struct reg_sequence rt1316_blind_write[] = {

Signature · 1 line

2.55.0

Peter Ujfalusi

author

2026-08-05 09:02 UTC #16 lore raw

PATCH 16/17 ASoC: rt1318: sort the register default table

In reply to Peter Ujfalusi

The 0xdd93 and 0xdd94 entries are listed after 0xddc8 in rt1318_reg[], which leaves them unreachable for the binary search. regcache_reg_needs_sync() then cannot compare them against their default and reports that a sync is needed, so they are written to the device on every regcache_sync() even when they were never touched.

Sort the table by register address.

Fixes fe1ff61487ac ("ASoC: rt1318: Add RT1318 audio amplifier driver")

Cc [email protected]

Signed-off-by Peter Ujfalusi <[email protected]>

---
 sound/soc/codecs/rt1318.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

sound/soc/codecs/rt1318.c +2 -2

index d13fd0e14125..55607f1b9a1e 100644
@@ -337,6 +337,8 @@ static const struct reg_default rt1318_reg[] = {
 	{ 0xdd08, 0x40 },
 	{ 0xdd12, 0x00 },
 	{ 0xdd35, 0x00 },
+	{ 0xdd93, 0x00 },
+	{ 0xdd94, 0x64 },
 	{ 0xddb5, 0x00 },
 	{ 0xddb6, 0x40 },
 	{ 0xddb7, 0x00 },

@@ -345,8 +347,6 @@ static const struct reg_default rt1318_reg[] = {
 	{ 0xddc6, 0x00 },
 	{ 0xddc7, 0x00 },
 	{ 0xddc8, 0x00 },
-	{ 0xdd93, 0x00 },
-	{ 0xdd94, 0x64 },
 	{ 0xdf00, 0x00 },
 	{ 0xdf5f, 0x00 },
 	{ 0xdf60, 0x00 },

Signature · 1 line

2.55.0

Peter Ujfalusi

author

2026-08-05 09:02 UTC #17 lore raw

PATCH 17/17 ASoC: rt1318-sdw: sort the register default table

In reply to Peter Ujfalusi

rt1318_reg_defaults[] is not in address order, so the binary search does not find 3 of its entries. regcache_reg_needs_sync() then cannot compare those against their default and reports that a sync is needed, so they are written to the device on every regcache_sync() even when they were never touched.

Sort the table by register address.

Fixes 6ad73a2b42ea ("ASoC: rt1318: Add RT1318 SDCA vendor-specific driver")

Cc [email protected]

Signed-off-by Peter Ujfalusi <[email protected]>

---
 sound/soc/codecs/rt1318-sdw.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

sound/soc/codecs/rt1318-sdw.c +1 -1

index c038ac0e3b76..2f1a776585fc 100644
@@ -235,10 +235,10 @@ static const struct reg_default rt1318_reg_defaults[] = {
 	{ 0xf805, 0x00 },
 	{ 0xf806, 0x07 },
 	{ 0xf807, 0xff },
-	{ SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_UDMPU21, RT1318_SDCA_CTL_UDMPU_CLUSTER, 0), 0x00 },
 	{ SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_FU21, RT1318_SDCA_CTL_FU_MUTE, CH_L), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_FU21, RT1318_SDCA_CTL_FU_MUTE, CH_R), 0x01 },
 	{ SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_PDE23, RT1318_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
+	{ SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_UDMPU21, RT1318_SDCA_CTL_UDMPU_CLUSTER, 0), 0x00 },
 	{ SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_CS21, RT1318_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
 };

Signature · 1 line

2.55.0

Mark Brown

maintainer

2026-08-08 12:49 UTC #18 lore raw

In reply to Peter Ujfalusi

Quoted 9 lines · Peter Ujfalusi

ASoC: Realtek codecs: sort the reg_defaults tables
Hi,
reg_defaults must be sorted by ascending register address as regcache_lookup_reg() locates the entries in it with bsearch(), see commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
[...]

Applied to

https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-7.3

Thanks!

[01/17] ASoC: rt274: sort the register default table

        https://git.kernel.org/broonie/sound/c/6a147d177819
[02/17] ASoC: rt286: sort the register default table
        https://git.kernel.org/broonie/sound/c/c30771968b53
[03/17] ASoC: rt298: sort the register default table
        https://git.kernel.org/broonie/sound/c/aa4c472b0f4a
[04/17] ASoC: rt700: drop duplicate reg_default entry
        https://git.kernel.org/broonie/sound/c/90ad6a29809d
[05/17] ASoC: rt700: sort the register default table
        https://git.kernel.org/broonie/sound/c/18f21e34493b
[06/17] ASoC: rt711: sort the register default table
        https://git.kernel.org/broonie/sound/c/55fe63530772
[07/17] ASoC: rt711-sdca: sort the register default tables
        https://git.kernel.org/broonie/sound/c/b8fdd467bb5d
[08/17] ASoC: rt712-sdca-dmic: sort the register default table
        https://git.kernel.org/broonie/sound/c/b9339ee3fccc
[09/17] ASoC: rt712-sdca-sdw: sort the register default table
        https://git.kernel.org/broonie/sound/c/efd430c4d042
[10/17] ASoC: rt715: sort the register default table
        https://git.kernel.org/broonie/sound/c/d729804a92dc
[11/17] ASoC: rt715-sdca: drop duplicate reg_default entries
        https://git.kernel.org/broonie/sound/c/c9875bba469c
[12/17] ASoC: rt715-sdca: sort the register default tables
        https://git.kernel.org/broonie/sound/c/61a0321e4bc2
[13/17] ASoC: rt721-sdca-sdw: sort the register default table
        https://git.kernel.org/broonie/sound/c/70e0481c196e
[14/17] ASoC: rt1017-sdca-sdw: sort the register default table
        https://git.kernel.org/broonie/sound/c/5b48ce0356b1
[15/17] ASoC: rt1316-sdw: sort the register default table
        https://git.kernel.org/broonie/sound/c/7b48eccfbb9b
[16/17] ASoC: rt1318: sort the register default table
        https://git.kernel.org/broonie/sound/c/2a8e4b7114f6
[17/17] ASoC: rt1318-sdw: sort the register default table
        https://git.kernel.org/broonie/sound/c/3673b33633a5

All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying to this mail.

Thanks,
Mark