FAILED: patch "[PATCH] drm/xe/guc_ads: allocate UM queues in a separate BO" failed to apply to 6.12-stable tree
Subsystems (3)
[email protected]
maintainerThe patch below does not apply to the 6.12-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.
To reproduce the conflict and resubmit, you may use the following commands:
git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-6.12.y
git checkout FETCH_HEAD
git cherry-pick -x 99b01815957bd7d848420cb697f79ed11f7f215c
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<[email protected]>' --in-reply-to '2026082037-mutual-coroner-efeb@gregkh' --subject-prefix 'PATCH 6.12.y' 'HEAD^..'
Possible dependencies:
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From 99b01815957bd7d848420cb697f79ed11f7f215c Mon Sep 17 00:00:00 2001
From: Jia Yao <[email protected]>
Date: Tue, 4 Aug 2026 16:50:55 +0000
Subject: [PATCH] drm/xe/guc_ads: allocate UM queues in a separate BO
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
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Move the UM queues into a dedicated BO (ads->um_queue_bo) and avoid CPU memset operations on it, which eliminates the CPU as a potential cacheline-polluting agent and helps maintain consistency between GAM writes and GuC reads.
We also need to ensure the base_dpa for the queue is contiguous on hw where this is used instead of a GGTT address. Another good reason to split this out to a separate BO.
drivers/gpu/drm/xe/xe_bo.h +14 -0
@@ -6,6 +6,7 @@#ifndef _XE_BO_H_#define _XE_BO_H_ +#include <drm/drm_prime.h> #include <drm/ttm/ttm_tt.h> #include "xe_bo_types.h"
@@ -548,6 +549,19 @@ void xe_bo_dev_fini(struct xe_bo_dev *bo_device);struct sg_table *xe_bo_sg (struct xe_bo *bo); +/** +* xe_bo_sg_is_contiguous() - Check if a BO's DMA address space is contiguous. +* @bo: the BO to check (must have a valid sg table, i.e. !xe_bo_is_vram()) +* @len: required contiguous length in bytes +* +* Returns true if the first @len bytes of the BO are mapped to a contiguous +* DMA address range. +*/ +static inline bool xe_bo_sg_is_contiguous (struct xe_bo *bo,size_t len) +{ +return drm_prime_get_contiguous_size (xe_bo_sg (bo)) >= len; +} +/* * xe_sg_segment_size() - Provides upper limit for sg segment size. * @dev: device pointer
drivers/gpu/drm/xe/xe_guc.c +6 -0
@@ -714,6 +714,12 @@ static int xe_guc_realloc_post_hwconfig(struct xe_guc *guc)if (ret)return ret; +if (guc->ads.um_queue_bo) { + ret =xe_managed_bo_reinit_in_vram (xe, tile, &guc->ads.um_queue_bo); +if (ret) +return ret; + } +return 0 ; }
drivers/gpu/drm/xe/xe_guc_ads.c +58 -32
137 lines not on this page · raw message
drivers/gpu/drm/xe/xe_guc_ads_types.h +5 -0
@@ -16,6 +16,11 @@ struct xe_bo;struct xe_guc_ads {/** @bo: Xe BO for GuC ads blob */ struct xe_bo *bo; +/** +* @um_queue_bo: Dedicated BO for the HW fault ring (UM queues). +* NULL if the platform does not support USM. +*/ +struct xe_bo *um_queue_bo;/** @golden_lrc_size: golden LRC size */ size_t golden_lrc_size;/** @regset_size: size of register set passed to GuC for save/restore */
PATCH 1/1 drm/xe/guc_ads: allocate UM queues in a separate BO
Move the UM queues into a dedicated BO (ads->um_queue_bo) and avoid CPU memset operations on it, which eliminates the CPU as a potential cacheline-polluting agent and helps maintain consistency between GAM writes and GuC reads.
We also need to ensure the base_dpa for the queue is contiguous on hw where this is used instead of a GGTT address. Another good reason to split this out to a separate BO.
--- drivers/gpu/drm/xe/xe_bo.h | 14 +++++ drivers/gpu/drm/xe/xe_guc.c | 6 ++ drivers/gpu/drm/xe/xe_guc_ads.c | 90 +++++++++++++++++---------- drivers/gpu/drm/xe/xe_guc_ads_types.h | 5 ++ 4 files changed, 83 insertions(+), 32 deletions(-)
drivers/gpu/drm/xe/xe_bo.h +14 -0
@@ -6,6 +6,7 @@#ifndef _XE_BO_H_#define _XE_BO_H_ +#include <drm/drm_prime.h> #include <drm/ttm/ttm_tt.h> #include "xe_bo_types.h"
@@ -316,6 +317,19 @@ void xe_bo_put_commit(struct llist_head *deferred);struct sg_table *xe_bo_sg (struct xe_bo *bo); +/** +* xe_bo_sg_is_contiguous() - Check if a BO's DMA address space is contiguous. +* @bo: the BO to check (must have a valid sg table, i.e. !xe_bo_is_vram()) +* @len: required contiguous length in bytes +* +* Returns true if the first @len bytes of the BO are mapped to a contiguous +* DMA address range. +*/ +static inline bool xe_bo_sg_is_contiguous (struct xe_bo *bo,size_t len) +{ +return drm_prime_get_contiguous_size (xe_bo_sg (bo)) >= len; +} +/* * xe_sg_segment_size() - Provides upper limit for sg segment size. * @dev: device pointer
drivers/gpu/drm/xe/xe_guc.c +6 -0
@@ -293,6 +293,12 @@ static int xe_guc_realloc_post_hwconfig(struct xe_guc *guc)if (ret)return ret; +if (guc->ads.um_queue_bo) { + ret =xe_managed_bo_reinit_in_vram (xe, tile, &guc->ads.um_queue_bo); +if (ret) +return ret; + } +return 0 ; }
drivers/gpu/drm/xe/xe_guc_ads.c +58 -32
135 lines not on this page · raw message
drivers/gpu/drm/xe/xe_guc_ads_types.h +5 -0
@@ -16,6 +16,11 @@ struct xe_bo;struct xe_guc_ads {/** @bo: XE BO for GuC ads blob */ struct xe_bo *bo; +/** +* @um_queue_bo: Dedicated BO for the HW fault ring (UM queues). +* NULL if the platform does not support USM. +*/ +struct xe_bo *um_queue_bo;/** @golden_lrc_size: golden LRC size */ size_t golden_lrc_size;/** @regset_size: size of register set passed to GuC for save/restore */
Signature · 1 line
2.43.0
PATCH 1/3 drm/xe/guc_ads: allocate UM queues in a separate BO
In reply to [email protected]Move the UM queues into a dedicated BO (ads->um_queue_bo) and avoid CPU memset operations on it, which eliminates the CPU as a potential cacheline-polluting agent and helps maintain consistency between GAM writes and GuC reads.
We also need to ensure the base_dpa for the queue is contiguous on hw where this is used instead of a GGTT address. Another good reason to split this out to a separate BO.
--- drivers/gpu/drm/xe/xe_bo.h | 14 +++++ drivers/gpu/drm/xe/xe_guc.c | 6 ++ drivers/gpu/drm/xe/xe_guc_ads.c | 90 +++++++++++++++++---------- drivers/gpu/drm/xe/xe_guc_ads_types.h | 5 ++ 4 files changed, 83 insertions(+), 32 deletions(-)
drivers/gpu/drm/xe/xe_bo.h +14 -0
@@ -6,6 +6,7 @@#ifndef _XE_BO_H_#define _XE_BO_H_ +#include <drm/drm_prime.h> #include <drm/ttm/ttm_tt.h> #include "xe_bo_types.h"
@@ -316,6 +317,19 @@ void xe_bo_put_commit(struct llist_head *deferred);struct sg_table *xe_bo_sg (struct xe_bo *bo); +/** +* xe_bo_sg_is_contiguous() - Check if a BO's DMA address space is contiguous. +* @bo: the BO to check (must have a valid sg table, i.e. !xe_bo_is_vram()) +* @len: required contiguous length in bytes +* +* Returns true if the first @len bytes of the BO are mapped to a contiguous +* DMA address range. +*/ +static inline bool xe_bo_sg_is_contiguous (struct xe_bo *bo,size_t len) +{ +return drm_prime_get_contiguous_size (xe_bo_sg (bo)) >= len; +} +/* * xe_sg_segment_size() - Provides upper limit for sg segment size. * @dev: device pointer
drivers/gpu/drm/xe/xe_guc.c +6 -0
@@ -293,6 +293,12 @@ static int xe_guc_realloc_post_hwconfig(struct xe_guc *guc)if (ret)return ret; +if (guc->ads.um_queue_bo) { + ret =xe_managed_bo_reinit_in_vram (xe, tile, &guc->ads.um_queue_bo); +if (ret) +return ret; + } +return 0 ; }
drivers/gpu/drm/xe/xe_guc_ads.c +58 -32
135 lines not on this page · raw message
drivers/gpu/drm/xe/xe_guc_ads_types.h +5 -0
@@ -16,6 +16,11 @@ struct xe_bo;struct xe_guc_ads {/** @bo: XE BO for GuC ads blob */ struct xe_bo *bo; +/** +* @um_queue_bo: Dedicated BO for the HW fault ring (UM queues). +* NULL if the platform does not support USM. +*/ +struct xe_bo *um_queue_bo;/** @golden_lrc_size: golden LRC size */ size_t golden_lrc_size;/** @regset_size: size of register set passed to GuC for save/restore */
Signature · 1 line
2.43.0
PATCH 2/3 drm/xe/guc_ads: allocate UM queues in VRAM on dGFX
On iGPU, the UM queue BO is allocated in system memory. On dGFX, the BO was previously created in system memory and later reallocated in xe_guc_realloc_post_hwconfig(). Allocate the UM queue BO directly in VRAM on dGFX, where it is ultimately required.
--- drivers/gpu/drm/xe/xe_guc.c | 6 ------ drivers/gpu/drm/xe/xe_guc_ads.c | 8 +++++--- 2 files changed, 5 insertions(+), 9 deletions(-)
drivers/gpu/drm/xe/xe_guc.c +0 -6
@@ -293,12 +293,6 @@ static int xe_guc_realloc_post_hwconfig(struct xe_guc *guc)if (ret)return ret; -if (guc->ads.um_queue_bo) { - ret =xe_managed_bo_reinit_in_vram (xe, tile, &guc->ads.um_queue_bo); -if (ret) -return ret; - } -return 0 ; }
drivers/gpu/drm/xe/xe_guc_ads.c +5 -3
@@ -400,15 +400,17 @@ int xe_guc_ads_init(struct xe_guc_ads *ads)/* * Allocate a separate BO for the HW fault ring (UM queues). * -* Round the size up to the next power of two so that +* Round the size up to the next power of two so that on iGPU * (system memory, no IOMMU) the TTM pool issues a single * alloc_pages(order=N) call, maximising the chance of getting * a physically contiguous block. GuC requires contiguous DPA. */ -size_t um_size =roundup_pow_of_two (GUC_UM_QUEUE_SIZE * +size_t um_size =IS_DGFX (xe) ? +GUC_UM_QUEUE_SIZE *GUC_UM_HW_QUEUE_MAX : +roundup_pow_of_two (GUC_UM_QUEUE_SIZE *GUC_UM_HW_QUEUE_MAX ); -u32 um_flags =XE_BO_FLAG_SYSTEM | +u32 um_flags =XE_BO_FLAG_VRAM_IF_DGFX (tile) |XE_BO_FLAG_GGTT |XE_BO_FLAG_GGTT_INVALIDATE |XE_BO_FLAG_PINNED_NORESTORE ;
Signature · 1 line
2.43.0
PATCH 3/3 drm/xe/guc_ads: use uncached mapping for UM queue BO
In reply to Jia YaoOn Pre-Xe3p platform, the GAM write the UM queue through DPA using UC. if GuC reads the queue via GGTT (WB), stale data may be observed when the cacheline has been polluted by another agent.
To match the GAM's UC writes, configure the GuC mapping as UC as well.
Reviewed by: Matthew Auld <[email protected]>
--- drivers/gpu/drm/xe/xe_guc_ads.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
drivers/gpu/drm/xe/xe_guc_ads.c +2 -1
@@ -413,7 +413,8 @@ int xe_guc_ads_init(struct xe_guc_ads *ads)u32 um_flags =XE_BO_FLAG_VRAM_IF_DGFX (tile) |XE_BO_FLAG_GGTT |XE_BO_FLAG_GGTT_INVALIDATE | -XE_BO_FLAG_PINNED_NORESTORE ; +XE_BO_FLAG_PINNED_NORESTORE | +XE_BO_FLAG_NEEDS_UC ; bo =xe_managed_bo_create_pin_map (xe, tile, um_size, um_flags);if (IS_ERR (bo))
Signature · 1 line
2.43.0
Greg KH
maintainerRe: [PATCH 6.12.y 1/3] drm/xe/guc_ads: allocate UM queues in a separate BO
In reply to Jia YaoQuoted 9 lines · Jia Yao
Move the UM queues into a dedicated BO (
ads->um_queue_bo) and avoid CPU memset operations on it, which eliminates the CPU as a potential cacheline-polluting agent and helps maintain consistency between GAM writes and GuC reads.We also need to ensure the
base_dpafor the queue is contiguous on hw where this is used instead of a GGTT address. Another good reason to split this out to a separate BO.
Quoted 9 lines
Fixes 9c57bc08652a ("drm/xe/lnl: Drop force_probe requirement")Cc Gwan-gyeong Mun <[email protected]>Cc Matthew Auld <[email protected]>Cc <[email protected]> # v6.12+Signed-off-by Jia Yao <[email protected]>Reviewed-by Matthew Auld <[email protected]>Signed-off-by Matthew Auld <[email protected]>(cherry picked from commit 6af05de0dc19bbf3aaeec2020fe48b37c834b811)
Same problem with this series, invalid git commit ids :(
RE: [PATCH 6.12.y 1/3] drm/xe/guc_ads: allocate UM queues in a separate BO
I checked include/drm/intel/xe_pciids.h in Linux 6.12. The highest Xe generation defined there is Xe2, the patch is for Xe3, so the patch is not needed.
Quoted 33 lines
-----Original Message-----
From: Greg KH <[email protected]>
Sent: Tuesday, August 25, 2026 1:30 AM
To: Yao, Jia <[email protected]>
Cc: [email protected]; Mun, Gwan-gyeong <gwan- [email protected]>; Auld, Matthew <[email protected]>; Thomas Hellström <[email protected]>
Subject: Re: [PATCH 6.12.y 1/3] drm/xe/guc_ads: allocate UM queues in a separate BOQuoted 16 lines · Jia Yao
Move the UM queues into a dedicated BO (
ads->um_queue_bo) and avoid CPU memset operations on it, which eliminates the CPU as a potential cacheline-polluting agent and helps maintain consistency between GAM writes and GuC reads.We also need to ensure the
base_dpafor the queue is contiguous on hw where this is used instead of a GGTT address. Another good reason to split this out to a separate BO.Fixes 9c57bc08652a ("drm/xe/lnl: Drop force_probe requirement")Cc Gwan-gyeong Mun <[email protected]>Cc Matthew Auld <[email protected]>Cc <[email protected]> # v6.12+Signed-off-by Jia Yao <[email protected]>Reviewed-by Matthew Auld <[email protected]>Signed-off-by Matthew Auld <[email protected]>Quoted 3 lines
Link:
https://patch.msgid.link/[email protected]
(cherry picked from commit
6af05de0dc19bbf3aaeec2020fe48b37c834b811)Same problem with this series, invalid git commit ids :(
RE: [PATCH 6.12.y 1/3] drm/xe/guc_ads: allocate UM queues in a separate BO
I take back my earlier comment. After taking a closer look, I realized that Xe2 LNL can also hit the issue this patch is meant to address. Therefore, this patch is still required.
Quoted 47 lines
-----Original Message-----
From: Yao, Jia
Sent: Tuesday, August 25, 2026 4:27 PM
To: 'Greg KH' <[email protected]>
Cc: [email protected]; Mun, Gwan-gyeong <Gwan- [email protected]>; Auld, Matthew <[email protected]>; Thomas Hellström <[email protected]>
Subject: RE: [PATCH 6.12.y 1/3] drm/xe/guc_ads: allocate UM queues in a separate BOI checked
include/drm/intel/xe_pciids.hin Linux 6.12. The highest Xe generation defined there is Xe2, the patch is for Xe3, so the patch is not needed.Quoted 6 lines
-----Original Message-----
From: Greg KH <[email protected]>
Sent: Tuesday, August 25, 2026 1:30 AM
To: Yao, Jia <[email protected]>
Cc: [email protected]; Mun, Gwan-gyeong <gwan- [email protected]>; Auld, Matthew <[email protected]>;Thomas
Quoted 27 lines
Hellström <[email protected]>
Subject: Re: [PATCH 6.12.y 1/3] drm/xe/guc_ads: allocate UM queues in a separate BOQuoted 16 lines · Jia Yao
Move the UM queues into a dedicated BO (
ads->um_queue_bo) and avoid CPU memset operations on it, which eliminates the CPU as a potential cacheline-polluting agent and helps maintain consistency between GAM writes and GuC reads.We also need to ensure the
base_dpafor the queue is contiguous on hw where this is used instead of a GGTT address. Another good reason to split this out to a separate BO.Fixes 9c57bc08652a ("drm/xe/lnl: Drop force_probe requirement")Cc Gwan-gyeong Mun <[email protected]>Cc Matthew Auld <[email protected]>Cc <[email protected]> # v6.12+Signed-off-by Jia Yao <[email protected]>Reviewed-by Matthew Auld <[email protected]>Signed-off-by Matthew Auld <[email protected]>Quoted 3 lines
Link:
https://patch.msgid.link/[email protected]
(cherry picked from commit
6af05de0dc19bbf3aaeec2020fe48b37c834b811)Same problem with this series, invalid git commit ids :(
Sasha Levin
maintainerRe: [PATCH 6.12.y 1/3] drm/xe/guc_ads: allocate UM queues in a separate BO
In reply to Jia YaoQuoted 1 line
(cherry picked from commit
6af05de0dc19bbf3aaeec2020fe48b37c834b811)
This series needs a v2 before we can take it...
The cherry-pick lines name drm-xe-next commits that are not in Linus' tree.
The series also does not build on 6.12, and 2/3 is not safe there:
- XE_BO_FLAG_PINNED_NORESTORE does not exist on 6.12; it arrives with 045448da87bf ("drm/xe: Add XE_BO_FLAG_PINNED_NORESTORE") in v6.16.
- xe_guc_using_main_gamctrl_queues() does not exist either. It comes from 94edd6518613 ("drm/xe/xe3p_lpm: Configure MAIN_GAMCTRL_QUEUE_SELECT"). You dropped it from guc_um_init_params(), but the second call site in xe_guc_ads_init() is still there.
- On 6.12, xe_guc_ads_init() runs before xe_vram_probe(), so 2/3's XE_BO_FLAG_VRAM_IF_DGFX reaches add_vram() with no VRAM manager yet: a NULL deref at probe on Battlemage. 2/3 also removes the xe_managed_bo_reinit_in_vram() call, which is 6.12's only working VRAM path.
Signature · 2 lines
Thanks, Sasha
RE: [PATCH 6.12.y 1/3] drm/xe/guc_ads: allocate UM queues in a separate BO
Thanks, the original test case is not applicable to Linux 6.12. A new test case is being developed to verify the effectiveness of this fix on 6.12, and testing is still in progress. Will provide v2 once it is done.
Quoted 36 lines
-----Original Message-----
From: Sasha Levin <[email protected]>
Sent: Wednesday, August 26, 2026 10:18 PM
To: [email protected]
Cc: Sasha Levin <[email protected]>; Yao, Jia <[email protected]>; Mun, Gwan-gyeong <[email protected]>; Auld, Matthew <[email protected]>; Thomas Hellström <[email protected]>
Subject: Re: [PATCH 6.12.y 1/3] drm/xe/guc_ads: allocate UM queues in a separate BOQuoted 1 line
(cherry picked from commit
6af05de0dc19bbf3aaeec2020fe48b37c834b811)This series needs a v2 before we can take it...
The cherry-pick lines name drm-xe-next commits that are not in Linus' tree.
The series also does not build on 6.12, and 2/3 is not safe there:
-
XE_BO_FLAG_PINNED_NORESTOREdoes not exist on 6.12; it arrives with045448da87bf("drm/xe: AddXE_BO_FLAG_PINNED_NORESTORE") in v6.16.
-xe_guc_using_main_gamctrl_queues()does not exist either. It comes from94edd6518613("drm/xe/xe3p_lpm: ConfigureMAIN_GAMCTRL_QUEUE_SELECT").
You dropped it fromguc_um_init_params(), but the second call site inxe_guc_ads_init()is still there.
- On 6.12,xe_guc_ads_init()runs beforexe_vram_probe(), so 2/3'sXE_BO_FLAG_VRAM_IF_DGFXreachesadd_vram()with no VRAM manager
yet: a
NULL deref at probe on Battlemage. 2/3 also removes thexe_managed_bo_reinit_in_vram()call, which is 6.12's only working VRAM path.--
Thanks,
Sasha
RE: [PATCH 6.12.y 1/3] drm/xe/guc_ads: allocate UM queues in a separate BO
After further investigation and testing, I found that 6.12 only supports up to Xe2 platforms. The original issue is reported on Xe3 hardware. The cases that trigger Xe3 issues work well at Xe2+6.12, no test evidence demonstrating a benefit on 6.12.
As a result, the patch is not needed for 6.12.y.
Quoted 55 lines
-----Original Message-----
From: Yao, Jia
Sent: Thursday, August 27, 2026 8:04 AM
To: 'Sasha Levin' <[email protected]>; [email protected]
Cc: Mun, Gwan-gyeong <[email protected]>; Auld, Matthew <[email protected]>; Thomas Hellström <[email protected]>
Subject: RE: [PATCH 6.12.y 1/3] drm/xe/guc_ads: allocate UM queues in a separate BOThanks, the original test case is not applicable to Linux 6.12. A new test case is being developed to verify the effectiveness of this fix on 6.12, and testing is still in progress.
Will provide v2 once it is done.Quoted 12 lines
-----Original Message-----
From: Sasha Levin <[email protected]>
Sent: Wednesday, August 26, 2026 10:18 PM
To: [email protected]
Cc: Sasha Levin <[email protected]>; Yao, Jia <[email protected]>; Mun, Gwan-gyeong <[email protected]>; Auld, Matthew <[email protected]>; Thomas Hellström <[email protected]>
Subject: Re: [PATCH 6.12.y 1/3] drm/xe/guc_ads: allocate UM queues in a separate BOQuoted 1 line
(cherry picked from commit
6af05de0dc19bbf3aaeec2020fe48b37c834b811)Quoted 9 lines
This series needs a v2 before we can take it...
The cherry-pick lines name drm-xe-next commits that are not in Linus' tree.
The series also does not build on 6.12, and 2/3 is not safe there:
-
XE_BO_FLAG_PINNED_NORESTOREdoes not exist on 6.12; it arrives with045448da87bf("drm/xe: AddXE_BO_FLAG_PINNED_NORESTORE") inv6.16.
Quoted 1 line
-
xe_guc_using_main_gamctrl_queues()does not exist either. It comesfrom
Quoted 6 lines
94edd6518613 ("drm/xe/xe3p_lpm: Configure
MAIN_GAMCTRL_QUEUE_SELECT").
You dropped it fromguc_um_init_params(), but the second call site inxe_guc_ads_init()is still there.
- On 6.12,xe_guc_ads_init()runs beforexe_vram_probe(), so 2/3'sXE_BO_FLAG_VRAM_IF_DGFXreachesadd_vram()with no VRAMmanager
Quoted 8 lines
yet: a
NULL deref at probe on Battlemage. 2/3 also removes thexe_managed_bo_reinit_in_vram()call, which is 6.12's only working VRAM path.--
Thanks,
Sasha