riscv: document the Sv32 virtual memory layout
Subsystems (2)
cover riscv: document the Sv32 virtual memory layout
The RISC-V virtual memory layout documentation describes the 64-bit paging modes but has left the Sv32 section as a TODO. The layout is already defined by the RV32 page-table macros and can be observed in the boot-time layout printed with CONFIG_DEBUG_VM.
RV32 remains relevant to current hardware rather than only legacy systems. For example, Espressif announced the ESP32-S31 in March 2026 as a dual-core 32-bit RISC-V microcontroller with MMU support.
This series documents the existing rv32_defconfig layout and corrects a nearby comment that gives a stale fixed value for RV32 TASK_SIZE. The implementation is unchanged.
The main point on which I would appreciate feedback is whether this is the clearest way to present the configuration-dependent part of the layout. This is my first Linux kernel contribution, so I would also appreciate guidance on any process or presentation issues.
Tested on QEMU with a kernel based on commit 08dbfad3f504:
- rv32_defconfig plus CONFIG_DEBUG_VM=y
- full RV32 kernel and modules build with GCC 13.3.0
- boot with qemu-system-riscv32 8.2.2 and 512 MB or 4 GB RAM
- userspace reached using a minimal initramfs
- runtime layout matched the documented addresses
- the 4 GB boot exposed 1 GB of managed RAM, matching the current direct-map and no-highmem limitations
- make SPHINXDIRS=arch/riscv htmldocs
- scripts/checkpatch.pl --strict, no errors or warnings per patch
The boot-time layout was:
fixmap : 0x9c800000 - 0x9d000000
pci io : 0x9d000000 - 0x9e000000
vmemmap : 0x9e000000 - 0xa0000000
vmalloc : 0xa0000000 - 0xc0000000
lowmem : 0xc0000000 - 0xdfc00000
Yu Jin (2):
docs: riscv: document the Sv32 virtual memory layout
riscv: mm: correct the stale RV32 TASK_SIZE comment
Documentation/arch/riscv/vm-layout.rst | 28 +++++++++++++++++++++++++- arch/riscv/include/asm/pgtable.h | 6 ++---- 2 files changed, 29 insertions(+), 5 deletions(-)
base-commit: 08dbfad3f5040f5bdb6c529da20d6d4e81fefd72
Signature · 1 line
2.43.0
RFC PATCH 1/2 docs: riscv: document the Sv32 virtual memory layout
The RISC-V virtual memory layout documentation describes the 64-bit paging modes but leaves the Sv32 section as a TODO.
Document the rv32_defconfig layout and clarify which boundaries depend on the configured size of struct page. Distinguish the maximum direct-map range from the portion backed by physical memory. Also explain why the 34-bit physical addresses encoded by Sv32 page table entries do not make all of that address space usable as RAM by the current RV32 kernel.
--- Documentation/arch/riscv/vm-layout.rst | 28 +++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-)
Documentation/arch/riscv/vm-layout.rst +27 -1
@@ -16,7 +16,33 @@ RISC-V Linux Kernel 32bit RISC-V Linux Kernel SV32 ------------------------ -TODO +Sv32 provides a 4GB virtual address space, with the upper part used by the +kernel. Unlike the 64-bit layouts, the kernel image is part of the direct +mapping. The following layout is produced by ``rv32_defconfig``. + +:: + + ======================================================================================================================== + Start addr | Offset | End addr | Size | VM area description + ======================================================================================================================== + | | | | + 00000000 | 0 | 9c7fffff | 2504 MB | user-space virtual memory, different per mm + __________________|____________|__________________|_________|___________________________________________________________ + | + | Kernel-space virtual memory, shared between all processes: + ____________________________________________________________|___________________________________________________________ + | | | | + 9c800000 | -1592 MB | 9cffffff | 8 MB | fixmap + 9d000000 | -1584 MB | 9dffffff | 16 MB | PCI io + 9e000000 | -1568 MB | 9fffffff | 32 MB | vmemmap-sized reserved area + a0000000 | -1.5 GB | bfffffff | 512 MB | vmalloc/ioremap/modules; BPF JIT uses the last 128 MB + c0000000 | -1 GB | ffffffff | 1 GB | direct mapping of physical memory + __________________|____________|__________________|_________|___________________________________________________________ + +The layout before ``VMALLOC_START`` depends on the configured size of +``struct page``. The direct mapping row shows its maximum range; usable RAM is +limited by its mapped portion and the 32-bit ``phys_addr_t``, despite the +34-bit physical addresses encoded by Sv32 page table entries. RISC-V Linux Kernel 64bit =========================
Signature · 1 line
2.43.0
RFC PATCH 2/2 riscv: mm: correct the stale RV32 TASK_SIZE comment
In reply to Yu JinRV32 defines TASK_SIZE as FIXADDR_START. Its value depends on VMEMMAP_SIZE, which in turn depends on the configured size of struct page. The fixed 0x9fc00000 value in the comment is therefore stale.
Describe the macro relationship instead of replacing one configuration-specific address with another.
--- arch/riscv/include/asm/pgtable.h | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-)
arch/riscv/include/asm/pgtable.h +2 -4
@@ -1231,10 +1231,8 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte)#endif /* -* Task size is 0x4000000000 for RV64 or 0x9fc00000 for RV32. -* Note that PGDIR_SIZE must evenly divide TASK_SIZE. -* Task size is: -* - 0x9fc00000 (~2.5GB) for RV32. +* For RV32, TASK_SIZE is FIXADDR_START and depends on VMEMMAP_SIZE. +* For RV64, task size is: * - 0x4000000000 ( 256GB) for RV64 using SV39 mmu * - 0x800000000000 ( 128TB) for RV64 using SV48 mmu * - 0x100000000000000 ( 64PB) for RV64 using SV57 mmu
Signature · 1 line
2.43.0