arm64: dts: imx8mn: Add display DT overlays for the ifm VHIP4 EvalBoard
Subsystems (2)
PATCH 1/1 arm64: dts: imx8mn: Add display DT overlays for the ifm VHIP4 EvalBoard
From: Fedor Ross <[email protected]>
Add display DT overlays for the ifm VHIP4 EvalBoard v1. This includes two expansion modules, one populated with Displaytech DT050BTFT-PTS panel, and the NXP ADV7533 DSI-to-HDMI adapter. The Displaytech DT050BTFT-PTS is configured in three different DSI lane counts to allow testing all possible DSI lane count configurations of the VHIP4 EvalBoard.
---
Cc: Conor Dooley <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Frank Li <[email protected]>
Cc: Krzysztof Kozlowski <[email protected]>
Cc: Pengutronix Kernel Team <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Sascha Hauer <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
--- arch/arm64/boot/dts/freescale/Makefile | 16 ++ ...-evalboard-v1-overlay-dt050btft-1lane.dtso | 16 ++ ...-evalboard-v1-overlay-dt050btft-2lane.dtso | 16 ++ ...-evalboard-v1-overlay-dt050btft-4lane.dtso | 16 ++ ...evalboard-v1-overlay-dt050btft-common.dtsi | 155 ++++++++++++++++++ ...evalboard-v1-overlay-nxp-adv7533-hdmi.dtso | 104 ++++++++++++ 6 files changed, 323 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v1-overlay-dt050btft-1lane.dtso create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v1-overlay-dt050btft-2lane.dtso create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v1-overlay-dt050btft-4lane.dtso create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v1-overlay-dt050btft-common.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v1-overlay-nxp-adv7533-hdmi.dtso
arch/arm64/boot/dts/freescale/Makefile +16 -0
@@ -319,6 +319,12 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mn-var-som-symphony.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-var-som-symphony-legacy.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-venice-gw7902.dtb +imx8mn-vhip4-evalboard-v1-overlay-dt050btft-1lane-dtbs := imx8mn-vhip4-evalboard-v1.dtb \ + imx8mn-vhip4-evalboard-v1-overlay-dt050btft-1lane.dtbo +imx8mn-vhip4-evalboard-v1-overlay-dt050btft-2lane-dtbs := imx8mn-vhip4-evalboard-v1.dtb \ + imx8mn-vhip4-evalboard-v1-overlay-dt050btft-2lane.dtbo +imx8mn-vhip4-evalboard-v1-overlay-dt050btft-4lane-dtbs := imx8mn-vhip4-evalboard-v1.dtb \ + imx8mn-vhip4-evalboard-v1-overlay-dt050btft-4lane.dtbo imx8mn-vhip4-evalboard-v1-overlay-eeprom-1000-dtbs := imx8mn-vhip4-evalboard-v1.dtb \ imx8mn-vhip4-overlay-eeprom-1000.dtbo imx8mn-vhip4-evalboard-v1-overlay-eeprom-1100-dtbs := imx8mn-vhip4-evalboard-v1.dtb \
@@ -327,6 +333,8 @@ imx8mn-vhip4-evalboard-v1-overlay-ksz8794-dtbs := imx8mn-vhip4-evalboard-v1.dtb imx8mn-vhip4-evalboard-v1-overlay-ksz8794.dtbo imx8mn-vhip4-evalboard-v1-overlay-ksz9031-dtbs := imx8mn-vhip4-evalboard-v1.dtb \ imx8mn-vhip4-evalboard-v1-overlay-ksz9031.dtbo +imx8mn-vhip4-evalboard-v1-overlay-nxp-adv7533-hdmi-dtbs := imx8mn-vhip4-evalboard-v1.dtb \ + imx8mn-vhip4-evalboard-v1-overlay-nxp-adv7533-hdmi.dtbo imx8mn-vhip4-evalboard-v2-overlay-adin1300-dtbs := imx8mn-vhip4-evalboard-v2.dtb \ imx8mn-vhip4-evalboard-v2-overlay-adin1300.dtbo imx8mn-vhip4-evalboard-v2-overlay-eeprom-1100-dtbs := imx8mn-vhip4-evalboard-v2.dtb \
@@ -336,12 +344,20 @@ imx8mn-vhip4-evalboard-v2-overlay-eeprom-2000-dtbs := imx8mn-vhip4-evalboard-v2. imx8mn-vhip4-evalboard-v2-overlay-ksz8794-dtbs := imx8mn-vhip4-evalboard-v2.dtb \ imx8mn-vhip4-evalboard-v2-overlay-ksz8794.dtbo dtb-$(CONFIG_ARCH_MXC) += imx8mn-vhip4-evalboard-v1.dtb \ + imx8mn-vhip4-evalboard-v1-overlay-dt050btft-1lane.dtb \ + imx8mn-vhip4-evalboard-v1-overlay-dt050btft-1lane.dtbo \ + imx8mn-vhip4-evalboard-v1-overlay-dt050btft-2lane.dtb \ + imx8mn-vhip4-evalboard-v1-overlay-dt050btft-2lane.dtbo \ + imx8mn-vhip4-evalboard-v1-overlay-dt050btft-4lane.dtb \ + imx8mn-vhip4-evalboard-v1-overlay-dt050btft-4lane.dtbo \ imx8mn-vhip4-evalboard-v1-overlay-eeprom-1000.dtb \ imx8mn-vhip4-evalboard-v1-overlay-eeprom-1100.dtb \ imx8mn-vhip4-evalboard-v1-overlay-ksz8794.dtb \ imx8mn-vhip4-evalboard-v1-overlay-ksz8794.dtbo \ imx8mn-vhip4-evalboard-v1-overlay-ksz9031.dtb \ imx8mn-vhip4-evalboard-v1-overlay-ksz9031.dtbo \ + imx8mn-vhip4-evalboard-v1-overlay-nxp-adv7533-hdmi.dtb \ + imx8mn-vhip4-evalboard-v1-overlay-nxp-adv7533-hdmi.dtbo \ imx8mn-vhip4-evalboard-v2.dtb \ imx8mn-vhip4-evalboard-v2-overlay-adin1300.dtb \ imx8mn-vhip4-evalboard-v2-overlay-adin1300.dtbo \
arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v1-overlay-dt050btft-1lane.dtso new file +16 -0
@@ -0,0 +1,16 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2021-2026 Marek Vasut + */ +/dts-v1/; +/plugin/; + +#include "imx8mn-vhip4-evalboard-v1-overlay-dt050btft-common.dtsi" + +&sn65dsi83_in { + data-lanes = <1>; +}; + +&mipi_dsi_bridge1_out { + data-lanes = <1>; +};
arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v1-overlay-dt050btft-2lane.dtso new file +16 -0
@@ -0,0 +1,16 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2021-2026 Marek Vasut + */ +/dts-v1/; +/plugin/; + +#include "imx8mn-vhip4-evalboard-v1-overlay-dt050btft-common.dtsi" + +&sn65dsi83_in { + data-lanes = <1 2>; +}; + +&mipi_dsi_bridge1_out { + data-lanes = <1 2>; +};
arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v1-overlay-dt050btft-4lane.dtso new file +16 -0
@@ -0,0 +1,16 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2021-2026 Marek Vasut + */ +/dts-v1/; +/plugin/; + +#include "imx8mn-vhip4-evalboard-v1-overlay-dt050btft-common.dtsi" + +&sn65dsi83_in { + data-lanes = <1 2 3 4>; +}; + +&mipi_dsi_bridge1_out { + data-lanes = <1 2 3 4>; +};
arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v1-overlay-dt050btft-common.dtsi new file +155 -0
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arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v1-overlay-nxp-adv7533-hdmi.dtso new file +104 -0
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Signature · 1 line
2.53.0
[email protected]
AI reviewThank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider: - [Medium] The 1.8V regulator `reg_adv_1v8` is incorrectly configured to output 3.3V, violating hardware…
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] The 1.8V regulator reg_adv_1v8 is incorrectly configured to output 3.3V, violating hardware requirements for the ADV7535.
- [Medium] The hdmi-transmitter@3d node (ADV7535) is missing clocks and clock-names properties to link the defined cec_clock, breaking CEC support. --
commit fdacb0c2eecf5c57dea7a716eb4e6d3417011685
Author: Fedor Ross <[email protected]>
arm64: dts: imx8mn: Add display DT overlays for the ifm VHIP4 EvalBoard
This commit adds display DT overlays for the ifm VHIP4 EvalBoard v1, adding support for the Displaytech DT050BTFT-PTS panel and the NXP ADV7533 DSI-to-HDMI adapter. It supports different DSI lane counts to allow testing multiple configurations.
Quoted 5 lines
arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v1-overlay-nxp-adv7533-hdmi.dtso new file +0
-0
[ ... ]
arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v1-overlay-nxp-adv7533-hdmi.dtso line 31
Quoted 5 lines
arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v1-overlay-nxp-adv7533-hdmi.dtso new file +5
-0+ reg_adv_1v8: regulator-adv-1v8 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>;
^^^^^^^
[Severity: Medium]
Is the voltage configuration correct here? The reg_adv_1v8 node appears to represent a 1.8V power supply used by the ADV7535, but its voltage limits are set to 3.3V. This misinforms the regulator core about the hardware voltage.
Quoted 2 lines
arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v1-overlay-nxp-adv7533-hdmi.dtso new file +2
-0+ regulator-name = "ADV-1V8"; + };
[ ... ]
arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v1-overlay-nxp-adv7533-hdmi.dtso line 54
Quoted 11 lines
+&i2c3 {
arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v1-overlay-nxp-adv7533-hdmi.dtso new file +10
-0+ #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + hdmi-transmitter@3d { + compatible = "adi,adv7535"; + reg = <0x3d>, <0x3e>, <0x3c>, <0x3f>; + reg-names = "main", "edid", "cec", "packet"; + a2vdd-supply = <®_adv_1v8>; + adi,dsi-lanes = <4>;
^^^^^^^^^^^^^^^^^^^
[Severity: Medium]
Is there a missing clock reference for the CEC block? A cec_clock is defined earlier in the file but is not linked here.
Without clocks and clock-names properties linking to cec_clock, the DRM bridge core will fail to find it when calling devm_clk_get(dev, "cec"), which returns -ENOENT. This causes adv7511_cec_init() to abort, leaving CEC uninitialized.
Quoted 5 lines
arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v1-overlay-nxp-adv7533-hdmi.dtso new file +5
-0+ avdd-supply = <®_adv_1v8>; + dvdd-supply = <®_adv_1v8>; + pvdd-supply = <®_adv_1v8>; + v3p3-supply = <®_adv_3v3>; + status = "okay";
Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=1