FAILED: patch "[PATCH] perf/x86/intel: Remove anythread_deprecated bit from" failed to apply to 6.12-stable tree
Subsystems (3)
[email protected]
maintainerThe patch below does not apply to the 6.12-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.
To reproduce the conflict and resubmit, you may use the following commands:
git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-6.12.y
git checkout FETCH_HEAD
git cherry-pick -x 8767b4d73018bd3143f4c55b672064fad292f11b
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<[email protected]>' --in-reply-to '2026090959-treadmill-straddle-c245@gregkh' --subject-prefix 'PATCH 6.12.y' 'HEAD^..'
Possible dependencies:
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From 8767b4d73018bd3143f4c55b672064fad292f11b Mon Sep 17 00:00:00 2001
From: Dapeng Mi <[email protected]>
Date: Tue, 16 Jun 2026 12:46:47 +0800
Subject: [PATCH] perf/x86/intel: Remove anythread_deprecated bit from
perf_capabilities
AnyThread mode deprecation is enumerated by CPUID.0AH:EDX[15] instead of PERF_CAPABILITIES MSR. It's not a good practice to define a bit to represent "anythread deprecation" in perf_capabilities. It leads to the anythread_deprecated bit could be overwritten by the real value of PERF_CAPABILITIES MSR, just like the below code in update_pmu_cap() does.
if (!intel_pmu_broken_perf_cap()) {
/* Perf Metric (Bit 15) and PEBS via PT (Bit 16) are hybrid enumeration */
rdmsrq(MSR_IA32_PERF_CAPABILITIES, hybrid(pmu, intel_cap).capabilities);
}It leads to the anythread_deprecated bit is cleared to 0 and the "any" attribute is incorrectly shown in the /sys/devices/cpu/format/ folder on these support Perfmon v6 platforms, like Clearwater Forest.
$ grep . /sys/devices/cpu/format/* /sys/devices/cpu/format/acr_mask:config2:0-63 /sys/devices/cpu/format/any:config:21 /sys/devices/cpu/format/cmask:config:24-31
So remove the anythread_deprecated bit from perf_capabilities structure and directly depends on CPUID.0AH:EDX[15] to judge if anythread is deprecated.
arch/x86/events/intel/core.c +3 -7
@@ -7947,12 +7947,6 @@ __init int intel_pmu_init(void)x86_add_quirk (intel_arch_events_quirk);/* Install first, so it runs last */ -if (version >=5 ) { - x86_pmu.intel_cap.anythread_deprecated = edx.split.anythread_deprecated; -if (x86_pmu.intel_cap.anythread_deprecated) -pr_cont (" AnyThread deprecated, " ); - } -/* The perf side of core PMU is ready to support the mediated vPMU. */ x86_get_pmu (smp_processor_id ())->capabilities |=PERF_PMU_CAP_MEDIATED_VPMU ;
@@ -8829,8 +8823,10 @@ __init int intel_pmu_init(void) &x86_pmu.intel_ctrl);/* AnyThread may be deprecated on arch perfmon v5 or later */ -if (x86_pmu.intel_cap.anythread_deprecated) +if (version >=5 && edx.split.anythread_deprecated) { x86_pmu.format_attrs = intel_arch_formats_attr; +pr_cont ("AnyThread deprecated, " ); + }intel_pmu_check_event_constraints_all (NULL );
arch/x86/events/perf_event.h +1 -1
@@ -668,7 +668,7 @@ union perf_capabilities { u64 perf_metrics:1; u64 pebs_output_pt_available:1; u64 pebs_timing_info:1; - u64 anythread_deprecated:1; + u64 __reserved:1; u64 rdpmc_metrics_clear:1; };u64 capabilities;
Sasha Levin
maintainerPATCH 1/2 perf/aux: Allocate non-contiguous AUX pages by default
From: Yabin Cui <[email protected]>
[ Upstream commit 18049c8cff9cc89daadc4df6975f7d9069638926 ]
perf always allocates contiguous AUX pages based on aux_watermark. However, this contiguous allocation doesn't benefit all PMUs. For instance, ARM SPE and TRBE operate with virtual pages, and Coresight ETR allocates a separate buffer. For these PMUs, allocating contiguous AUX pages unnecessarily exacerbates memory fragmentation. This fragmentation can prevent their use on long-running devices.
This patch modifies the perf driver to be memory-friendly by default, by allocating non-contiguous AUX pages. For PMUs requiring contiguous pages (Intel BTS and some Intel PT), the existing PERF_PMU_CAP_AUX_NO_SG capability can be used. For PMUs that don't require but can benefit from contiguous pages (some Intel PT), a new capability, PERF_PMU_CAP_AUX_PREFER_LARGE, is added to maintain their existing behavior.
Stable-dep-of: 8767b4d73018 ("perf/x86/intel: Remove anythread_deprecated bit from perf_capabilities")
--- arch/x86/events/intel/pt.c | 2 ++ include/linux/perf_event.h | 1 + kernel/events/ring_buffer.c | 29 ++++++++++++++++++++--------- 3 files changed, 23 insertions(+), 9 deletions(-)
arch/x86/events/intel/pt.c +2 -0
@@ -1797,6 +1797,8 @@ static __init int pt_init(void)if (!intel_pt_validate_hw_cap (PT_CAP_topa_multiple_entries)) pt_pmu.pmu.capabilities =PERF_PMU_CAP_AUX_NO_SG ; +else + pt_pmu.pmu.capabilities =PERF_PMU_CAP_AUX_PREFER_LARGE ; pt_pmu.pmu.capabilities |=PERF_PMU_CAP_EXCLUSIVE |PERF_PMU_CAP_ITRACE ; pt_pmu.pmu.attr_groups = pt_attr_groups;
include/linux/perf_event.h +1 -0
@@ -301,6 +301,7 @@ struct perf_event_pmu_context;#define PERF_PMU_CAP_AUX_OUTPUT 0x0080#define PERF_PMU_CAP_EXTENDED_HW_TYPE 0x0100#define PERF_PMU_CAP_AUX_PAUSE 0x0200 +#define PERF_PMU_CAP_AUX_PREFER_LARGE 0x0400/** * pmu::scope
kernel/events/ring_buffer.c +20 -9
@@ -680,7 +680,15 @@ int rb_alloc_aux(struct perf_buffer *rb, struct perf_event *event, {bool overwrite = !(flags &RING_BUFFER_WRITABLE );int node = (event->cpu ==-1 ) ?-1 :cpu_to_node (event->cpu); -int ret = -ENOMEM , max_order; +bool use_contiguous_pages = event->pmu->capabilities & ( +PERF_PMU_CAP_AUX_NO_SG |PERF_PMU_CAP_AUX_PREFER_LARGE ); +/* +* Initialize max_order to 0 for page allocation. This allocates single +* pages to minimize memory fragmentation. This is overridden if the +* PMU needs or prefers contiguous pages (use_contiguous_pages = true). +*/ +int max_order =0 ; +int ret = -ENOMEM ;if (!has_aux (event))return -EOPNOTSUPP ;
@@ -690,8 +698,8 @@ int rb_alloc_aux(struct perf_buffer *rb, struct perf_event *event,if (!overwrite) {/* -* Watermark defaults to half the buffer, and so does the -* max_order, to aid PMU drivers in double buffering. +* Watermark defaults to half the buffer, to aid PMU drivers +* in double buffering. */ if (!watermark) watermark = min_t(unsigned long,
@@ -699,16 +707,19 @@ int rb_alloc_aux(struct perf_buffer *rb, struct perf_event *event, (unsigned long)nr_pages << (PAGE_SHIFT - 1));/* -* Use aux_watermark as the basis for chunking to -* help PMU drivers honor the watermark. +* If using contiguous pages, use aux_watermark as the basis +* for chunking to help PMU drivers honor the watermark. */ - max_order =get_order (watermark); +if (use_contiguous_pages) + max_order =get_order (watermark); }else {/* -* We need to start with the max_order that fits in nr_pages, -* not the other way around, hence ilog2() and not get_order. +* If using contiguous pages, we need to start with the +* max_order that fits in nr_pages, not the other way around, +* hence ilog2() and not get_order. */ - max_order =ilog2 (nr_pages); +if (use_contiguous_pages) + max_order =ilog2 (nr_pages); watermark =0 ; }
Signature · 1 line
2.53.0
Sasha Levin
maintainerPATCH 2/2 perf/x86/intel: Remove anythread_deprecated bit from perf_capabilities
From: Dapeng Mi <[email protected]>
[ Upstream commit 8767b4d73018bd3143f4c55b672064fad292f11b ]
AnyThread mode deprecation is enumerated by CPUID.0AH:EDX[15] instead of PERF_CAPABILITIES MSR. It's not a good practice to define a bit to represent "anythread deprecation" in perf_capabilities. It leads to the anythread_deprecated bit could be overwritten by the real value of PERF_CAPABILITIES MSR, just like the below code in update_pmu_cap() does.
if (!intel_pmu_broken_perf_cap()) {
/* Perf Metric (Bit 15) and PEBS via PT (Bit 16) are hybrid enumeration */
rdmsrq(MSR_IA32_PERF_CAPABILITIES, hybrid(pmu, intel_cap).capabilities);
}It leads to the anythread_deprecated bit is cleared to 0 and the "any" attribute is incorrectly shown in the /sys/devices/cpu/format/ folder on these support Perfmon v6 platforms, like Clearwater Forest.
$ grep . /sys/devices/cpu/format/* /sys/devices/cpu/format/acr_mask:config2:0-63 /sys/devices/cpu/format/any:config:21 /sys/devices/cpu/format/cmask:config:24-31
So remove the anythread_deprecated bit from perf_capabilities structure and directly depends on CPUID.0AH:EDX[15] to judge if anythread is deprecated.
--- arch/x86/events/intel/core.c | 10 +++------- arch/x86/events/perf_event.h | 2 +- 2 files changed, 4 insertions(+), 8 deletions(-)
arch/x86/events/intel/core.c +3 -7
@@ -6538,12 +6538,6 @@ __init int intel_pmu_init(void)x86_add_quirk (intel_arch_events_quirk);/* Install first, so it runs last */ -if (version >=5 ) { - x86_pmu.intel_cap.anythread_deprecated = edx.split.anythread_deprecated; -if (x86_pmu.intel_cap.anythread_deprecated) -pr_cont (" AnyThread deprecated, " ); - } -/* * Install the hw-cache-events table: */
@@ -7271,8 +7265,10 @@ __init int intel_pmu_init(void) &x86_pmu.intel_ctrl);/* AnyThread may be deprecated on arch perfmon v5 or later */ -if (x86_pmu.intel_cap.anythread_deprecated) +if (version >=5 && edx.split.anythread_deprecated) { x86_pmu.format_attrs = intel_arch_formats_attr; +pr_cont ("AnyThread deprecated, " ); + } intel_pmu_check_event_constraints(x86_pmu.event_constraints, x86_pmu.cntr_mask64,
arch/x86/events/perf_event.h +1 -1
@@ -630,7 +630,7 @@ union perf_capabilities { u64 perf_metrics:1; u64 pebs_output_pt_available:1; u64 pebs_timing_info:1; - u64 anythread_deprecated:1; + u64 __reserved:1; };u64 capabilities; };
Signature · 1 line
2.53.0