Skip to contentSkip to conversation

FAILED: patch "[PATCH] drm/amdgpu: skip the VMID 0 flush for VRAM" failed to apply to 6.18-stable tree

PATCH In review [email protected] 4 participants 7 messages Sep 16 – Sep 17

Subsystems (3)
lore
Share & tools
lore

[email protected]

author maintainer
#0 lore raw

The patch below does not apply to the 6.18-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.

To reproduce the conflict and resubmit, you may use the following commands:

git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-6.18.y
git checkout FETCH_HEAD
git cherry-pick -x 87ceb8cba73d0b3c4025ff42495bccd8164acaed
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<[email protected]>' --in-reply-to '2026091636-creole-glorified-e7b6@gregkh' --subject-prefix 'PATCH 6.18.y' 'HEAD^..'

Possible dependencies:

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

From 87ceb8cba73d0b3c4025ff42495bccd8164acaed Mon Sep 17 00:00:00 2001
From: Arunpravin Paneer Selvam <[email protected]>
Date: Wed, 2 Sep 2026 18:33:48 +0530
Subject: [PATCH] drm/amdgpu: skip the VMID 0 flush for VRAM
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Clear-on-release only runs on VRAM, which amdgpu_ttm_map_buffer() reaches via its direct MC address without programming a GART window, yet the wipe still forces a VMID 0 flush. On GFX11 (e.g. Navi33) that spurious SDMA flush can wedge the engine; only flush when a GART window is actually used.

v2: Let amdgpu_ttm_map_buffer() return whether the VMID 0 flush is needed,
and drive the clear and copy paths from that. (Christian)
v3: Make the vm_needs_flush output parameter mandatory instead of
allowing NULL. (Christian)

Fixes a68c7eaa7a8f ("drm/amdgpu: Enable clear page functionality")
Cc Christian König <[email protected]>
(cherry picked from commit a306e406e570b74318ff7d80e5b07b540ca1d3a9)
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +14 -6
index 05abf4c31dce..016957cac1f2 100644
@@ -191,6 +191,8 @@ amdgpu_ttm_job_submit(struct amdgpu_device *adev, struct amdgpu_ttm_buffer_entit
  * @tmz: if we should setup a TMZ enabled mapping
  * @size: in number of bytes to map, out number of bytes mapped
  * @addr: resulting address inside the MC address space
+ * @vm_needs_flush: out, set true if a GART window was programmed (VMID 0 flush
+ *		    needed) or false for a direct address
  *
  * Setup one of the GART windows to access a specific piece of memory or return
  * the physical address for local memory.
@@ -200,7 +202,8 @@ static int amdgpu_ttm_map_buffer(struct amdgpu_ttm_buffer_entity *entity,
 				 struct ttm_resource *mem,
 				 struct amdgpu_res_cursor *mm_cur,
 				 unsigned int window,
-				 bool tmz, uint64_t *size, uint64_t *addr)
+				 bool tmz, uint64_t *size, uint64_t *addr,
+				 bool *vm_needs_flush)
 {
 	struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev);
 	unsigned int offset, num_pages, num_dw, num_bytes;
@@ -221,9 +224,12 @@ static int amdgpu_ttm_map_buffer(struct amdgpu_ttm_buffer_entity *entity,
 	if (!tmz && mem->start != AMDGPU_BO_INVALID_OFFSET) {
 		*addr = amdgpu_ttm_domain_start(adev, mem->mem_type) +
 			mm_cur->start;
+		*vm_needs_flush = false;
 		return 0;
 	}
 
+	/* A GART window is programmed below, so its VMID 0 TLB needs a flush */
+	*vm_needs_flush = true;
 
 	/*
 	 * If start begins at an offset inside the page, then adjust the size
@@ -324,6 +330,7 @@ static int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
 	while (src_mm.remaining) {
 		uint64_t from, to, cur_size, tiling_flags;
 		uint32_t num_type, data_format, max_com, write_compress_disable;
+		bool src_vm_flush, dst_vm_flush;
 		struct dma_fence *next;
 
 		/* Never copy more than 256MiB at once to avoid a timeout */
@@ -331,12 +338,12 @@ static int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
 
 		/* Map src to window 0 and dst to window 1. */
 		r = amdgpu_ttm_map_buffer(entity, src->bo, src->mem, &src_mm,
-					  0, tmz, &cur_size, &from);
+					  0, tmz, &cur_size, &from, &src_vm_flush);
 		if (r)
 			goto error;
 
 		r = amdgpu_ttm_map_buffer(entity, dst->bo, dst->mem, &dst_mm,
-					  1, tmz, &cur_size, &to);
+					  1, tmz, &cur_size, &to, &dst_vm_flush);
 		if (r)
 			goto error;
 
@@ -364,7 +371,7 @@ static int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
 		}
 
 		r = amdgpu_copy_buffer(adev, entity, from, to, cur_size, resv,
-				       &next, true, copy_flags);
+				       &next, src_vm_flush || dst_vm_flush, copy_flags);
 		if (r)
 			goto error;
 
@@ -2624,6 +2631,7 @@ int amdgpu_ttm_clear_buffer(struct amdgpu_ttm_buffer_entity *entity,
 	struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
 	struct dma_fence *fence = NULL;
 	struct amdgpu_res_cursor dst;
+	bool vm_needs_flush = false;
 	int r;
 
 	if (!entity)
@@ -2645,13 +2653,13 @@ int amdgpu_ttm_clear_buffer(struct amdgpu_ttm_buffer_entity *entity,
 		cur_size = min(dst.size, 256ULL << 20);
 
 		r = amdgpu_ttm_map_buffer(entity, &bo->tbo, bo->tbo.resource, &dst,
-					  0, false, &cur_size, &to);
+					  0, false, &cur_size, &to, &vm_needs_flush);
 		if (r)
 			goto error;
 
 		r = amdgpu_ttm_fill_mem(adev, entity,
 					0, to, cur_size, resv,
-					&next, true, k_job_id);
+					&next, vm_needs_flush, k_job_id);
 		if (r)
 			goto error;
 
maintainer
#1 lore raw

PATCH 1/3 drm/amdgpu: get rid of amdgpu_ttm_clear_buffer

From: Pierre-Eric Pelloux-Prayer <[email protected]>

[ Upstream commit 23bd7e67961ee531386246e98021273bb45b0a84 ]

It's doing the same thing as amdgpu_fill_buffer(src_data=0), so drop it.

The only caveat is that amdgpu_res_cleared() return value is only valid right after allocation.

---
v2: introduce new "bool consider_clear_status" arg
v6: dont pass a NULL resv when calling amdgpu_fill_buffer from
amdgpu_bo_create
---

Stable adaptation for 6.18:

Consolidate allocation clearing and VRAM wiping in amdgpu_fill_buffer, using the existing high_pr/low_pr drm_sched_entity objects and shared GART-window mutex. The upstream buffer-entity infrastructure is absent. Preserve the existing scheduling priorities and reservation dependencies, only skip cleared regions immediately after allocation, and handle a successful no-job clear with a NULL fence and an initialized return code.

To prepare the unchanged VMID-flush fix in 87ceb8cba73d, pass these existing entities explicitly through the map/copy/fill helpers. Remove the unused direct-submit option (all callers passed false), update the benchmark and KFD callers, and specialize the fill entry point to zero, its only use. Use GART window 0 for clearing, matching the target's context. No functions or dynamic buffer-entity infrastructure are added; the VMID-flush behavior itself is left for the target commit.

Stable-dep-of: 87ceb8cba73d ("drm/amdgpu: skip the VMID 0 flush for VRAM")

---
 drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c |   6 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c    |  15 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c       | 189 +++++++-----------
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h       |  21 +-
 drivers/gpu/drm/amd/amdkfd/kfd_migrate.c      |   5 +-
 5 files changed, 93 insertions(+), 143 deletions(-)
drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c +3 -3
index 199693369c7ce..81d0e16fd1fe4 100644
@@ -37,9 +37,9 @@ static int amdgpu_benchmark_do_move(struct amdgpu_device *adev, unsigned size,
 
 	stime = ktime_get();
 	for (i = 0; i < n; i++) {
-		struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring;
-		r = amdgpu_copy_buffer(ring, saddr, daddr, size, NULL, &fence,
-				       false, false, 0);
+		r = amdgpu_copy_buffer(adev, &adev->mman.high_pr,
+				       saddr, daddr, size, NULL, &fence,
+				       false, 0);
 		if (r)
 			goto exit_do_move;
 		r = dma_fence_wait(fence, false);
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +10 -5
index cdab2c098cfab..e29bcb090f06d 100644
@@ -728,13 +728,17 @@ int amdgpu_bo_create(struct amdgpu_device *adev,
 	    bo->tbo.resource->mem_type == TTM_PL_VRAM) {
 		struct dma_fence *fence;
 
-		r = amdgpu_ttm_clear_buffer(bo, bo->tbo.base.resv, &fence);
+		r = amdgpu_fill_buffer(&adev->mman.low_pr, bo,
+				       bo->tbo.base.resv, &fence, true,
+				       AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER);
 		if (unlikely(r))
 			goto fail_unreserve;
 
-		dma_resv_add_fence(bo->tbo.base.resv, fence,
-				   DMA_RESV_USAGE_KERNEL);
-		dma_fence_put(fence);
+		if (fence) {
+			dma_resv_add_fence(bo->tbo.base.resv, fence,
+					   DMA_RESV_USAGE_KERNEL);
+			dma_fence_put(fence);
+		}
 	}
 	if (!bp->resv)
 		amdgpu_bo_unreserve(bo);
@@ -1324,7 +1328,8 @@ void amdgpu_bo_release_notify(struct ttm_buffer_object *bo)
 	if (r)
 		goto out;
 
-	r = amdgpu_fill_buffer(abo, 0, &bo->base._resv, &fence, true,
+	r = amdgpu_fill_buffer(&adev->mman.low_pr, abo,
+			       &bo->base._resv, &fence, false,
 			       AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE);
 	if (WARN_ON(r))
 		goto out;
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +67 -122

333 lines not on this page · raw message

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h +10 -11
index 0be2728aa8729..fc5133af30485 100644
@@ -165,10 +165,12 @@ int amdgpu_ttm_init(struct amdgpu_device *adev);
 void amdgpu_ttm_fini(struct amdgpu_device *adev);
 void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev,
 					bool enable);
-int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,
+int amdgpu_copy_buffer(struct amdgpu_device *adev,
+		       struct drm_sched_entity *entity,
+		       uint64_t src_offset,
 		       uint64_t dst_offset, uint32_t byte_count,
 		       struct dma_resv *resv,
-		       struct dma_fence **fence, bool direct_submit,
+		       struct dma_fence **fence,
 		       bool vm_needs_flush, uint32_t copy_flags);
 int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
 			       const struct amdgpu_copy_mem *src,
@@ -176,15 +178,12 @@ int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
 			       uint64_t size, bool tmz,
 			       struct dma_resv *resv,
 			       struct dma_fence **f);
-int amdgpu_ttm_clear_buffer(struct amdgpu_bo *bo,
-			    struct dma_resv *resv,
-			    struct dma_fence **fence);
-int amdgpu_fill_buffer(struct amdgpu_bo *bo,
-			uint32_t src_data,
-			struct dma_resv *resv,
-			struct dma_fence **fence,
-			bool delayed,
-			u64 k_job_id);
+int amdgpu_fill_buffer(struct drm_sched_entity *entity,
+		       struct amdgpu_bo *bo,
+		       struct dma_resv *resv,
+		       struct dma_fence **out_fence,
+		       bool consider_clear_status,
+		       u64 k_job_id);
 
 int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo);
 void amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo);
drivers/gpu/drm/amd/amdkfd/kfd_migrate.c +3 -2
index c47c9bda51f64..87d51e80df20f 100644
@@ -153,8 +153,9 @@ svm_migrate_copy_memory_gart(struct amdgpu_device *adev, dma_addr_t *sys,
 			goto out_unlock;
 		}
 
-		r = amdgpu_copy_buffer(ring, gart_s, gart_d, size * PAGE_SIZE,
-				       NULL, &next, false, true, 0);
+		r = amdgpu_copy_buffer(adev, &adev->mman.high_pr,
+				       gart_s, gart_d, size * PAGE_SIZE,
+				       NULL, &next, true, 0);
 		if (r) {
 			dev_err(adev->dev, "fail %d to copy memory\n", r);
 			goto out_unlock;
Signature · 1 line
2.53.0
maintainer
#2 lore raw

PATCH 2/3 drm/amdgpu: rename amdgpu_fill_buffer as amdgpu_ttm_clear_buffer

From: Pierre-Eric Pelloux-Prayer <[email protected]>

[ Upstream commit 5bd8aab55bc18a744577bff79a8c58b031e3c05d ]

This is the only use case for this function.

---
v2: amdgpu_ttm_clear_buffer instead of amdgpu_clear_buffer
---

Stable adaptation for 6.18:

The preceding stable dependency already specialized amdgpu_fill_buffer for zeroing and removed its src_data argument. Retain that adaptation and limit this dependency to renaming the existing helper, its declaration, its kernel-doc heading, and all three callers.

Keep the existing drm_sched_entity type, high_pr/low_pr selection, shared GART-window locking, reservation dependencies, and no-job return handling. The upstream amdgpu_ttm_buffer_entity infrastructure and next-clear-entity helper are absent from this stable tree and are not needed for the rename. No functions are added. The VMID-flush changes remain in the target commit, whose unchanged patch applies cleanly after this dependency.

Stable-dep-of: 87ceb8cba73d ("drm/amdgpu: skip the VMID 0 flush for VRAM")

---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 12 ++++++------
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c    | 18 +++++++++---------
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h    | 12 ++++++------
 3 files changed, 21 insertions(+), 21 deletions(-)
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +6 -6
index e29bcb090f06d..4def8b6640891 100644
@@ -728,9 +728,9 @@ int amdgpu_bo_create(struct amdgpu_device *adev,
 	    bo->tbo.resource->mem_type == TTM_PL_VRAM) {
 		struct dma_fence *fence;
 
-		r = amdgpu_fill_buffer(&adev->mman.low_pr, bo,
-				       bo->tbo.base.resv, &fence, true,
-				       AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER);
+		r = amdgpu_ttm_clear_buffer(&adev->mman.low_pr, bo,
+					    bo->tbo.base.resv, &fence, true,
+					    AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER);
 		if (unlikely(r))
 			goto fail_unreserve;
 
@@ -1328,9 +1328,9 @@ void amdgpu_bo_release_notify(struct ttm_buffer_object *bo)
 	if (r)
 		goto out;
 
-	r = amdgpu_fill_buffer(&adev->mman.low_pr, abo,
-			       &bo->base._resv, &fence, false,
-			       AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE);
+	r = amdgpu_ttm_clear_buffer(&adev->mman.low_pr, abo,
+				    &bo->base._resv, &fence, false,
+				    AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE);
 	if (WARN_ON(r))
 		goto out;
 
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +9 -9
index dbaba8aacec27..8a433a0920e74 100644
@@ -412,8 +412,8 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,
 	    (abo->flags & AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE)) {
 		struct dma_fence *wipe_fence = NULL;
 
-		r = amdgpu_fill_buffer(&adev->mman.high_pr, abo, NULL, &wipe_fence,
-				       false, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT);
+		r = amdgpu_ttm_clear_buffer(&adev->mman.high_pr, abo, NULL, &wipe_fence,
+					    false, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT);
 		if (r) {
 			goto error;
 		} else if (wipe_fence) {
@@ -2394,7 +2394,7 @@ static int amdgpu_ttm_fill_mem(struct amdgpu_device *adev,
 }
 
 /**
- * amdgpu_fill_buffer - fill a buffer with 0
+ * amdgpu_ttm_clear_buffer - fill a buffer with 0
  * @entity: scheduler entity to use
  * @bo: the bo to fill
  * @resv: fences contained in this reservation will be used as dependencies.
@@ -2404,12 +2404,12 @@ static int amdgpu_ttm_fill_mem(struct amdgpu_device *adev,
  *                         after allocation.
  * @k_job_id: trace id
  */
-int amdgpu_fill_buffer(struct drm_sched_entity *entity,
-		       struct amdgpu_bo *bo,
-		       struct dma_resv *resv,
-		       struct dma_fence **out_fence,
-		       bool consider_clear_status,
-		       u64 k_job_id)
+int amdgpu_ttm_clear_buffer(struct drm_sched_entity *entity,
+			    struct amdgpu_bo *bo,
+			    struct dma_resv *resv,
+			    struct dma_fence **out_fence,
+			    bool consider_clear_status,
+			    u64 k_job_id)
 {
 	struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
 	struct dma_fence *fence = NULL;
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h +6 -6
index fc5133af30485..c5f7efd78409a 100644
@@ -178,12 +178,12 @@ int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
 			       uint64_t size, bool tmz,
 			       struct dma_resv *resv,
 			       struct dma_fence **f);
-int amdgpu_fill_buffer(struct drm_sched_entity *entity,
-		       struct amdgpu_bo *bo,
-		       struct dma_resv *resv,
-		       struct dma_fence **out_fence,
-		       bool consider_clear_status,
-		       u64 k_job_id);
+int amdgpu_ttm_clear_buffer(struct drm_sched_entity *entity,
+			    struct amdgpu_bo *bo,
+			    struct dma_resv *resv,
+			    struct dma_fence **out_fence,
+			    bool consider_clear_status,
+			    u64 k_job_id);
 
 int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo);
 void amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo);
Signature · 1 line
2.53.0
maintainer
#3 lore raw

Re: [PATCH 6.18.y 2/3] drm/amdgpu: rename amdgpu_fill_buffer as amdgpu_ttm_clear_buffer

Quoted 21 lines · Sasha Levin

From: Pierre-Eric Pelloux-Prayer <[email protected]>

[ Upstream commit 5bd8aab55bc18a744577bff79a8c58b031e3c05d ]

This is the only use case for this function.

---
v2: amdgpu_ttm_clear_buffer instead of amdgpu_clear_buffer
---

Stable adaptation for 6.18:

The preceding stable dependency already specialized amdgpu_fill_buffer for zeroing and removed its src_data argument. Retain that adaptation and limit this dependency to renaming the existing helper, its declaration, its kernel-doc heading, and all three callers.

Quoted 6 lines

Keep the existing drm_sched_entity type, high_pr/low_pr selection, shared GART-window locking, reservation dependencies, and no-job return handling. The upstream amdgpu_ttm_buffer_entity infrastructure and next-clear-entity helper are absent from this stable tree and are not needed for the rename. No functions are added. The VMID-flush changes remain in the target commit, whose unchanged patch applies cleanly after this dependency.

Oh, that patch was never meant to be back ported but I see why it is necessary.

Quoted 1 line

Stable-dep-of: 87ceb8cba73d ("drm/amdgpu: skip the VMID 0 flush for VRAM")

@Arun can you guys take a closer look if that is a good idea or not or?

Could be that "drm/amdgpu: skip the VMID 0 flush for VRAM" doesn't even needs to be back ported to kernel 6.18.

Essentially it shouldn't be necessary and is just a workaround for buggy HW which surfaced because of clear tracking.

Regards,
Christian.

Quoted 103 lines
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 12 ++++++------
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c    | 18 +++++++++---------
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h    | 12 ++++++------
 3 files changed, 21 insertions(+), 21 deletions(-)
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +6 -6
index e29bcb090f06d..4def8b6640891 100644
@@ -728,9 +728,9 @@ int amdgpu_bo_create(struct amdgpu_device *adev,
 	    bo->tbo.resource->mem_type == TTM_PL_VRAM) {
 		struct dma_fence *fence;
 
-		r = amdgpu_fill_buffer(&adev->mman.low_pr, bo,
-				       bo->tbo.base.resv, &fence, true,
-				       AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER);
+		r = amdgpu_ttm_clear_buffer(&adev->mman.low_pr, bo,
+					    bo->tbo.base.resv, &fence, true,
+					    AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER);
 		if (unlikely(r))
 			goto fail_unreserve;
 
@@ -1328,9 +1328,9 @@ void amdgpu_bo_release_notify(struct ttm_buffer_object *bo)
 	if (r)
 		goto out;
 
-	r = amdgpu_fill_buffer(&adev->mman.low_pr, abo,
-			       &bo->base._resv, &fence, false,
-			       AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE);
+	r = amdgpu_ttm_clear_buffer(&adev->mman.low_pr, abo,
+				    &bo->base._resv, &fence, false,
+				    AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE);
 	if (WARN_ON(r))
 		goto out;
 
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +9 -9
index dbaba8aacec27..8a433a0920e74 100644
@@ -412,8 +412,8 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,
 	    (abo->flags & AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE)) {
 		struct dma_fence *wipe_fence = NULL;
 
-		r = amdgpu_fill_buffer(&adev->mman.high_pr, abo, NULL, &wipe_fence,
-				       false, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT);
+		r = amdgpu_ttm_clear_buffer(&adev->mman.high_pr, abo, NULL, &wipe_fence,
+					    false, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT);
 		if (r) {
 			goto error;
 		} else if (wipe_fence) {
@@ -2394,7 +2394,7 @@ static int amdgpu_ttm_fill_mem(struct amdgpu_device *adev,
 }
 
 /**
- * amdgpu_fill_buffer - fill a buffer with 0
+ * amdgpu_ttm_clear_buffer - fill a buffer with 0
  * @entity: scheduler entity to use
  * @bo: the bo to fill
  * @resv: fences contained in this reservation will be used as dependencies.
@@ -2404,12 +2404,12 @@ static int amdgpu_ttm_fill_mem(struct amdgpu_device *adev,
  *                         after allocation.
  * @k_job_id: trace id
  */
-int amdgpu_fill_buffer(struct drm_sched_entity *entity,
-		       struct amdgpu_bo *bo,
-		       struct dma_resv *resv,
-		       struct dma_fence **out_fence,
-		       bool consider_clear_status,
-		       u64 k_job_id)
+int amdgpu_ttm_clear_buffer(struct drm_sched_entity *entity,
+			    struct amdgpu_bo *bo,
+			    struct dma_resv *resv,
+			    struct dma_fence **out_fence,
+			    bool consider_clear_status,
+			    u64 k_job_id)
 {
 	struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
 	struct dma_fence *fence = NULL;
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h +6 -6
index fc5133af30485..c5f7efd78409a 100644
@@ -178,12 +178,12 @@ int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
 			       uint64_t size, bool tmz,
 			       struct dma_resv *resv,
 			       struct dma_fence **f);
-int amdgpu_fill_buffer(struct drm_sched_entity *entity,
-		       struct amdgpu_bo *bo,
-		       struct dma_resv *resv,
-		       struct dma_fence **out_fence,
-		       bool consider_clear_status,
-		       u64 k_job_id);
+int amdgpu_ttm_clear_buffer(struct drm_sched_entity *entity,
+			    struct amdgpu_bo *bo,
+			    struct dma_resv *resv,
+			    struct dma_fence **out_fence,
+			    bool consider_clear_status,
+			    u64 k_job_id);
 
 int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo);
 void amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo);
#4 lore raw

Re: [PATCH 6.18.y 2/3] drm/amdgpu: rename amdgpu_fill_buffer as amdgpu_ttm_clear_buffer

Quoted 31 lines · Christian König
Quoted 21 lines · Sasha Levin

From: Pierre-Eric Pelloux-Prayer <[email protected]>

[ Upstream commit 5bd8aab55bc18a744577bff79a8c58b031e3c05d ]

This is the only use case for this function.

---
v2: amdgpu_ttm_clear_buffer instead of amdgpu_clear_buffer
---

Stable adaptation for 6.18:

The preceding stable dependency already specialized amdgpu_fill_buffer for zeroing and removed its src_data argument. Retain that adaptation and limit this dependency to renaming the existing helper, its declaration, its kernel-doc heading, and all three callers.

Quoted 6 lines

Keep the existing drm_sched_entity type, high_pr/low_pr selection, shared GART-window locking, reservation dependencies, and no-job return handling. The upstream amdgpu_ttm_buffer_entity infrastructure and next-clear-entity helper are absent from this stable tree and are not needed for the rename. No functions are added. The VMID-flush changes remain in the target commit, whose unchanged patch applies cleanly after this dependency.

Oh, that patch was never meant to be back ported but I see why it is necessary.

Quoted 1 line

Stable-dep-of: 87ceb8cba73d ("drm/amdgpu: skip the VMID 0 flush for VRAM")

Quoted 8 lines

@Arun can you guys take a closer look if that is a good idea or not or?

Could be that "drm/amdgpu: skip the VMID 0 flush for VRAM" doesn't even needs to be back ported to kernel 6.18.

Essentially it shouldn't be necessary and is just a workaround for buggy HW which surfaced because of clear tracking.

Regards,
Christian.

Hi Christian,

I will verify whether the VMID 0 flush issue is reproducible on 6.18 and whether the workaround is actually needed in that stable branch.

Regards,
Arun

Quoted 104 lines
Quoted 104 lines
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 12 ++++++------
  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c    | 18 +++++++++---------
  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h    | 12 ++++++------
  3 files changed, 21 insertions(+), 21 deletions(-)
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +6 -6
index e29bcb090f06d..4def8b6640891 100644
@@ -728,9 +728,9 @@ int amdgpu_bo_create(struct amdgpu_device *adev,
  	    bo->tbo.resource->mem_type == TTM_PL_VRAM) {
  		struct dma_fence *fence;
 
-		r = amdgpu_fill_buffer(&adev->mman.low_pr, bo,
-				       bo->tbo.base.resv, &fence, true,
-				       AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER);
+		r = amdgpu_ttm_clear_buffer(&adev->mman.low_pr, bo,
+					    bo->tbo.base.resv, &fence, true,
+					    AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER);
  		if (unlikely(r))
  			goto fail_unreserve;
 
@@ -1328,9 +1328,9 @@ void amdgpu_bo_release_notify(struct ttm_buffer_object *bo)
  	if (r)
  		goto out;
 
-	r = amdgpu_fill_buffer(&adev->mman.low_pr, abo,
-			       &bo->base._resv, &fence, false,
-			       AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE);
+	r = amdgpu_ttm_clear_buffer(&adev->mman.low_pr, abo,
+				    &bo->base._resv, &fence, false,
+				    AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE);
  	if (WARN_ON(r))
  		goto out;
 
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +9 -9
index dbaba8aacec27..8a433a0920e74 100644
@@ -412,8 +412,8 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,
  	    (abo->flags & AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE)) {
  		struct dma_fence *wipe_fence = NULL;
 
-		r = amdgpu_fill_buffer(&adev->mman.high_pr, abo, NULL, &wipe_fence,
-				       false, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT);
+		r = amdgpu_ttm_clear_buffer(&adev->mman.high_pr, abo, NULL, &wipe_fence,
+					    false, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT);
  		if (r) {
  			goto error;
  		} else if (wipe_fence) {
@@ -2394,7 +2394,7 @@ static int amdgpu_ttm_fill_mem(struct amdgpu_device *adev,
  }
 
  /**
- * amdgpu_fill_buffer - fill a buffer with 0
+ * amdgpu_ttm_clear_buffer - fill a buffer with 0
   * @entity: scheduler entity to use
   * @bo: the bo to fill
   * @resv: fences contained in this reservation will be used as dependencies.
@@ -2404,12 +2404,12 @@ static int amdgpu_ttm_fill_mem(struct amdgpu_device *adev,
   *                         after allocation.
   * @k_job_id: trace id
   */
-int amdgpu_fill_buffer(struct drm_sched_entity *entity,
-		       struct amdgpu_bo *bo,
-		       struct dma_resv *resv,
-		       struct dma_fence **out_fence,
-		       bool consider_clear_status,
-		       u64 k_job_id)
+int amdgpu_ttm_clear_buffer(struct drm_sched_entity *entity,
+			    struct amdgpu_bo *bo,
+			    struct dma_resv *resv,
+			    struct dma_fence **out_fence,
+			    bool consider_clear_status,
+			    u64 k_job_id)
  {
  	struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
  	struct dma_fence *fence = NULL;
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h +6 -6
index fc5133af30485..c5f7efd78409a 100644
@@ -178,12 +178,12 @@ int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
  			       uint64_t size, bool tmz,
  			       struct dma_resv *resv,
  			       struct dma_fence **f);
-int amdgpu_fill_buffer(struct drm_sched_entity *entity,
-		       struct amdgpu_bo *bo,
-		       struct dma_resv *resv,
-		       struct dma_fence **out_fence,
-		       bool consider_clear_status,
-		       u64 k_job_id);
+int amdgpu_ttm_clear_buffer(struct drm_sched_entity *entity,
+			    struct amdgpu_bo *bo,
+			    struct dma_resv *resv,
+			    struct dma_fence **out_fence,
+			    bool consider_clear_status,
+			    u64 k_job_id);
 
  int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo);
  void amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo);
#5 lore raw

Re: [PATCH 6.18.y 2/3] drm/amdgpu: rename amdgpu_fill_buffer as amdgpu_ttm_clear_buffer

In reply to Christian König
Quoted 28 lines · Christian König
Quoted 21 lines · Sasha Levin

From: Pierre-Eric Pelloux-Prayer <[email protected]>

[ Upstream commit 5bd8aab55bc18a744577bff79a8c58b031e3c05d ]

This is the only use case for this function.

---
v2: amdgpu_ttm_clear_buffer instead of amdgpu_clear_buffer
---

Stable adaptation for 6.18:

The preceding stable dependency already specialized amdgpu_fill_buffer for zeroing and removed its src_data argument. Retain that adaptation and limit this dependency to renaming the existing helper, its declaration, its kernel-doc heading, and all three callers.

Quoted 6 lines

Keep the existing drm_sched_entity type, high_pr/low_pr selection, shared GART-window locking, reservation dependencies, and no-job return handling. The upstream amdgpu_ttm_buffer_entity infrastructure and next-clear-entity helper are absent from this stable tree and are not needed for the rename. No functions are added. The VMID-flush changes remain in the target commit, whose unchanged patch applies cleanly after this dependency.

Quoted 8 lines

Oh, that patch was never meant to be back ported but I see why it is necessary.

Quoted 1 line

Stable-dep-of: 87ceb8cba73d ("drm/amdgpu: skip the VMID 0 flush for VRAM")

@Arun can you guys take a closer look if that is a good idea or not or?

Could be that "drm/amdgpu: skip the VMID 0 flush for VRAM" doesn't even needs to be back ported to kernel 6.18.

Essentially it shouldn't be necessary and is just a workaround for buggy HW which surfaced because of clear tracking.

Hi Christian,

I checked the 6.18 code and the clear-tracking path is present there, including the unconditional VMID 0 flush in the clear path.

Since this appears to be a workaround for the underlying HW issue that surfaced with clear tracking, and we are already working on the actual fix, I think we can skip this workaround for 6.18 as you suggested.

Regards,
Arun

Quoted 107 lines

Regards,
Christian.

Quoted 103 lines
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 12 ++++++------
  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c    | 18 +++++++++---------
  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h    | 12 ++++++------
  3 files changed, 21 insertions(+), 21 deletions(-)
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +6 -6
index e29bcb090f06d..4def8b6640891 100644
@@ -728,9 +728,9 @@ int amdgpu_bo_create(struct amdgpu_device *adev,
  	    bo->tbo.resource->mem_type == TTM_PL_VRAM) {
  		struct dma_fence *fence;
 
-		r = amdgpu_fill_buffer(&adev->mman.low_pr, bo,
-				       bo->tbo.base.resv, &fence, true,
-				       AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER);
+		r = amdgpu_ttm_clear_buffer(&adev->mman.low_pr, bo,
+					    bo->tbo.base.resv, &fence, true,
+					    AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER);
  		if (unlikely(r))
  			goto fail_unreserve;
 
@@ -1328,9 +1328,9 @@ void amdgpu_bo_release_notify(struct ttm_buffer_object *bo)
  	if (r)
  		goto out;
 
-	r = amdgpu_fill_buffer(&adev->mman.low_pr, abo,
-			       &bo->base._resv, &fence, false,
-			       AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE);
+	r = amdgpu_ttm_clear_buffer(&adev->mman.low_pr, abo,
+				    &bo->base._resv, &fence, false,
+				    AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE);
  	if (WARN_ON(r))
  		goto out;
 
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +9 -9
index dbaba8aacec27..8a433a0920e74 100644
@@ -412,8 +412,8 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,
  	    (abo->flags & AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE)) {
  		struct dma_fence *wipe_fence = NULL;
 
-		r = amdgpu_fill_buffer(&adev->mman.high_pr, abo, NULL, &wipe_fence,
-				       false, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT);
+		r = amdgpu_ttm_clear_buffer(&adev->mman.high_pr, abo, NULL, &wipe_fence,
+					    false, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT);
  		if (r) {
  			goto error;
  		} else if (wipe_fence) {
@@ -2394,7 +2394,7 @@ static int amdgpu_ttm_fill_mem(struct amdgpu_device *adev,
  }
 
  /**
- * amdgpu_fill_buffer - fill a buffer with 0
+ * amdgpu_ttm_clear_buffer - fill a buffer with 0
   * @entity: scheduler entity to use
   * @bo: the bo to fill
   * @resv: fences contained in this reservation will be used as dependencies.
@@ -2404,12 +2404,12 @@ static int amdgpu_ttm_fill_mem(struct amdgpu_device *adev,
   *                         after allocation.
   * @k_job_id: trace id
   */
-int amdgpu_fill_buffer(struct drm_sched_entity *entity,
-		       struct amdgpu_bo *bo,
-		       struct dma_resv *resv,
-		       struct dma_fence **out_fence,
-		       bool consider_clear_status,
-		       u64 k_job_id)
+int amdgpu_ttm_clear_buffer(struct drm_sched_entity *entity,
+			    struct amdgpu_bo *bo,
+			    struct dma_resv *resv,
+			    struct dma_fence **out_fence,
+			    bool consider_clear_status,
+			    u64 k_job_id)
  {
  	struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
  	struct dma_fence *fence = NULL;
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h +6 -6
index fc5133af30485..c5f7efd78409a 100644
@@ -178,12 +178,12 @@ int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
  			       uint64_t size, bool tmz,
  			       struct dma_resv *resv,
  			       struct dma_fence **f);
-int amdgpu_fill_buffer(struct drm_sched_entity *entity,
-		       struct amdgpu_bo *bo,
-		       struct dma_resv *resv,
-		       struct dma_fence **out_fence,
-		       bool consider_clear_status,
-		       u64 k_job_id);
+int amdgpu_ttm_clear_buffer(struct drm_sched_entity *entity,
+			    struct amdgpu_bo *bo,
+			    struct dma_resv *resv,
+			    struct dma_fence **out_fence,
+			    bool consider_clear_status,
+			    u64 k_job_id);
 
  int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo);
  void amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo);
maintainer
#6 lore raw

PATCH 3/3 drm/amdgpu: skip the VMID 0 flush for VRAM

In reply to Sasha Levin

From: Arunpravin Paneer Selvam <[email protected]>

[ Upstream commit 87ceb8cba73d0b3c4025ff42495bccd8164acaed ]

Clear-on-release only runs on VRAM, which amdgpu_ttm_map_buffer() reaches via its direct MC address without programming a GART window, yet the wipe still forces a VMID 0 flush. On GFX11 (e.g. Navi33) that spurious SDMA flush can wedge the engine; only flush when a GART window is actually used.

v2: Let amdgpu_ttm_map_buffer() return whether the VMID 0 flush is needed,
and drive the clear and copy paths from that. (Christian)
v3: Make the vm_needs_flush output parameter mandatory instead of
allowing NULL. (Christian)

Fixes a68c7eaa7a8f ("drm/amdgpu: Enable clear page functionality")
Cc Christian König <[email protected]>
(cherry picked from commit a306e406e570b74318ff7d80e5b07b540ca1d3a9)
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 20 ++++++++++++++------
 1 file changed, 14 insertions(+), 6 deletions(-)
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +14 -6
index 8a433a0920e74..38c219c36ce22 100644
@@ -175,6 +175,8 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
  * @tmz: if we should setup a TMZ enabled mapping
  * @size: in number of bytes to map, out number of bytes mapped
  * @addr: resulting address inside the MC address space
+ * @vm_needs_flush: out, set true if a GART window was programmed (VMID 0 flush
+ *		    needed) or false for a direct address
  *
  * Setup one of the GART windows to access a specific piece of memory or return
  * the physical address for local memory.
@@ -184,7 +186,8 @@ static int amdgpu_ttm_map_buffer(struct drm_sched_entity *entity,
 				 struct ttm_resource *mem,
 				 struct amdgpu_res_cursor *mm_cur,
 				 unsigned int window,
-				 bool tmz, uint64_t *size, uint64_t *addr)
+				 bool tmz, uint64_t *size, uint64_t *addr,
+				 bool *vm_needs_flush)
 {
 	struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev);
 	unsigned int offset, num_pages, num_dw, num_bytes;
@@ -206,9 +209,12 @@ static int amdgpu_ttm_map_buffer(struct drm_sched_entity *entity,
 	if (!tmz && mem->start != AMDGPU_BO_INVALID_OFFSET) {
 		*addr = amdgpu_ttm_domain_start(adev, mem->mem_type) +
 			mm_cur->start;
+		*vm_needs_flush = false;
 		return 0;
 	}
 
+	/* A GART window is programmed below, so its VMID 0 TLB needs a flush */
+	*vm_needs_flush = true;
 
 	/*
 	 * If start begins at an offset inside the page, then adjust the size
@@ -318,6 +324,7 @@ int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
 	while (src_mm.remaining) {
 		uint64_t from, to, cur_size, tiling_flags;
 		uint32_t num_type, data_format, max_com, write_compress_disable;
+		bool src_vm_flush, dst_vm_flush;
 		struct dma_fence *next;
 
 		/* Never copy more than 256MiB at once to avoid a timeout */
@@ -325,12 +332,12 @@ int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
 
 		/* Map src to window 0 and dst to window 1. */
 		r = amdgpu_ttm_map_buffer(entity, src->bo, src->mem, &src_mm,
-					  0, tmz, &cur_size, &from);
+					  0, tmz, &cur_size, &from, &src_vm_flush);
 		if (r)
 			goto error;
 
 		r = amdgpu_ttm_map_buffer(entity, dst->bo, dst->mem, &dst_mm,
-					  1, tmz, &cur_size, &to);
+					  1, tmz, &cur_size, &to, &dst_vm_flush);
 		if (r)
 			goto error;
 
@@ -358,7 +365,7 @@ int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
 		}
 
 		r = amdgpu_copy_buffer(adev, entity, from, to, cur_size, resv,
-				       &next, true, copy_flags);
+				       &next, src_vm_flush || dst_vm_flush, copy_flags);
 		if (r)
 			goto error;
 
@@ -2414,6 +2421,7 @@ int amdgpu_ttm_clear_buffer(struct drm_sched_entity *entity,
 	struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
 	struct dma_fence *fence = NULL;
 	struct amdgpu_res_cursor dst;
+	bool vm_needs_flush = false;
 	int r;
 
 	if (!entity)
@@ -2443,13 +2451,13 @@ int amdgpu_ttm_clear_buffer(struct drm_sched_entity *entity,
 		cur_size = min(dst.size, 256ULL << 20);
 
 		r = amdgpu_ttm_map_buffer(entity, &bo->tbo, bo->tbo.resource, &dst,
-					  0, false, &cur_size, &to);
+					  0, false, &cur_size, &to, &vm_needs_flush);
 		if (r)
 			goto error;
 
 		r = amdgpu_ttm_fill_mem(adev, entity,
 					0, to, cur_size, resv,
-					&next, true, k_job_id);
+					&next, vm_needs_flush, k_job_id);
 		if (r)
 			goto error;
 
Signature · 1 line
2.53.0