x86/fred: Reconstruct fault state for rejected INT instructions
Subsystems (5)
cover x86/fred: Reconstruct fault state for rejected INT instructions
This series reconstructs the #GP signal context for rejected INT instructions with FRED enabled. The incorrect error code and saved IP break Wine's handling of INT 0x2d, causing Elden Ring to fail with a spurious access violation on Panther Lake.
The software event flag handling follows the same reasoning as the existing sigreturn fix in prevent_single_step_upon_eretu(). The second patch adds 32-bit and 64-bit signal-context and ptrace resume coverage.
Both selftest variants pass all 29 checks on patched FRED-enabled Panther Lake and on a non-FRED AMD host. With the same binaries on unpatched Panther Lake, 16 signal-context checks and the first ptrace IP check fail. The two dependent ptrace resume checks are not reached.
Separate continuation testing with the fix matched an IDT baseline on another system in both bitnesses: unchanged IP retries the INT whether RF is set or clear, and advancing IP resumes at the next instruction.
One observed ptrace divergence remains separate: after rewriting IP at the stop from raise(SIGSTOP), PTRACE_SINGLESTEP traps before the target instruction on FRED, whereas IDT executes it. The selftest starts from an INT3 stop to isolate rejected-INT behavior. The syscall-stop case is a follow-up investigation outside this series.
Matthew Schwartz (2):
x86/fred: Reconstruct the #GP context for rejected INT instructions selftests/x86: Check signal state for rejected software interrupts
arch/x86/entry/entry_fred.c | 11 +- tools/testing/selftests/x86/Makefile | 2 +- tools/testing/selftests/x86/int_signal.c | 311 +++++++++++++++++++++++ 3 files changed, 322 insertions(+), 2 deletions(-) create mode 100644 tools/testing/selftests/x86/int_signal.c
base-commit: b5a051f6b840d48f159166ef073d3021989bfb50
Signature · 1 line
2.55.0
PATCH 1/2 x86/fred: Reconstruct the #GP context for rejected INT instructions
FRED event delivery does not use the IDT, so the gate DPL check that rejects a user INT n falls to software (Intel FRED specification [1], section 8.3). fred_intx() rejects the same vectors as IDT delivery, but reports a zero error code and the IP after the INT. This breaks the signal ABI. Wine uses the error code to recognize INT 0x2d, so the changed context turns a handled breakpoint into an access violation in Elden Ring.
Rewind IP using the instruction length in the augmented SS and synthesize the IDT selector error code, (vector << 3) | 2. Set RF in the saved flags, as the CPU does for a #GP fault. Section 5.2.1 defines the saved vector, instruction length and RF state. The supplied length handles prefixes without reading user memory. Limit the changes to already-rejected software interrupts, preserving the accepted INT3, INT4 and enabled INT80 paths and hardware exceptions. With IA32 emulation disabled, INT 0x80 now reports the same #GP as the DPL 0 gate IDT installs there. The rewound IP also stops fixup_iopl_exception() from inspecting the byte after the INT.
Also clear the software event flag. Section 6.2.3 specifies that ERETU with this flag and TF set traps before executing any user instruction. A tracer that suppresses SIGSEGV and resumes with TF set expects the next instruction to run first, as after IRET. The sigreturn path clears the same flag for this reason in prevent_single_step_upon_eretu().
[1] Intel Flexible Return and Event Delivery (FRED) Specification, revision 9.0 (346446-009US), sections 5.2.1, 6.2.3 and 8.3.
--- arch/x86/entry/entry_fred.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-)
arch/x86/entry/entry_fred.c +10 -1
@@ -10,6 +10,7 @@#include <asm/desc.h> #include <asm/fred.h> #include <asm/idtentry.h> +#include <asm/processor-flags.h> #include <asm/syscall.h> #include <asm/trapnr.h> #include <asm/traps.h>
@@ -71,7 +72,15 @@ static noinstr void fred_intx(struct pt_regs *regs)#endif default : -return exc_general_protection (regs,0 ); +/* +* Reconstruct the #GP fault state that IDT delivery would produce. +* Clear the software event flag so ERETU with TF set does not trap +* before the resumed instruction. See prevent_single_step_upon_eretu(). +*/ + regs->ip -= regs->fred_ss.insnlen; + regs->flags |=X86_EFLAGS_RF ; + regs->fred_ss.swevent =0 ; +return exc_general_protection (regs, (regs->fred_ss.vector <<3 ) |2 ); } }
Signature · 1 line
2.55.0
Re: [PATCH 1/2] x86/fred: Reconstruct the #GP context for rejected INT instructions
Quoted 28 lines · Matthew Schwartz
FRED event delivery does not use the IDT, so the gate DPL check that rejects a user INT n falls to software (Intel FRED specification [1], section 8.3).
fred_intx()rejects the same vectors as IDT delivery, but reports a zero error code and the IP after the INT. This breaks the signal ABI. Wine uses the error code to recognize INT0x2d, so the changed context turns a handled breakpoint into an access violation in Elden Ring.Rewind IP using the instruction length in the augmented SS and synthesize the IDT selector error code, (vector << 3) | 2. Set RF in the saved flags, as the CPU does for a #GP fault. Section 5.2.1 defines the saved vector, instruction length and RF state. The supplied length handles prefixes without reading user memory. Limit the changes to already-rejected software interrupts, preserving the accepted INT3, INT4 and enabled INT80 paths and hardware exceptions. With IA32 emulation disabled, INT
0x80now reports the same #GP as the DPL 0 gate IDT installs there. The rewound IP also stopsfixup_iopl_exception()from inspecting the byte after the INT.Also clear the software event flag. Section 6.2.3 specifies that ERETU with this flag and TF set traps before executing any user instruction. A tracer that suppresses SIGSEGV and resumes with TF set expects the next instruction to run first, as after IRET. The sigreturn path clears the same flag for this reason in
prevent_single_step_upon_eretu().[1] Intel Flexible Return and Event Delivery (FRED) Specification, revision 9.0 (346446-009US), sections 5.2.1, 6.2.3 and 8.3.
Quoted 6 lines
Fixes 14619d912b65 ("x86/fred: FRED entry/exit and dispatch code")Reported-by Paul Gofman <[email protected]>Signed-off-by Matthew Schwartz <[email protected]>
This really should go into -stable.
-hpa
Re: [PATCH 1/2] x86/fred: Reconstruct the #GP context for rejected INT instructions
Quoted 36 lines · H. Peter Anvin
Quoted 28 lines · Matthew Schwartz
FRED event delivery does not use the IDT, so the gate DPL check that rejects a user INT n falls to software (Intel FRED specification [1], section 8.3).
fred_intx()rejects the same vectors as IDT delivery, but reports a zero error code and the IP after the INT. This breaks the signal ABI. Wine uses the error code to recognize INT0x2d, so the changed context turns a handled breakpoint into an access violation in Elden Ring.Rewind IP using the instruction length in the augmented SS and synthesize the IDT selector error code, (vector << 3) | 2. Set RF in the saved flags, as the CPU does for a #GP fault. Section 5.2.1 defines the saved vector, instruction length and RF state. The supplied length handles prefixes without reading user memory. Limit the changes to already-rejected software interrupts, preserving the accepted INT3, INT4 and enabled INT80 paths and hardware exceptions. With IA32 emulation disabled, INT
0x80now reports the same #GP as the DPL 0 gate IDT installs there. The rewound IP also stopsfixup_iopl_exception()from inspecting the byte after the INT.Also clear the software event flag. Section 6.2.3 specifies that ERETU with this flag and TF set traps before executing any user instruction. A tracer that suppresses SIGSEGV and resumes with TF set expects the next instruction to run first, as after IRET. The sigreturn path clears the same flag for this reason in
prevent_single_step_upon_eretu().[1] Intel Flexible Return and Event Delivery (FRED) Specification, revision 9.0 (346446-009US), sections 5.2.1, 6.2.3 and 8.3.
Quoted 6 lines
Fixes 14619d912b65 ("x86/fred: FRED entry/exit and dispatch code")Reported-by Paul Gofman <[email protected]>Signed-off-by Matthew Schwartz <[email protected]>
Quoted 3 lines
Reviewed-by H. Peter Anvin <[email protected]>This really should go into -stable.
It has a Fixes tag, afaik they really good at picking those up. Let me go queue them in x86/urgent.
[tip: x86/urgent] x86/fred: Reconstruct the #GP context for rejected INT instructions
In reply to Matthew SchwartzThe following commit has been merged into the x86/urgent branch of tip:
The following commit has been merged into the x86/urgent branch of tip:
Commit-ID: 93f53499d0b945e8ae447f497faf743d60069f61 Gitweb: https://git.kernel.org/tip/93f53499d0b945e8ae447f497faf743d60069f61 Author: Matthew Schwartz <[email protected]> AuthorDate: Thu, 17 Sep 2026 16:09:06 -07:00 Committer: Peter Zijlstra <[email protected]> CommitterDate: Fri, 18 Sep 2026 12:33:17 +02:00
x86/fred: Reconstruct the #GP context for rejected INT instructions
FRED event delivery does not use the IDT, so the gate DPL check that rejects a user INT n falls to software (Intel FRED specification [1], section 8.3). fred_intx() rejects the same vectors as IDT delivery, but reports a zero error code and the IP after the INT. This breaks the signal ABI. Wine uses the error code to recognize INT 0x2d, so the changed context turns a handled breakpoint into an access violation in Elden Ring.
Rewind IP using the instruction length in the augmented SS and synthesize the IDT selector error code, (vector << 3) | 2. Set RF in the saved flags, as the CPU does for a #GP fault. Section 5.2.1 defines the saved vector, instruction length and RF state. The supplied length handles prefixes without reading user memory. Limit the changes to already-rejected software interrupts, preserving the accepted INT3, INT4 and enabled INT80 paths and hardware exceptions. With IA32 emulation disabled, INT 0x80 now reports the same #GP as the DPL 0 gate IDT installs there. The rewound IP also stops fixup_iopl_exception() from inspecting the byte after the INT.
Also clear the software event flag. Section 6.2.3 specifies that ERETU with this flag and TF set traps before executing any user instruction. A tracer that suppresses SIGSEGV and resumes with TF set expects the next instruction to run first, as after IRET. The sigreturn path clears the same flag for this reason in prevent_single_step_upon_eretu().
[1] Intel Flexible Return and Event Delivery (FRED) Specification, revision 9.0 (346446-009US), sections 5.2.1, 6.2.3 and 8.3.
--- arch/x86/entry/entry_fred.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-)
arch/x86/entry/entry_fred.c +10 -1
@@ -10,6 +10,7 @@#include <asm/desc.h> #include <asm/fred.h> #include <asm/idtentry.h> +#include <asm/processor-flags.h> #include <asm/syscall.h> #include <asm/trapnr.h> #include <asm/traps.h>
@@ -71,7 +72,15 @@ static noinstr void fred_intx(struct pt_regs *regs)#endif default : -return exc_general_protection (regs,0 ); +/* +* Reconstruct the #GP fault state that IDT delivery would produce. +* Clear the software event flag so ERETU with TF set does not trap +* before the resumed instruction. See prevent_single_step_upon_eretu(). +*/ + regs->ip -= regs->fred_ss.insnlen; + regs->flags |=X86_EFLAGS_RF ; + regs->fred_ss.swevent =0 ; +return exc_general_protection (regs, (regs->fred_ss.vector <<3 ) |2 ); } }
PATCH 2/2 selftests/x86: Check signal state for rejected software interrupts
In reply to Matthew SchwartzAdd a test of the signal ABI for INT instructions in both 32-bit and 64-bit processes. Check the signal number, trap number, error code, si_code, si_addr, instruction pointer and RF/TF state against legacy IDT behavior. Include a 15-byte prefixed INT to check that IP uses the hardware instruction length. Exercise both INT3 encodings, INT4, UD2 and HLT to cover the unchanged trap and fault paths.
Run each instruction with TF clear and set. Resume at a known NOP after handling the signal and check that single-stepping traps after the NOP.
Also drive INT 0x2d under ptrace, which resumes through the fault frame rather than sigreturn and so exposes a stale FRED software event flag. Start from an INT3 stop, whose FRED frame has no software event flag, instead of the syscall frame of raise(SIGSTOP). Single-step into the INT and check that the fault reports its address. Then suppress SIGSEGV and resume at the NOP, once with PTRACE_SINGLESTEP and once with PTRACE_CONT and TF set. Section 6.2.3 of the Intel FRED specification [1] specifies the immediate single-step trap caused by returning with both that flag and TF set. Check that each trap occurs after the NOP, rather than at its address.
Report whether the CPU supports FRED, since a pass looks the same on either entry path. INT 0x80 with IA32 emulation disabled and a 64-bit tracer of a 32-bit tracee are not covered.
Both variants pass all 29 checks on a non-FRED AMD host and on Panther Lake with FRED enabled and the fix applied. With the same binaries on unpatched Panther Lake, 16 signal-context checks fail and the first ptrace check reports the IP after the INT. The two dependent ptrace resume checks are not reached.
[1] Intel Flexible Return and Event Delivery (FRED) Specification, revision 9.0 (346446-009US), section 6.2.3.
--- tools/testing/selftests/x86/Makefile | 2 +- tools/testing/selftests/x86/int_signal.c | 311 +++++++++++++++++++++++ 2 files changed, 312 insertions(+), 1 deletion(-) create mode 100644 tools/testing/selftests/x86/int_signal.c
tools/testing/selftests/x86/Makefile +1 -1
@@ -13,7 +13,7 @@ CAN_BUILD_WITH_NOPIE := $(shell ./check_cc.sh "$(CC)" trivial_program.c -no-pie) TARGETS_C_BOTHBITS := single_step_syscall sysret_ss_attrs syscall_nt test_mremap_vdso \ check_initial_reg_state sigreturn iopl ioperm \ test_vsyscall mov_ss_trap sigtrap_loop \ - syscall_arg_fault fsgsbase_restore sigaltstack + syscall_arg_fault fsgsbase_restore sigaltstack int_signal TARGETS_C_BOTHBITS += nx_stack TARGETS_C_32BIT_ONLY := entry_from_vm86 test_syscall_vdso unwind_vdso \ test_FCMOV test_FCOMI test_FISTTP \
tools/testing/selftests/x86/int_signal.c new file +311 -0
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Signature · 1 line
2.55.0
[tip: x86/urgent] selftests/x86: Check signal state for rejected software interrupts
The following commit has been merged into the x86/urgent branch of tip:
The following commit has been merged into the x86/urgent branch of tip:
Commit-ID: 96443a53bc3ef4b67dab0c497878fc8d56f799f3 Gitweb: https://git.kernel.org/tip/96443a53bc3ef4b67dab0c497878fc8d56f799f3 Author: Matthew Schwartz <[email protected]> AuthorDate: Thu, 17 Sep 2026 16:09:07 -07:00 Committer: Peter Zijlstra <[email protected]> CommitterDate: Fri, 18 Sep 2026 12:33:18 +02:00
selftests/x86: Check signal state for rejected software interrupts
Add a test of the signal ABI for INT instructions in both 32-bit and 64-bit processes. Check the signal number, trap number, error code, si_code, si_addr, instruction pointer and RF/TF state against legacy IDT behavior. Include a 15-byte prefixed INT to check that IP uses the hardware instruction length. Exercise both INT3 encodings, INT4, UD2 and HLT to cover the unchanged trap and fault paths.
Run each instruction with TF clear and set. Resume at a known NOP after handling the signal and check that single-stepping traps after the NOP.
Also drive INT 0x2d under ptrace, which resumes through the fault frame rather than sigreturn and so exposes a stale FRED software event flag. Start from an INT3 stop, whose FRED frame has no software event flag, instead of the syscall frame of raise(SIGSTOP). Single-step into the INT and check that the fault reports its address. Then suppress SIGSEGV and resume at the NOP, once with PTRACE_SINGLESTEP and once with PTRACE_CONT and TF set. Section 6.2.3 of the Intel FRED specification [1] specifies the immediate single-step trap caused by returning with both that flag and TF set. Check that each trap occurs after the NOP, rather than at its address.
Report whether the CPU supports FRED, since a pass looks the same on either entry path. INT 0x80 with IA32 emulation disabled and a 64-bit tracer of a 32-bit tracee are not covered.
Both variants pass all 29 checks on a non-FRED AMD host and on Panther Lake with FRED enabled and the fix applied. With the same binaries on unpatched Panther Lake, 16 signal-context checks fail and the first ptrace check reports the IP after the INT. The two dependent ptrace resume checks are not reached.
[1] Intel Flexible Return and Event Delivery (FRED) Specification, revision 9.0 (346446-009US), section 6.2.3.
--- tools/testing/selftests/x86/Makefile | 2 +- tools/testing/selftests/x86/int_signal.c | 311 ++++++++++++++++++++++- 2 files changed, 312 insertions(+), 1 deletion(-) create mode 100644 tools/testing/selftests/x86/int_signal.c
tools/testing/selftests/x86/Makefile +1 -1
@@ -13,7 +13,7 @@ CAN_BUILD_WITH_NOPIE := $(shell ./check_cc.sh "$(CC)" trivial_program.c -no-pie) TARGETS_C_BOTHBITS := single_step_syscall sysret_ss_attrs syscall_nt test_mremap_vdso \ check_initial_reg_state sigreturn iopl ioperm \ test_vsyscall mov_ss_trap sigtrap_loop \ - syscall_arg_fault fsgsbase_restore sigaltstack + syscall_arg_fault fsgsbase_restore sigaltstack int_signal TARGETS_C_BOTHBITS += nx_stack TARGETS_C_32BIT_ONLY := entry_from_vm86 test_syscall_vdso unwind_vdso \ test_FCMOV test_FCOMI test_FISTTP \
tools/testing/selftests/x86/int_signal.c new file +311 -0
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