FAILED: patch "[PATCH] arm64: mm: Fix the break-before-make flush range for erratum" failed to apply to 6.18-stable tree
Subsystems (2)
[email protected]
maintainerThe patch below does not apply to the 6.18-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.
To reproduce the conflict and resubmit, you may use the following commands:
git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-6.18.y
git checkout FETCH_HEAD
git cherry-pick -x 1fef81669147d63eb8c5d3627d54eadc21173a0b
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<[email protected]>' --in-reply-to '2026100552-severity-animate-dbb7@gregkh' --subject-prefix 'PATCH 6.18.y' 'HEAD^..'
Possible dependencies:
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From 1fef81669147d63eb8c5d3627d54eadc21173a0b Mon Sep 17 00:00:00 2001
From: Andrea Parri <[email protected]>
Date: Wed, 23 Sep 2026 16:36:32 +0200
Subject: [PATCH] arm64: mm: Fix the break-before-make flush range for erratum
2645198
modify_prot_start_ptes() performs the break-before-make TLB invalidation required by erratum 2645198 with __flush_tlb_range(), whose third argument is the end address of the range. It passes nr * PAGE_SIZE instead of addr + nr * PAGE_SIZE, so __do_flush_tlb_range() computes the page count as (nr * PAGE_SIZE - addr) >> PAGE_SHIFT.
For addr > nr * PAGE_SIZE that subtraction underflows, the page count exceeds the batching limit and the flush degenerates to flush_tlb_mm(), so a single-page mprotect broadcasts an ASID-wide invalidation and a full-range mmu notifier call.
For addr <= nr * PAGE_SIZE only [addr, nr * PAGE_SIZE) is invalidated, and when the cleared batch starts below nr * PAGE_SIZE the tail is left in the TLB. The workaround then no longer covers the whole batch, and for addr == nr * PAGE_SIZE the flush is empty.
On affected Cortex-A715 CPUs, this can corrupt ESR_ELx and FAR_ELx on the next instruction abort caused by a permission fault.
Pass addr + nr * PAGE_SIZE as the end address.
arch/arm64/mm/mmu.c +1 -1
@@ -2295,7 +2295,7 @@ pte_t modify_prot_start_ptes(struct vm_area_struct *vma, unsigned long addr,* in cases where cpu is affected with errata #2645198. */ if (pte_accessible (vma->vm_mm, pte) &&pte_user_exec (pte)) -__flush_tlb_range (vma, addr, nr *PAGE_SIZE , +__flush_tlb_range (vma, addr, addr + nr *PAGE_SIZE ,PAGE_SIZE ,3 ,TLBF_NOWALKCACHE ); }
Sasha Levin
maintainerPATCH 1/1 arm64: mm: Fix the break-before-make flush range for erratum 2645198
From: Andrea Parri <[email protected]>
[ Upstream commit 1fef81669147d63eb8c5d3627d54eadc21173a0b ]
modify_prot_start_ptes() performs the break-before-make TLB invalidation required by erratum 2645198 with __flush_tlb_range(), whose third argument is the end address of the range. It passes nr * PAGE_SIZE instead of addr + nr * PAGE_SIZE, so __do_flush_tlb_range() computes the page count as (nr * PAGE_SIZE - addr) >> PAGE_SHIFT.
For addr > nr * PAGE_SIZE that subtraction underflows, the page count exceeds the batching limit and the flush degenerates to flush_tlb_mm(), so a single-page mprotect broadcasts an ASID-wide invalidation and a full-range mmu notifier call.
For addr <= nr * PAGE_SIZE only [addr, nr * PAGE_SIZE) is invalidated, and when the cleared batch starts below nr * PAGE_SIZE the tail is left in the TLB. The workaround then no longer covers the whole batch, and for addr == nr * PAGE_SIZE the flush is empty.
On affected Cortex-A715 CPUs, this can corrupt ESR_ELx and FAR_ELx on the next instruction abort caused by a permission fault.
Pass addr + nr * PAGE_SIZE as the end address.
--- arch/arm64/mm/mmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/mm/mmu.c +1 -1
@@ -2150,7 +2150,7 @@ pte_t modify_prot_start_ptes(struct vm_area_struct *vma, unsigned long addr,* in cases where cpu is affected with errata #2645198. */ if (pte_accessible (vma->vm_mm, pte) &&pte_user_exec (pte)) -__flush_tlb_range (vma, addr, nr *PAGE_SIZE , +__flush_tlb_range (vma, addr, addr + nr *PAGE_SIZE ,PAGE_SIZE , true,3 ); }
Signature · 1 line
2.53.0