PCI: Disable D3cold for Killer BE200-family WiFi on MSI Claw A1M
cover PCI: Disable D3cold for Killer BE200-family WiFi on MSI Claw A1M
Hi all,
The MSI Claw A1M is an Intel Core Ultra (Meteor Lake-H) handheld gaming PC carrying a Killer BE1750 WiFi card (Intel BE200 silicon, PCI 8086:272b, subsystem Rivet Networks 1a56:1774) behind root port 00:1c.0.
During s2idle the platform removes auxiliary slot power from the card (D3cold). On resume the PCIe link fails to retrain:
pcieport 0000:00:1c.0: Data Link Layer Link Active not set in 100 msec
and the card reads back all-ones from every register: iwlwifi dumps its complete register state as 0xffffffff and the device disappears from the bus, so the machine has to be power-cycled. This is the resume half of kernel Bugzilla 220223; the detection side of that bug was addressed in commit 224476613c84 ("wifi: iwlwifi: if scratch is ~0U, consider it a failure"), but the recovery path still does not bring the card back up.
Keeping the card in D3hot with the PCIe link in L1.2 during system sleep (not letting it fall to D3cold) makes suspend and resume work reliably:
the card survives every cycle and NetworkManager reconnects without errors. The SoC still reaches S0ix during the sleep; measured with pmc_core slp_s0_residency_usec, a 241 s timed suspend accumulated 239.5s of S0ix residency (99.4%) in this configuration, and the fix is independent of the platform's ASPM configuration.
Patch 1 adds a DMI-scoped quirk disabling D3cold for the BE200-family device on this board (pci_d3cold_disable()). It mirrors the workaround distributions already ship as a udev rule for the AX200/AX210 (8086:2725), which suffers from the same class of failure; doing it in the kernel removes the need for userspace workarounds. I kept the quirk DMI-scoped to the Claw so that D3cold behavior is unchanged for this card family on platforms where it works.
Testing: MSI Claw A1M, BIOS E1T41IMS.10D, kernel next-20261023. Multiple suspend/resume cycles with an RTC-timed wake (240 s). Without the quirk the card is lost on the first resume (all-ones register dumps, "Data Link Layer Link Active not set in 100 msec"); with the quirk it survives every cycle, reconnects, and d3cold_allowed remains 0 across resume. No AER or pcieport errors are logged in the resume window.
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=220223
Denis Benato (1):
PCI: Disable D3cold for Killer BE200-family WiFi on MSI Claw A1M
drivers/pci/quirks.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+)
Signature · 1 line
2.55.0
PATCH 1/1 PCI: Disable D3cold for Killer BE200-family WiFi on MSI Claw A1M
During s2idle the platform removes power from the WiFi slot (D3cold). The Killer BE1750 (Intel BE200, 8086:272b) installed in the MSI Claw A1M fails to resume from that state: the PCIe link does not retrain ("pcieport 0000:00:1c.0: Data Link Layer Link Active not set in 100 msec") and every device register reads back as 0xffffffff, so the card disappears from the bus and the machine must be power-cycled.
Keeping the device in D3hot with the link in L1.2 during system sleep makes suspend and resume work reliably: the package still reaches >99% S0ix residency and the card survives every cycle (verified over multiple suspend/resume tests with an RTC-timed wake).
Disable D3cold for the BE200-family device on this board. This mirrors the udev-level workaround distributions already ship for the AX200/AX210 (8086:2725), which suffers from the same class of problem, and moves it into the kernel where it belongs.
--- drivers/pci/quirks.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+)
drivers/pci/quirks.c +21 -0
@@ -6593,3 +6593,24 @@ static void pci_mask_replay_timer_timeout(struct pci_dev *pdev)DECLARE_PCI_FIXUP_FINAL (PCI_VENDOR_ID_GLI ,0x9750 , pci_mask_replay_timer_timeout);DECLARE_PCI_FIXUP_FINAL (PCI_VENDOR_ID_GLI ,0x9755 , pci_mask_replay_timer_timeout);#endif + +/* +* MSI Claw A1M: during s2idle the platform removes power from the WiFi slot +* (D3cold). The Killer BE1750 (Intel BE200, 8086:272b) fails to resume from +* that state: the PCIe link does not retrain ("Data Link Layer Link Active +* not set in 100 msec") and every device register reads back as 0xffffffff, +* so the card disappears from the bus and the machine must be power-cycled. +* +* Keeping the device in D3hot with the link in L1.2 during system sleep makes +* suspend and resume work reliably: the package still reaches >99% S0ix +* residency and the card survives. +*/ +static void quirk_msi_claw_be200_d3cold (struct pci_dev *pdev) +{ +if (!dmi_match (DMI_BOARD_NAME ,"MS-1T41" )) +return ; + +pci_d3cold_disable (pdev); +pci_info (pdev,"disabling D3cold: slot power removal during s2idle prevents resume on this system" ); +} +DECLARE_PCI_FIXUP_FINAL (PCI_VENDOR_ID_INTEL ,0x272b , quirk_msi_claw_be200_d3cold);
Signature · 1 line
2.55.0
[email protected]
AI reviewSashiko has reviewed this patch and found no issues.
Quoted 12 lines
During s2idle the platform removes power from the WiFi slot (D3cold). The Killer BE1750 (Intel BE200, 8086:272b) installed in the MSI Claw A1M fails to resume from that state: the PCIe link does not retrain ("pcieport 0000:00:1c.0: Data Link Layer Link Active not set in 100 msec") and every device register reads back as
0xffffffff, so the card disappears from the bus and the machine must be power-cycled.Keeping the device in D3hot with the link in L1.2 during system sleep makes suspend and resume work reliably: the package still reaches >99% S0ix residency and the card survives every cycle (verified over multiple suspend/resume tests with an RTC-timed wake).
Quoted 7 lines
Disable D3cold for the BE200-family device on this board. This mirrors the udev-level workaround distributions already ship for the AX200/AX210 (8086:2725), which suffers from the same class of problem, and moves it into the kernel where it belongs.
Signed-off-by Denis Benato <[email protected]>
Sashiko has reviewed this patch and found no issues.
Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=1
Quoted 12 lines · Denis Benato
During s2idle the platform removes power from the WiFi slot (D3cold). The Killer BE1750 (Intel BE200, 8086:272b) installed in the MSI Claw A1M fails to resume from that state: the PCIe link does not retrain ("pcieport 0000:00:1c.0: Data Link Layer Link Active not set in 100 msec") and every device register reads back as
0xffffffff, so the card disappears from the bus and the machine must be power-cycled.Keeping the device in D3hot with the link in L1.2 during system sleep makes suspend and resume work reliably: the package still reaches >99% S0ix residency and the card survives every cycle (verified over multiple suspend/resume tests with an RTC-timed wake).
Quoted 4 lines
Disable D3cold for the BE200-family device on this board. This mirrors the udev-level workaround distributions already ship for the AX200/AX210 (8086:2725), which suffers from the same class of problem, and moves it into the kernel where it belongs.
If 2725 has the same problem, should we make the quirk apply to it also?
I suppose this is a firmware problem with whatever is supposed to turn the power back on? Are there any firmware updates available?
Quoted 15 lines
Signed-off-by Denis Benato <[email protected]>--- drivers/pci/quirks.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+)drivers/pci/quirks.c +1
-0@@ -6593,3 +6593,24 @@ static void pci_mask_replay_timer_timeout(struct pci_dev *pdev)DECLARE_PCI_FIXUP_FINAL (PCI_VENDOR_ID_GLI ,0x9750 , pci_mask_replay_timer_timeout);DECLARE_PCI_FIXUP_FINAL (PCI_VENDOR_ID_GLI ,0x9755 , pci_mask_replay_timer_timeout);#endif +
drivers/pci/quirks.c static void pci_mask_replay_timer_timeout(struct pci_dev *pdev) · line 6606
Quoted 10 lines
drivers/pci/quirks.c +10
-0+/* +* MSI Claw A1M: during s2idle the platform removes power from the WiFi slot +* (D3cold). The Killer BE1750 (Intel BE200, 8086:272b) fails to resume from +* that state: the PCIe link does not retrain ("Data Link Layer Link Active +* not set in 100 msec") and every device register reads back as 0xffffffff, +* so the card disappears from the bus and the machine must be power-cycled. +* +* Keeping the device in D3hot with the link in L1.2 during system sleep makes +* suspend and resume work reliably: the package still reaches >99% S0ix +* residency and the card survives.
From just this patch, I don't think we can assert the L1.2 link state, can we? AFAICS, this patch just prevents the use of D3cold.
Quoted 13 lines
drivers/pci/quirks.c +10
-0+*/ +static void quirk_msi_claw_be200_d3cold (struct pci_dev *pdev) +{ +if (!dmi_match (DMI_BOARD_NAME ,"MS-1T41" )) +return ; + +pci_d3cold_disable (pdev); +pci_info (pdev,"disabling D3cold: slot power removal during s2idle prevents resume on this system" ); +} +DECLARE_PCI_FIXUP_FINAL (PCI_VENDOR_ID_INTEL ,0x272b , quirk_msi_claw_be200_d3cold);Signature · 1 line
2.55.0
26 ott 2026 19:48:16 Bjorn Helgaas <[email protected]>:
Quoted 13 lines · Denis Benato
Quoted 12 lines
During s2idle the platform removes power from the WiFi slot (D3cold). The Killer BE1750 (Intel BE200, 8086:272b) installed in the MSI Claw A1M fails to resume from that state: the PCIe link does not retrain ("pcieport 0000:00:1c.0: Data Link Layer Link Active not set in 100 msec") and every device register reads back as
0xffffffff, so the card disappears from the bus and the machine must be power-cycled.Keeping the device in D3hot with the link in L1.2 during system sleep makes suspend and resume work reliably: the package still reaches >99% S0ix residency and the card survives every cycle (verified over multiple suspend/resume tests with an RTC-timed wake).
Quoted 8 lines
Quoted 4 lines
Disable D3cold for the BE200-family device on this board. This mirrors the udev-level workaround distributions already ship for the AX200/AX210 (8086:2725), which suffers from the same class of problem, and moves it into the kernel where it belongs.
If 2725 has the same problem, should we make the quirk apply to it also?
Hi Bjorn,
Probably yes, but I don't own that hardware, only saw gaming distros are shipping an udev rule to do just that.
Quoted 3 lines
I suppose this is a firmware problem with whatever is supposed to turn the power back on? Are there any firmware updates available?
Not that I know of. I have updated my bios (only update available) but the issue is still there.
Quoted 20 lines
Quoted 20 lines
Signed-off-by Denis Benato <[email protected]>---
drivers/pci/quirks.c| 21 +++++++++++++++++++++1 file changed, 21 insertions(+)drivers/pci/quirks.c +6
-0@@ -6593,3 +6593,24 @@ static void pci_mask_replay_timer_timeout(struct pci_dev *pdev)DECLARE_PCI_FIXUP_FINAL (PCI_VENDOR_ID_GLI ,0x9750 , pci_mask_replay_timer_timeout);DECLARE_PCI_FIXUP_FINAL (PCI_VENDOR_ID_GLI ,0x9755 , pci_mask_replay_timer_timeout);#endif + +/* +* MSI Claw A1M: during s2idle the platform removes power from the WiFi slot +* (D3cold). The Killer BE1750 (Intel BE200, 8086:272b) fails to resume from +* that state: the PCIe link does not retrain ("Data Link Layer Link Active +* not set in 100 msec") and every device register reads back as 0xffffffff,
Quoted 8 lines
drivers/pci/quirks.c static void pci_mask_replay_timer_timeout(struct pci_dev *pdev) · line 6606
Quoted 5 lines
drivers/pci/quirks.c +5
-0+* so the card disappears from the bus and the machine must be power-cycled. +* +* Keeping the device in D3hot with the link in L1.2 during system sleep makes +* suspend and resume work reliably: the package still reaches >99% S0ix +* residency and the card survives. From just this patch, I don't think we can assert the L1.2 link state, can we? AFAICS, this patch just prevents the use of D3cold.
From this patch no, but that is the description of what happens on my msi claw when I enter sleep with this patch, checked via s0ixselftest tool.
This is surely better than the previous work around of detaching the driver and re-attaching it leaving the device in d0.
Quoted 14 lines
Quoted 14 lines
drivers/pci/quirks.c +10
-1+*/ +static void quirk_msi_claw_be200_d3cold (struct pci_dev *pdev) +{ + if (!dmi_match(DMI_BOARD_NAME, "MS-1T41")) + return; + + pci_d3cold_disable(pdev); + pci_info(pdev, "disabling D3cold: slot power removal during s2idle prevents resume on this system"); +} +DECLARE_PCI_FIXUP_FINAL (PCI_VENDOR_ID_INTEL ,0x272b , quirk_msi_claw_be200_d3cold); --2.55.0
Quoted 35 lines · Denis Benato
26 ott 2026 19:48:16 Bjorn Helgaas <[email protected]>:
Quoted 31 lines · Denis Benato
Quoted 19 lines
During s2idle the platform removes power from the WiFi slot (D3cold).
The Killer BE1750 (Intel BE200, 8086:272b) installed in the MSI Claw A1M
fails to resume from that state: the PCIe link does not retrain ("pcieport 0000:00:1c.0: Data Link Layer Link Active not set in 100 msec") and every device register reads back as0xffffffff, so the
card disappears from the bus and the machine must be power- cycled.Keeping the device in D3hot with the link in L1.2 during system sleep
makes suspend and resume work reliably: the package still reachesQuoted 1 line
99%
S0ix residency and the card survives every cycle (verified over multiple
suspend/resume tests with an RTC-timed wake).Quoted 7 lines
Disable D3cold for the BE200-family device on this board. This mirrors
the udev-level workaround distributions already ship for the AX200/AX210
(8086:2725), which suffers from the same class of problem, and moves it
into the kernel where it belongs.If 2725 has the same problem, should we make the quirk apply to it also?
I'll take the risk to hijack a bit this thread to say that we have a register that was added in BE200 to tell the wifi driver what happened to the device during the suspend. It is called the scratch register. We write an initial value into that register and upon _iwl_pci_resume we read it. If we see that the original value is no longer there at means that parts of the device have been reset. This allows us to know if we can still expect to have a firmware to talk to upon resume. See:
/*
* Scratch value was altered, this means the device was powered
* off, we need to reset it completely.
* Note: MAC (bits 0:7) will be cleared upon suspend even with
* wowlan, but not bits [15:8]. So if we have bits set in lower
* word, assume the device is alive.
* Alternatively, if the scratch value is 0xFFFFFFFF, then we
* no longer have access to the device and consider it powered
* off.
* For older devices, just try silently to grab the NIC.
*/
if (trans->mac_cfg->device_family >= IWL_DEVICE_FAMILY_BZ) {
u32 scratch = iwl_trans_pcie_read32(trans, CSR_FUNC_SCRATCH);
if (!(scratch & CSR_FUNC_SCRATCH_POWER_OFF_MASK) ||
scratch == ~0U) {
IWL_DEBUG_WOWLAN(trans,
"Scratch 0x%08x indicates device was powered off\n",
scratch);
device_was_powered_off = true;
}
} Not sure this information helps though..
Quoted 76 lines
Hi Bjorn,
Probably yes, but I don't own that hardware, only saw gaming distros are shipping an udev rule to do just that.
Quoted 4 lines
I suppose this is a firmware problem with whatever is supposed to turn
the power back on? Are there any firmware updates available?Not that I know of. I have updated my bios (only update available) but the issue is still there.
Quoted 33 lines
Quoted 33 lines
Signed-off-by Denis Benato <[email protected]>---
drivers/pci/quirks.c| 21 +++++++++++++++++++++1 file changed, 21 insertions(+)drivers/pci/quirks.c +0
-0@@ -6593,3 +6593,24 @@ static void pci_mask_replay_timer_timeout(struct pci_dev *pdev) DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_GLI, 0x9750, pci_mask_replay_timer_timeout);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_GLI, 0x9755, pci_mask_replay_timer_timeout);
#endifdrivers/pci/quirks.c +3
-0+ +/* +* MSI Claw A1M: during s2idle the platform removes power from the WiFi slot
+ * (D3cold). The Killer BE1750 (Intel BE200, 8086:272b) fails to resume from
+ * that state: the PCIe link does not retrain ("Data Link Layer Link Active
+ * not set in 100 msec") and every device register reads back as0xffffffff,
+ * so the card disappears from the bus and the machine must be power-cycled.
+ *
+ * Keeping the device in D3hot with the link in L1.2 during system sleep makes
+ * suspend and resume work reliably: the package still reachesQuoted 6 lines
Quoted 2 lines
Quoted 1 line
99% S0ix
+ * residency and the card survives.
From just this patch, I don't think we can assert the L1.2 link state,
can we? AFAICS, this patch just prevents the use of D3cold.From this patch no, but that is the description of what happens on my msi claw when I enter sleep with this patch, checked via s0ixselftest tool.
This is surely better than the previous work around of detaching the driver and re-attaching it leaving the device in d0.
Quoted 16 lines
Quoted 16 lines
+ */
drivers/pci/quirks.c +7
-0+static void quirk_msi_claw_be200_d3cold (struct pci_dev *pdev) +{ + if (!dmi_match(DMI_BOARD_NAME, "MS-1T41")) + return; + + pci_d3cold_disable(pdev); + pci_info(pdev, "disabling D3cold: slot power removal durings2idle prevents resume on this system");
drivers/pci/quirks.c +2
-0+} +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x272b,
quirk_msi_claw_be200_d3cold);
--
2.55.0