Skip to contentSkip to conversation

dt-bindings: clock: Convert hisilicon,hi3519-crg to DT schema

PATCH New Rob Herring (Arm) 1 participant 1 message Nov 10

Subsystems (2)
Device tree bindings Common clk
lore
Share & tools
lore

Rob Herring (Arm)

author maintainer
#0 lore raw

PATCH v2 1/1 dt-bindings: clock: Convert hisilicon,hi3519-crg to DT schema

Convert the HiSilicon CRG binding to DT schema format.

The allowed compatibles was not very accurate, so update them to match the users. Drop the hi3516cv300 compatibles as the platform has no DT and only a few drivers (pending removal) upstream.

Signed-off-by Rob Herring (Arm) <[email protected]>

---
v2:
- Add missing SPDX license tag

---
 .../devicetree/bindings/clock/hisi-crg.txt    | 50 ---------------
 .../bindings/clock/hisilicon,hi3519-crg.yaml  | 62 +++++++++++++++++++
 2 files changed, 62 insertions(+), 50 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/clock/hisi-crg.txt
 create mode 100644 Documentation/devicetree/bindings/clock/hisilicon,hi3519-crg.yaml
Documentation/devicetree/bindings/clock/hisi-crg.txt deleted +0 -50
deleted file mode 100644
index cc60b3d423f3..000000000000
@@ -1,50 +0,0 @@
-* HiSilicon Clock and Reset Generator(CRG)
-
-The CRG module provides clock and reset signals to various
-modules within the SoC.
-
-This binding uses the following bindings:
-    Documentation/devicetree/bindings/clock/clock-bindings.txt
-    Documentation/devicetree/bindings/reset/reset.txt
-
-Required Properties:
-
-- compatible: should be one of the following.
-  - "hisilicon,hi3516cv300-crg"
-  - "hisilicon,hi3516cv300-sysctrl"
-  - "hisilicon,hi3519-crg"
-  - "hisilicon,hi3798cv200-crg"
-  - "hisilicon,hi3798cv200-sysctrl"
-
-- reg: physical base address of the controller and length of memory mapped
-  region.
-
-- #clock-cells: should be 1.
-
-Each clock is assigned an identifier and client nodes use this identifier
-to specify the clock which they consume.
-
-All these identifier could be found in <dt-bindings/clock/hi3519-clock.h>.
-
-- #reset-cells: should be 2.
-
-A reset signal can be controlled by writing a bit register in the CRG module.
-The reset specifier consists of two cells. The first cell represents the
-register offset relative to the base address. The second cell represents the
-bit index in the register.
-
-Example: CRG nodes
-CRG: clock-reset-controller@12010000 {
-	compatible = "hisilicon,hi3519-crg";
-	reg = <0x12010000 0x10000>;
-	#clock-cells = <1>;
-	#reset-cells = <2>;
-};
-
-Example: consumer nodes
-i2c0: i2c@12110000 {
-	compatible = "hisilicon,hi3519-i2c";
-	reg = <0x12110000 0x1000>;
-	clocks = <&CRG HI3519_I2C0_RST>;
-	resets = <&CRG 0xe4 0>;
-};
Documentation/devicetree/bindings/clock/hisilicon,hi3519-crg.yaml new file +62 -0

62 lines not on this page · raw message

Signature · 1 line
2.53.0