DMA: remove unused support for MEMSET operations
Subsystems (7)
PATCH 1/1 DMA: remove unused support for MEMSET operations
There have never been any real users of MEMSET operations since they have been introduced in January 2007 (commit 7405f74badf46b5d023c5d2b670b4471525f6c91 "dmaengine: refactor dmaengine around dma_async_tx_descriptor"). Therefore remove support for them for now, it can be always brought back when needed.
---
synced against next-20130626
previous submissions:
https://lkml.org/lkml/2012/12/5/116
https://lkml.org/lkml/2012/11/8/107
Documentation/crypto/async-tx-api.txt | 1 arch/arm/mach-iop13xx/setup.c | 3 arch/arm/plat-iop/adma.c | 2 arch/arm/plat-orion/common.c | 5 - crypto/async_tx/Kconfig | 4 - crypto/async_tx/Makefile | 1 crypto/async_tx/async_memset.c | 89 -------------------------- drivers/dma/dmaengine.c | 7 -- drivers/dma/ioat/dma.c | 3 drivers/dma/ioat/dma_v2.h | 1 drivers/dma/ioat/dma_v3.c | 114 ---------------------------------- drivers/dma/ioat/hw.h | 27 -------- drivers/dma/iop-adma.c | 66 ------------------- drivers/dma/mv_xor.c | 60 ----------------- drivers/dma/mv_xor.h | 1 drivers/dma/ppc4xx/adma.c | 47 -------------- include/linux/async_tx.h | 4 - include/linux/dmaengine.h | 5 - 18 files changed, 7 insertions(+), 433 deletions(-)
Documentation/crypto/async-tx-api.txt +0 -1
@@ -222,5 +222,4 @@ drivers/dma/: location for offload engin include/linux/async_tx.h: core header file for the async_tx api crypto/async_tx/async_tx.c: async_tx interface to dmaengine and common code crypto/async_tx/async_memcpy.c: copy offload -crypto/async_tx/async_memset.c: memory fill offload crypto/async_tx/async_xor.c: xor and xor zero sum offload
arch/arm/mach-iop13xx/setup.c +0 -3
@@ -469,7 +469,6 @@ void __init iop13xx_platform_init(void)dma_cap_set (DMA_MEMCPY , plat_data->cap_mask);dma_cap_set (DMA_XOR , plat_data->cap_mask);dma_cap_set (DMA_XOR_VAL , plat_data->cap_mask); -dma_cap_set (DMA_MEMSET , plat_data->cap_mask);dma_cap_set (DMA_INTERRUPT , plat_data->cap_mask);break ;case IOP13XX_INIT_ADMA_1 :
@@ -479,7 +478,6 @@ void __init iop13xx_platform_init(void)dma_cap_set (DMA_MEMCPY , plat_data->cap_mask);dma_cap_set (DMA_XOR , plat_data->cap_mask);dma_cap_set (DMA_XOR_VAL , plat_data->cap_mask); -dma_cap_set (DMA_MEMSET , plat_data->cap_mask);dma_cap_set (DMA_INTERRUPT , plat_data->cap_mask);break ;case IOP13XX_INIT_ADMA_2 :
@@ -489,7 +487,6 @@ void __init iop13xx_platform_init(void)dma_cap_set (DMA_MEMCPY , plat_data->cap_mask);dma_cap_set (DMA_XOR , plat_data->cap_mask);dma_cap_set (DMA_XOR_VAL , plat_data->cap_mask); -dma_cap_set (DMA_MEMSET , plat_data->cap_mask);dma_cap_set (DMA_INTERRUPT , plat_data->cap_mask);dma_cap_set (DMA_PQ , plat_data->cap_mask);dma_cap_set (DMA_PQ_VAL , plat_data->cap_mask);
arch/arm/plat-iop/adma.c +0 -2
@@ -192,12 +192,10 @@ static int __init iop3xx_adma_cap_init(v#ifdef CONFIG_ARCH_IOP32X /* the 32x AAU does not perform zero sum */ dma_cap_set (DMA_XOR , iop3xx_aau_data.cap_mask); -dma_cap_set (DMA_MEMSET , iop3xx_aau_data.cap_mask);dma_cap_set (DMA_INTERRUPT , iop3xx_aau_data.cap_mask);#else dma_cap_set (DMA_XOR , iop3xx_aau_data.cap_mask);dma_cap_set (DMA_XOR_VAL , iop3xx_aau_data.cap_mask); -dma_cap_set (DMA_MEMSET , iop3xx_aau_data.cap_mask);dma_cap_set (DMA_INTERRUPT , iop3xx_aau_data.cap_mask);#endif
arch/arm/plat-orion/common.c +0 -5
@@ -666,14 +666,9 @@ void __init orion_xor0_init(unsigned lon orion_xor0_shared_resources[3 ].start = irq_1; orion_xor0_shared_resources[3 ].end = irq_1; -/* -* two engines can't do memset simultaneously, this limitation -* satisfied by removing memset support from one of the engines. -*/ dma_cap_set (DMA_MEMCPY , orion_xor0_channels_data[0 ].cap_mask);dma_cap_set (DMA_XOR , orion_xor0_channels_data[0 ].cap_mask); -dma_cap_set (DMA_MEMSET , orion_xor0_channels_data[1 ].cap_mask);dma_cap_set (DMA_MEMCPY , orion_xor0_channels_data[1 ].cap_mask);dma_cap_set (DMA_XOR , orion_xor0_channels_data[1 ].cap_mask);
crypto/async_tx/Kconfig +0 -4
@@ -10,10 +10,6 @@ config ASYNC_XOR select ASYNC_CORE select XOR_BLOCKS -config ASYNC_MEMSET - tristate - select ASYNC_CORE - config ASYNC_PQ tristate select ASYNC_CORE
crypto/async_tx/Makefile +0 -1
@@ -1,6 +1,5 @@ obj-$(CONFIG_ASYNC_CORE) += async_tx.o obj-$(CONFIG_ASYNC_MEMCPY) += async_memcpy.o -obj-$(CONFIG_ASYNC_MEMSET) += async_memset.o obj-$(CONFIG_ASYNC_XOR) += async_xor.o obj-$(CONFIG_ASYNC_PQ) += async_pq.o obj-$(CONFIG_ASYNC_RAID6_RECOV) += async_raid6_recov.o
crypto/async_tx/async_memset.c deleted +0 -89
89 lines not on this page · raw message
drivers/dma/dmaengine.c +0 -7
@@ -663,11 +663,6 @@ static bool device_has_all_tx_types(strureturn false;#endif -#if defined(CONFIG_ASYNC_MEMSET ) || defined(CONFIG_ASYNC_MEMSET_MODULE ) -if (!dma_has_cap (DMA_MEMSET , device->cap_mask)) -return false; -#endif -#if defined(CONFIG_ASYNC_XOR ) || defined(CONFIG_ASYNC_XOR_MODULE )if (!dma_has_cap (DMA_XOR , device->cap_mask))return false;
@@ -729,8 +724,6 @@ int dma_async_device_register(struct dma !device->device_prep_dma_pq);BUG_ON (dma_has_cap (DMA_PQ_VAL , device->cap_mask) && !device->device_prep_dma_pq_val); -BUG_ON (dma_has_cap (DMA_MEMSET , device->cap_mask) && - !device->device_prep_dma_memset);BUG_ON (dma_has_cap (DMA_INTERRUPT , device->cap_mask) && !device->device_prep_dma_interrupt); BUG_ON(dma_has_cap(DMA_SG, device->cap_mask) &&
drivers/dma/ioat/dma.c +1 -2
@@ -1105,12 +1105,11 @@ static ssize_t cap_show(struct dma_chan {struct dma_device *dma = c->device; -return sprintf (page,"copy%s%s%s%s%s%s\n" , +return sprintf (page,"copy%s%s%s%s%s\n" ,dma_has_cap (DMA_PQ , dma->cap_mask) ?" pq" :"" ,dma_has_cap (DMA_PQ_VAL , dma->cap_mask) ?" pq_val" :"" ,dma_has_cap (DMA_XOR , dma->cap_mask) ?" xor" :"" ,dma_has_cap (DMA_XOR_VAL , dma->cap_mask) ?" xor_val" :"" , -dma_has_cap (DMA_MEMSET , dma->cap_mask) ?" fill" :"" ,dma_has_cap (DMA_INTERRUPT , dma->cap_mask) ?" intr" :"" ); }
drivers/dma/ioat/dma_v2.h +0 -1
@@ -123,7 +123,6 @@ static inline u16 ioat2_xferlen_to_descsstruct ioat_ring_ent {union {struct ioat_dma_descriptor *hw; -struct ioat_fill_descriptor *fill;struct ioat_xor_descriptor *xor;struct ioat_xor_ext_descriptor *xor_ex;struct ioat_pq_descriptor *pq;
drivers/dma/ioat/dma_v3.c +2 -112
150 lines not on this page · raw message
drivers/dma/ioat/hw.h +0 -27
@@ -100,33 +100,6 @@ struct ioat_dma_descriptor {uint64_t user2; }; -struct ioat_fill_descriptor { -uint32_t size; -union { -uint32_t ctl; -struct { -unsigned int int_en:1 ; -unsigned int rsvd:1 ; -unsigned int dest_snoop_dis:1 ; -unsigned int compl_write:1 ; -unsigned int fence:1 ; -unsigned int rsvd2:2 ; -unsigned int dest_brk:1 ; -unsigned int bundle:1 ; -unsigned int rsvd4:15 ; -#define IOAT_OP_FILL 0x01 -unsigned int op:8 ; - } ctl_f; - }; -uint64_t src_data; -uint64_t dst_addr; -uint64_t next; -uint64_t rsv1; -uint64_t next_dst_addr; -uint64_t user1; -uint64_t user2; -}; -struct ioat_xor_descriptor {uint32_t size;union {
drivers/dma/iop-adma.c +1 -65
96 lines not on this page · raw message
drivers/dma/mv_xor.c +3 -57
96 lines not on this page · raw message
drivers/dma/mv_xor.h +0 -1
@@ -31,7 +31,6 @@#define XOR_OPERATION_MODE_XOR 0#define XOR_OPERATION_MODE_MEMCPY 2 -#define XOR_OPERATION_MODE_MEMSET 4#define XOR_CURR_DESC (chan) (chan->mmr_base + 0x210 + (chan->idx * 4))#define XOR_NEXT_DESC (chan) (chan->mmr_base + 0x200 + (chan->idx * 4))
drivers/dma/ppc4xx/adma.c +0 -47
71 lines not on this page · raw message
include/linux/async_tx.h +0 -4
@@ -182,10 +182,6 @@ async_memcpy(struct page *dest, struct p unsigned int src_offset, size_t len, struct async_submit_ctl *submit); -struct dma_async_tx_descriptor * -async_memset (struct page *dest,int val,unsigned int offset, -size_t len,struct async_submit_ctl *submit); -struct dma_async_tx_descriptor *async_trigger_callback (struct async_submit_ctl *submit); struct dma_async_tx_descriptor *
include/linux/dmaengine.h +0 -5
@@ -66,7 +66,6 @@ enum dma_transaction_type {DMA_PQ ,DMA_XOR_VAL ,DMA_PQ_VAL , -DMA_MEMSET ,DMA_INTERRUPT ,DMA_SG , DMA_PRIVATE,
@@ -520,7 +519,6 @@ struct dma_tx_state {* @device_prep_dma_xor_val: prepares a xor validation operation * @device_prep_dma_pq: prepares a pq operation * @device_prep_dma_pq_val: prepares a pqzero_sum operation -* @device_prep_dma_memset: prepares a memset operation * @device_prep_dma_interrupt: prepares an end of chain interrupt operation * @device_prep_slave_sg: prepares a slave dma operation * @device_prep_dma_cyclic: prepare a cyclic dma operation suitable for audio.
@@ -573,9 +571,6 @@ struct dma_device { struct dma_chan *chan, dma_addr_t *pq, dma_addr_t *src, unsigned int src_cnt, const unsigned char *scf, size_t len, enum sum_check_flags *pqres, unsigned long flags); -struct dma_async_tx_descriptor *(*device_prep_dma_memset)( -struct dma_chan *chan,dma_addr_t dest,int value,size_t len, -unsigned long flags);struct dma_async_tx_descriptor *(*device_prep_dma_interrupt)(struct dma_chan *chan,unsigned long flags); struct dma_async_tx_descriptor *(*device_prep_dma_sg)(
Quoted 7 lines · Bartlomiej Zolnierkiewicz
There have never been any real users of MEMSET operations since they have been introduced in January 2007 (commit
7405f74badf46b5d023c5d2b670b4471525f6c91"dmaengine: refactor dmaengine arounddma_async_tx_descriptor"). Therefore remove support for them for now, it can be always brought back when needed.
Quoted 7 lines
Cc Vinod Koul <[email protected]>Cc Dan Williams <[email protected]>Cc Tomasz Figa <[email protected]>Cc Andrew Morton <[email protected]>Signed-off-by Bartlomiej Zolnierkiewicz <[email protected]>Signed-off-by Kyungmin Park <[email protected]>---
I see Andrew has already picked this up.
Bartlomiej,
Did you build test on the platforms you changed? You broke dove_defconfig:
In file included from /home/olof/work/next/include/linux/skbuff.h:31:0,
from /home/olof/work/next/include/linux/if_ether.h:23,
from /home/olof/work/next/include/net/dsa.h:14,
from /home/olof/work/next/arch/arm/plat-orion/common.c:21:/home/olof/work/next/arch/arm/plat-orion/common.c: In function 'orion_xor1_init':/home/olof/work/next/arch/arm/plat-orion/common.c:737:14: error:
'DMA_MEMSET' undeclared (first use in this function)
dma_cap_set(DMA_MEMSET, orion_xor1_channels_data[1].cap_mask);
^
/home/olof/work/next/include/linux/dmaengine.h:862:46: note: in
definition of macro 'dma_cap_set'
#define dma_cap_set(tx, mask) __dma_cap_set((tx), &(mask))
^
/home/olof/work/next/arch/arm/plat-orion/common.c:737:14: note: each
undeclared identifier is reported only once for each function it
appears in
dma_cap_set(DMA_MEMSET, orion_xor1_channels_data[1].cap_mask);
^/home/olof/work/next/include/linux/dmaengine.h:862:46: note: in definition of macro 'dma_cap_set'
#define dma_cap_set(tx, mask) __dma_cap_set((tx), &(mask))
This would also have been found by a "git grep DMA_MEMSET" across the tree.
Andrew, this is coming really late before the merge window, I think it makes sense to hold off to 3.12 if it can't be done without trivial regressions. :(
-Olof
Quoted 25 lines · Dan Williams
Quoted 7 lines · Bartlomiej Zolnierkiewicz
There have never been any real users of MEMSET operations since they have been introduced in January 2007 (commit
7405f74badf46b5d023c5d2b670b4471525f6c91"dmaengine: refactor dmaengine arounddma_async_tx_descriptor"). Therefore remove support for them for now, it can be always brought back when needed.Quoted 7 lines
Cc Vinod Koul <[email protected]>Cc Dan Williams <[email protected]>Cc Tomasz Figa <[email protected]>Cc Andrew Morton <[email protected]>Signed-off-by Bartlomiej Zolnierkiewicz <[email protected]>Signed-off-by Kyungmin Park <[email protected]>---
I see Andrew has already picked this up.
Acked-by Dan Williams <[email protected]>--
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Bartlomiej Zolnierkiewicz
Acked-by Dan WilliamsHi,
Quoted 28 lines · Olof Johansson
Bartlomiej,
Did you build test on the platforms you changed? You broke
dove_defconfig:In file included from
/home/olof/work/next/include/linux/skbuff.h:31:0,from /home/olof/work/next/include/linux/if_ether.h:23, from /home/olof/work/next/include/net/dsa.h:14, from /home/olof/work/next/arch/arm/plat-orion/common.c:21:
/home/olof/work/next/arch/arm/plat-orion/common.c: In function 'orion_xor1_init':/home/olof/work/next/arch/arm/plat-orion/common.c:737:14: error:
'DMA_MEMSET' undeclared (first use in this function)dma_cap_set(DMA_MEMSET, orion_xor1_channels_data[1].cap_mask); ^ /home/olof/work/next/include/linux/dmaengine.h:862:46: note: in definition of macro 'dma_cap_set' #define dma_cap_set(tx, mask) __dma_cap_set((tx), &(mask)) ^ /home/olof/work/next/arch/arm/plat-orion/common.c:737:14: note: each undeclared identifier is reported only once for each function it appears in dma_cap_set(DMA_MEMSET, orion_xor1_channels_data[1].cap_mask); ^
/home/olof/work/next/include/linux/dmaengine.h:862:46: note: in definition of macro 'dma_cap_set'
#definedma_cap_set(tx, mask)__dma_cap_set((tx), &(mask))
Quoted 5 lines
This would also have been found by a "git grep
DMA_MEMSET" across the tree.Andrew, this is coming really late before the merge window, I think it makes sense to hold off to 3.12 if it can't be done without trivial regressions. :(
Sorry for that. This is an old patch that I ported to current kernels. I fixed rejects and verified that it compiles for cases that hit rejects but unfortunately I forgot to check for new code related to DMA_MEMSET functionality. Fortunately it seems that the problematic places are in plat-orion/common.c and mv_xor.c. They are fixed in the attached patch.
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
Quoted 28 lines
-Olof
Quoted 25 lines · Dan Williams
Quoted 7 lines · Bartlomiej Zolnierkiewicz
There have never been any real users of MEMSET operations since they have been introduced in January 2007 (commit
7405f74badf46b5d023c5d2b670b4471525f6c91"dmaengine: refactor dmaengine arounddma_async_tx_descriptor"). Therefore remove support for them for now, it can be always brought back when needed.Quoted 7 lines
Cc Vinod Koul <[email protected]>Cc Dan Williams <[email protected]>Cc Tomasz Figa <[email protected]>Cc Andrew Morton <[email protected]>Signed-off-by Bartlomiej Zolnierkiewicz <[email protected]>Signed-off-by Kyungmin Park <[email protected]>---
I see Andrew has already picked this up.
Acked-by Dan Williams <[email protected]>--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected]
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
From: Bartlomiej Zolnierkiewicz <[email protected]>
Subject: [PATCH v2] DMA: remove unused support for MEMSET operations
There have never been any real users of MEMSET operations since they have been introduced in January 2007 by 7405f74badf4 ("dmaengine: refactor dmaengine around dma_async_tx_descriptor"). Therefore remove support for them for now, it can be always brought back when needed.
---
v2:
- fixed build problems noticed by Olof
- added Dan's Ack
v1:
- synced against next-20130626
previous submissions:
https://lkml.org/lkml/2012/12/5/116
https://lkml.org/lkml/2012/11/8/107
Documentation/crypto/async-tx-api.txt | 1 arch/arm/mach-iop13xx/setup.c | 3 arch/arm/plat-iop/adma.c | 2 arch/arm/plat-orion/common.c | 10 -- crypto/async_tx/Kconfig | 4 - crypto/async_tx/Makefile | 1 crypto/async_tx/async_memset.c | 89 -------------------------- drivers/dma/dmaengine.c | 7 -- drivers/dma/ioat/dma.c | 3 drivers/dma/ioat/dma_v2.h | 1 drivers/dma/ioat/dma_v3.c | 114 ---------------------------------- drivers/dma/ioat/hw.h | 27 -------- drivers/dma/iop-adma.c | 66 ------------------- drivers/dma/mv_xor.c | 62 ------------------ drivers/dma/mv_xor.h | 1 drivers/dma/ppc4xx/adma.c | 47 -------------- include/linux/async_tx.h | 4 - include/linux/dmaengine.h | 5 - 18 files changed, 7 insertions(+), 440 deletions(-)
Documentation/crypto/async-tx-api.txt +0 -1
@@ -222,5 +222,4 @@ drivers/dma/: location for offload engin include/linux/async_tx.h: core header file for the async_tx api crypto/async_tx/async_tx.c: async_tx interface to dmaengine and common code crypto/async_tx/async_memcpy.c: copy offload -crypto/async_tx/async_memset.c: memory fill offload crypto/async_tx/async_xor.c: xor and xor zero sum offload
arch/arm/mach-iop13xx/setup.c +0 -3
@@ -469,7 +469,6 @@ void __init iop13xx_platform_init(void)dma_cap_set (DMA_MEMCPY , plat_data->cap_mask);dma_cap_set (DMA_XOR , plat_data->cap_mask);dma_cap_set (DMA_XOR_VAL , plat_data->cap_mask); -dma_cap_set (DMA_MEMSET , plat_data->cap_mask);dma_cap_set (DMA_INTERRUPT , plat_data->cap_mask);break ;case IOP13XX_INIT_ADMA_1 :
@@ -479,7 +478,6 @@ void __init iop13xx_platform_init(void)dma_cap_set (DMA_MEMCPY , plat_data->cap_mask);dma_cap_set (DMA_XOR , plat_data->cap_mask);dma_cap_set (DMA_XOR_VAL , plat_data->cap_mask); -dma_cap_set (DMA_MEMSET , plat_data->cap_mask);dma_cap_set (DMA_INTERRUPT , plat_data->cap_mask);break ;case IOP13XX_INIT_ADMA_2 :
@@ -489,7 +487,6 @@ void __init iop13xx_platform_init(void)dma_cap_set (DMA_MEMCPY , plat_data->cap_mask);dma_cap_set (DMA_XOR , plat_data->cap_mask);dma_cap_set (DMA_XOR_VAL , plat_data->cap_mask); -dma_cap_set (DMA_MEMSET , plat_data->cap_mask);dma_cap_set (DMA_INTERRUPT , plat_data->cap_mask);dma_cap_set (DMA_PQ , plat_data->cap_mask);dma_cap_set (DMA_PQ_VAL , plat_data->cap_mask);
arch/arm/plat-iop/adma.c +0 -2
@@ -192,12 +192,10 @@ static int __init iop3xx_adma_cap_init(v#ifdef CONFIG_ARCH_IOP32X /* the 32x AAU does not perform zero sum */ dma_cap_set (DMA_XOR , iop3xx_aau_data.cap_mask); -dma_cap_set (DMA_MEMSET , iop3xx_aau_data.cap_mask);dma_cap_set (DMA_INTERRUPT , iop3xx_aau_data.cap_mask);#else dma_cap_set (DMA_XOR , iop3xx_aau_data.cap_mask);dma_cap_set (DMA_XOR_VAL , iop3xx_aau_data.cap_mask); -dma_cap_set (DMA_MEMSET , iop3xx_aau_data.cap_mask);dma_cap_set (DMA_INTERRUPT , iop3xx_aau_data.cap_mask);#endif
arch/arm/plat-orion/common.c +0 -10
@@ -666,14 +666,9 @@ void __init orion_xor0_init(unsigned lon orion_xor0_shared_resources[3 ].start = irq_1; orion_xor0_shared_resources[3 ].end = irq_1; -/* -* two engines can't do memset simultaneously, this limitation -* satisfied by removing memset support from one of the engines. -*/ dma_cap_set (DMA_MEMCPY , orion_xor0_channels_data[0 ].cap_mask);dma_cap_set (DMA_XOR , orion_xor0_channels_data[0 ].cap_mask); -dma_cap_set (DMA_MEMSET , orion_xor0_channels_data[1 ].cap_mask);dma_cap_set (DMA_MEMCPY , orion_xor0_channels_data[1 ].cap_mask);dma_cap_set (DMA_XOR , orion_xor0_channels_data[1 ].cap_mask);
@@ -732,14 +727,9 @@ void __init orion_xor1_init(unsigned lon orion_xor1_shared_resources[3 ].start = irq_1; orion_xor1_shared_resources[3 ].end = irq_1; -/* -* two engines can't do memset simultaneously, this limitation -* satisfied by removing memset support from one of the engines. -*/ dma_cap_set (DMA_MEMCPY , orion_xor1_channels_data[0 ].cap_mask);dma_cap_set (DMA_XOR , orion_xor1_channels_data[0 ].cap_mask); -dma_cap_set (DMA_MEMSET , orion_xor1_channels_data[1 ].cap_mask);dma_cap_set (DMA_MEMCPY , orion_xor1_channels_data[1 ].cap_mask);dma_cap_set (DMA_XOR , orion_xor1_channels_data[1 ].cap_mask);
crypto/async_tx/Kconfig +0 -4
@@ -10,10 +10,6 @@ config ASYNC_XOR select ASYNC_CORE select XOR_BLOCKS -config ASYNC_MEMSET - tristate - select ASYNC_CORE - config ASYNC_PQ tristate select ASYNC_CORE
crypto/async_tx/Makefile +0 -1
@@ -1,6 +1,5 @@ obj-$(CONFIG_ASYNC_CORE) += async_tx.o obj-$(CONFIG_ASYNC_MEMCPY) += async_memcpy.o -obj-$(CONFIG_ASYNC_MEMSET) += async_memset.o obj-$(CONFIG_ASYNC_XOR) += async_xor.o obj-$(CONFIG_ASYNC_PQ) += async_pq.o obj-$(CONFIG_ASYNC_RAID6_RECOV) += async_raid6_recov.o
crypto/async_tx/async_memset.c deleted +0 -89
89 lines not on this page · raw message
drivers/dma/dmaengine.c +0 -7
@@ -663,11 +663,6 @@ static bool device_has_all_tx_types(strureturn false;#endif -#if defined(CONFIG_ASYNC_MEMSET ) || defined(CONFIG_ASYNC_MEMSET_MODULE ) -if (!dma_has_cap (DMA_MEMSET , device->cap_mask)) -return false; -#endif -#if defined(CONFIG_ASYNC_XOR ) || defined(CONFIG_ASYNC_XOR_MODULE )if (!dma_has_cap (DMA_XOR , device->cap_mask))return false;
@@ -729,8 +724,6 @@ int dma_async_device_register(struct dma !device->device_prep_dma_pq);BUG_ON (dma_has_cap (DMA_PQ_VAL , device->cap_mask) && !device->device_prep_dma_pq_val); -BUG_ON (dma_has_cap (DMA_MEMSET , device->cap_mask) && - !device->device_prep_dma_memset);BUG_ON (dma_has_cap (DMA_INTERRUPT , device->cap_mask) && !device->device_prep_dma_interrupt); BUG_ON(dma_has_cap(DMA_SG, device->cap_mask) &&
drivers/dma/ioat/dma.c +1 -2
@@ -1105,12 +1105,11 @@ static ssize_t cap_show(struct dma_chan {struct dma_device *dma = c->device; -return sprintf (page,"copy%s%s%s%s%s%s\n" , +return sprintf (page,"copy%s%s%s%s%s\n" ,dma_has_cap (DMA_PQ , dma->cap_mask) ?" pq" :"" ,dma_has_cap (DMA_PQ_VAL , dma->cap_mask) ?" pq_val" :"" ,dma_has_cap (DMA_XOR , dma->cap_mask) ?" xor" :"" ,dma_has_cap (DMA_XOR_VAL , dma->cap_mask) ?" xor_val" :"" , -dma_has_cap (DMA_MEMSET , dma->cap_mask) ?" fill" :"" ,dma_has_cap (DMA_INTERRUPT , dma->cap_mask) ?" intr" :"" ); }
drivers/dma/ioat/dma_v2.h +0 -1
@@ -123,7 +123,6 @@ static inline u16 ioat2_xferlen_to_descsstruct ioat_ring_ent {union {struct ioat_dma_descriptor *hw; -struct ioat_fill_descriptor *fill;struct ioat_xor_descriptor *xor;struct ioat_xor_ext_descriptor *xor_ex;struct ioat_pq_descriptor *pq;
drivers/dma/ioat/dma_v3.c +2 -112
150 lines not on this page · raw message
drivers/dma/ioat/hw.h +0 -27
@@ -100,33 +100,6 @@ struct ioat_dma_descriptor {uint64_t user2; }; -struct ioat_fill_descriptor { -uint32_t size; -union { -uint32_t ctl; -struct { -unsigned int int_en:1 ; -unsigned int rsvd:1 ; -unsigned int dest_snoop_dis:1 ; -unsigned int compl_write:1 ; -unsigned int fence:1 ; -unsigned int rsvd2:2 ; -unsigned int dest_brk:1 ; -unsigned int bundle:1 ; -unsigned int rsvd4:15 ; -#define IOAT_OP_FILL 0x01 -unsigned int op:8 ; - } ctl_f; - }; -uint64_t src_data; -uint64_t dst_addr; -uint64_t next; -uint64_t rsv1; -uint64_t next_dst_addr; -uint64_t user1; -uint64_t user2; -}; -struct ioat_xor_descriptor {uint32_t size;union {
drivers/dma/iop-adma.c +1 -65
96 lines not on this page · raw message
drivers/dma/mv_xor.c +3 -59
104 lines not on this page · raw message
drivers/dma/mv_xor.h +0 -1
@@ -31,7 +31,6 @@#define XOR_OPERATION_MODE_XOR 0#define XOR_OPERATION_MODE_MEMCPY 2 -#define XOR_OPERATION_MODE_MEMSET 4#define XOR_CURR_DESC (chan) (chan->mmr_base + 0x210 + (chan->idx * 4))#define XOR_NEXT_DESC (chan) (chan->mmr_base + 0x200 + (chan->idx * 4))
drivers/dma/ppc4xx/adma.c +0 -47
71 lines not on this page · raw message
include/linux/async_tx.h +0 -4
@@ -182,10 +182,6 @@ async_memcpy(struct page *dest, struct p unsigned int src_offset, size_t len, struct async_submit_ctl *submit); -struct dma_async_tx_descriptor * -async_memset (struct page *dest,int val,unsigned int offset, -size_t len,struct async_submit_ctl *submit); -struct dma_async_tx_descriptor *async_trigger_callback (struct async_submit_ctl *submit); struct dma_async_tx_descriptor *
include/linux/dmaengine.h +0 -5
@@ -66,7 +66,6 @@ enum dma_transaction_type {DMA_PQ ,DMA_XOR_VAL ,DMA_PQ_VAL , -DMA_MEMSET ,DMA_INTERRUPT ,DMA_SG , DMA_PRIVATE,
@@ -520,7 +519,6 @@ struct dma_tx_state {* @device_prep_dma_xor_val: prepares a xor validation operation * @device_prep_dma_pq: prepares a pq operation * @device_prep_dma_pq_val: prepares a pqzero_sum operation -* @device_prep_dma_memset: prepares a memset operation * @device_prep_dma_interrupt: prepares an end of chain interrupt operation * @device_prep_slave_sg: prepares a slave dma operation * @device_prep_dma_cyclic: prepare a cyclic dma operation suitable for audio.
@@ -573,9 +571,6 @@ struct dma_device { struct dma_chan *chan, dma_addr_t *pq, dma_addr_t *src, unsigned int src_cnt, const unsigned char *scf, size_t len, enum sum_check_flags *pqres, unsigned long flags); -struct dma_async_tx_descriptor *(*device_prep_dma_memset)( -struct dma_chan *chan,dma_addr_t dest,int value,size_t len, -unsigned long flags);struct dma_async_tx_descriptor *(*device_prep_dma_interrupt)(struct dma_chan *chan,unsigned long flags); struct dma_async_tx_descriptor *(*device_prep_dma_sg)(
Quoted 37 lines · Bartlomiej Zolnierkiewicz
Hi,
Quoted 28 lines · Olof Johansson
Bartlomiej,
Did you build test on the platforms you changed? You broke
dove_defconfig:In file included from
/home/olof/work/next/include/linux/skbuff.h:31:0,from /home/olof/work/next/include/linux/if_ether.h:23, from /home/olof/work/next/include/net/dsa.h:14, from /home/olof/work/next/arch/arm/plat-orion/common.c:21:
/home/olof/work/next/arch/arm/plat-orion/common.c: In function 'orion_xor1_init':/home/olof/work/next/arch/arm/plat-orion/common.c:737:14: error:
'DMA_MEMSET' undeclared (first use in this function)dma_cap_set(DMA_MEMSET, orion_xor1_channels_data[1].cap_mask); ^ /home/olof/work/next/include/linux/dmaengine.h:862:46: note: in definition of macro 'dma_cap_set' #define dma_cap_set(tx, mask) __dma_cap_set((tx), &(mask)) ^ /home/olof/work/next/arch/arm/plat-orion/common.c:737:14: note: each undeclared identifier is reported only once for each function it appears in dma_cap_set(DMA_MEMSET, orion_xor1_channels_data[1].cap_mask); ^
/home/olof/work/next/include/linux/dmaengine.h:862:46: note: in definition of macro 'dma_cap_set'
#definedma_cap_set(tx, mask)__dma_cap_set((tx), &(mask))Quoted 5 lines
This would also have been found by a "git grep
DMA_MEMSET" across the tree.Andrew, this is coming really late before the merge window, I think it makes sense to hold off to 3.12 if it can't be done without trivial regressions. :(
Quoted 5 lines
Sorry for that. This is an old patch that I ported to current kernels. I fixed rejects and verified that it compiles for cases that hit rejects but unfortunately I forgot to check for new code related to
DMA_MEMSETfunctionality. Fortunately it seems that the problematic places are inplat-orion/common.candmv_xor.c. They are fixed in the attached patch.
I just verified that v2 builds now on ARM dove_defconfig and kirkwood_defconfig (those were 2 that I noticed were broken by this change.)
Hopefully Andrew can pick up v2.
Thanks,
Kevin