Skip to contentSkip to conversation

ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412

PATCH Superseded Tomasz Figa 3 participants 3 messages Aug 28, 2012

Subsystems (3)
Arm (32-bit) Arm sub-architectures Arm Samsung Exynos

v1 of 2 Superseded Latest is v2 →

lore
Share & tools
lore

Tomasz Figa

author
#0 lore raw

PATCH 1/1 ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412

Exynos4412 uses different information register for each core. This patch adjusts the bring-up code to take that into account.

Signed-off-by Tomasz Figa <[email protected]>
Signed-off-by Kyungmin Park <[email protected]>
---
 arch/arm/mach-exynos/platsmp.c | 25 ++++++++++++++++++++-----
 1 file changed, 20 insertions(+), 5 deletions(-)
arch/arm/mach-exynos/platsmp.c +20 -5
index 36c3984..1114ced 100644
@@ -34,8 +34,19 @@
 
 extern void exynos4_secondary_startup(void);
 
-#define CPU1_BOOT_REG		(samsung_rev() == EXYNOS4210_REV_1_1 ? \
-				S5P_INFORM5 : S5P_VA_SYSRAM)
+static inline volatile void *cpu_boot_reg_base(void)
+{
+	if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
+		return S5P_INFORM5;
+	return S5P_VA_SYSRAM;
+}
+
+static inline volatile void *cpu_boot_reg(int cpu)
+{
+	if (soc_is_exynos4412())
+		return cpu_boot_reg_base() + 4*cpu;
+	return cpu_boot_reg_base();
+}
 
 /*
  * control for which core is the next to come out of the secondary

@@ -138,7 +149,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
 		smp_rmb();
 
 		__raw_writel(virt_to_phys(exynos4_secondary_startup),
-			CPU1_BOOT_REG);
+							cpu_boot_reg(cpu));
 		gic_raise_softirq(cpumask_of(cpu), 1);
 
 		if (pen_release == -1)

@@ -186,6 +197,8 @@ void __init smp_init_cpus(void)
 
 void __init platform_smp_prepare_cpus(unsigned int max_cpus)
 {
+	int i;
+
 	if (!soc_is_exynos5250())
 		scu_enable(scu_base_addr());
 

@@ -195,6 +208,8 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
 	 * until it receives a soft interrupt, and then the
 	 * secondary CPU branches to this address.
 	 */
-	__raw_writel(virt_to_phys(exynos4_secondary_startup),
-			CPU1_BOOT_REG);
+	for (i = 1; i < max_cpus; ++i) {
+		__raw_writel(virt_to_phys(exynos4_secondary_startup),
+							cpu_boot_reg(i));
+	}
 }
Signature · 1 line
1.7.12
#1 lore raw

PATCH 1/1 ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412

arch/arm/mach-exynos/platsmp.c line 37

Quoted 11 lines · Tomasz Figa
arch/arm/mach-exynos/platsmp.c +1 -2
index 36c3984..1114ced 100644
@@ -34,8 +34,19 @@
 
 extern void exynos4_secondary_startup(void);
 
-#define CPU1_BOOT_REG		(samsung_rev() == EXYNOS4210_REV_1_1 ? \
-				S5P_INFORM5 : S5P_VA_SYSRAM)
+static inline volatile void *cpu_boot_reg_base(void)

__iomem?

arch/arm/mach-exynos/platsmp.c line 44

Quoted 7 lines
arch/arm/mach-exynos/platsmp.c +7 -0
+{
+	if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
+		return S5P_INFORM5;
+	return S5P_VA_SYSRAM;
+}
+
+static inline volatile void *cpu_boot_reg(int cpu)

__iomem? And why volatile?

Quoted 9 lines
arch/arm/mach-exynos/platsmp.c +5 -0
+{
+	if (soc_is_exynos4412())
+		return cpu_boot_reg_base() + 4*cpu;
+	return cpu_boot_reg_base();
+}
 
 /*
  * control for which core is the next to come out of the secondary

arch/arm/mach-exynos/platsmp.c void __init platform_smp_prepare_cpus(unsigned int max_cpus) · line 213

Quoted 8 lines
arch/arm/mach-exynos/platsmp.c +3 -2
@@ -195,6 +208,8 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
 	 * until it receives a soft interrupt, and then the
 	 * secondary CPU branches to this address.
 	 */
-	__raw_writel(virt_to_phys(exynos4_secondary_startup),
-			CPU1_BOOT_REG);
+	for (i = 1; i < max_cpus; ++i) {
+		__raw_writel(virt_to_phys(exynos4_secondary_startup),
+							cpu_boot_reg(i));

Do you need to use cpu_logical_map()?

Signature · 2 lines
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
#2 lore raw

PATCH 1/1 ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412

Hi,

Thanks for reviewing the patch.

Quoted 7 lines · On Tuesday 28 of August 2012 09:21:40 Stephen Boyd wrote:
Quoted 6 lines · Tomasz Figa
(quoted diff) +0 -0

b/arch/arm/mach-exynos/platsmp.c index 36c3984..1114ced 100644

arch/arm/mach-exynos/platsmp.c +0 -0
@@ -34,8 +34,19 @@
Quoted 7 lines

arch/arm/mach-exynos/platsmp.c line 37

Quoted 5 lines
arch/arm/mach-exynos/platsmp.c +1 -2
 extern void exynos4_secondary_startup(void);
 
-#define CPU1_BOOT_REG		(samsung_rev() == EXYNOS4210_REV_1_1 ? \
-				S5P_INFORM5 : S5P_VA_SYSRAM)
+static inline volatile void *cpu_boot_reg_base(void)

__iomem?

Sorry, bad habit. I will fix it.

Quoted 9 lines

arch/arm/mach-exynos/platsmp.c line 44

Quoted 7 lines
arch/arm/mach-exynos/platsmp.c +7 -0
+{
+	if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
+		return S5P_INFORM5;
+	return S5P_VA_SYSRAM;
+}
+
+static inline volatile void *cpu_boot_reg(int cpu)

__iomem? And why volatile?

Ditto.

Quoted 16 lines
Quoted 16 lines
arch/arm/mach-exynos/platsmp.c +5 -0
+{
+	if (soc_is_exynos4412())
+		return cpu_boot_reg_base() + 4*cpu;
+	return cpu_boot_reg_base();
+}
 
 /*

* control for which core is the next to come out of the secondary

arch/arm/mach-exynos/platsmp.c +0 -0
@@ -195,6 +208,8 @@ void __init platform_smp_prepare_cpus(unsigned int

max_cpus)>

arch/arm/mach-exynos/platsmp.c +0 -0
 	 * until it receives a soft interrupt, and then the
 	 * secondary CPU branches to this address.
 	 */
Quoted 7 lines

arch/arm/mach-exynos/platsmp.c void __init platform_smp_prepare_cpus(unsigned int max_cpus) · line 213

Quoted 5 lines
arch/arm/mach-exynos/platsmp.c +3 -2
-	__raw_writel(virt_to_phys(exynos4_secondary_startup),
-			CPU1_BOOT_REG);
+	for (i = 1; i < max_cpus; ++i) {
+		__raw_writel(virt_to_phys(exynos4_secondary_startup),
+							cpu_boot_reg(i));

Do you need to use cpu_logical_map()?

Correct me if I am wrong, but physical to logical CPU mapping will not be 1:1 only if booted on physical CPU other than 0. I have not seen yet an Exynos-based board which does it.

However it might be wiser to use cpu_logical_map() just to be safe indeed. I will add it in next version of the patch.

--
Best regards,
Tomasz Figa