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ARM: dts: Alpine platform binding documentation

PATCH New Tsahee Zidenberg 2 participants 2 messages Mar 12, 2015 – Mar 16, 2015 Device tree bindings

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PATCH v6 4/6 ARM: dts: Alpine platform binding documentation

This patch introduces documentation for alpine devicetree bindings.

---
 .../devicetree/bindings/arm/al,alpine.txt          | 88 ++++++++++++++++++++++
 .../bindings/arm/cpu-enable-method/al,alpine-smp   | 52 +++++++++++++
 .../devicetree/bindings/vendor-prefixes.txt        |  2 +
 3 files changed, 142 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/al,alpine.txt
 create mode 100644 Documentation/devicetree/bindings/arm/cpu-enable-method/al,alpine-smp
Documentation/devicetree/bindings/arm/al,alpine.txt new file +88 -0
new file mode 100644
index 0000000..f404a4f
@@ -0,0 +1,88 @@
+Annapurna Labs Alpine Platform Device Tree Bindings
+---------------------------------------------------------------
+
+Boards in the Alpine family shall have the following properties:
+
+* Required root node properties:
+compatible: must contain "al,alpine"
+
+* Example:
+
+/ {
+	model = "Annapurna Labs Alpine Dev Board";
+	compatible = "al,alpine";
+
+	...
+}
+
+* CPU node:
+
+The Alpine platform includes cortex-a15 cores.
+enable-method: must be "al,alpine-smp" to allow smp  [1]
+
+Example:
+
+cpus {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	enable-method = "al,alpine-smp";
+
+	cpu at 0 {
+		compatible = "arm,cortex-a15";
+		device_type = "cpu";
+		reg = <0>;
+	};
+
+	cpu at 1 {
+		compatible = "arm,cortex-a15";
+		device_type = "cpu";
+		reg = <1>;
+	};
+
+	cpu at 2 {
+		compatible = "arm,cortex-a15";
+		device_type = "cpu";
+		reg = <2>;
+	};
+
+	cpu at 3 {
+		compatible = "arm,cortex-a15";
+		device_type = "cpu";
+		reg = <3>;
+	};
+};
+
+
+* Alpine CPU resume registers
+
+The CPU resume register are used to define required resume address after
+reset.
+
+Properties:
+- compatible : Should contain "al,alpine-cpu-resume".
+- reg : Offset and length of the register set for the device
+
+Example:
+
+cpu_resume {
+	compatible = "al,alpine-cpu-resume";
+	reg = <0xfbff5ed0 0x30>;
+};
+
+* Alpine System-Fabric Service Registers
+
+The System-Fabric Service Registers allow various operation on CPU and
+system fabric, like powering CPUs off.
+
+Properties:
+- compatible : Should contain "al,alpine-sysfabric-service" and "syscon".
+- reg : Offset and length of the register set for the device
+
+Example:
+
+nb_service {
+        compatible = "al,alpine-sysfabric-service", "syscon";
+        reg = <0xfb070000 0x10000>;
+};
+
+[1] arm/cpu-enable-method/al,alpine-smp
Documentation/devicetree/bindings/arm/cpu-enable-method/al,alpine-smp new file +52 -0

52 lines not on this page · raw message

Documentation/devicetree/bindings/vendor-prefixes.txt +2 -0
index aeb5bb5..cb94a098 100644
@@ -11,6 +11,8 @@ adapteva	Adapteva, Inc.
 adh	AD Holdings Plc.
 adi	Analog Devices, Inc.
 aeroflexgaisler	Aeroflex Gaisler AB
+ak	Asahi Kasei Corp.
+al	Annapurna Labs
 allwinner	Allwinner Technology Co., Ltd.
 alphascale	AlphaScale Integrated Circuits Systems, Inc.
 altr	Altera Corp.
Signature · 1 line
1.9.1
#1 lore raw

PATCH v6 4/6 ARM: dts: Alpine platform binding documentation

Quoted 6 lines · On Thursday 12 March 2015 13:53:09 Tsahee Zidenberg wrote:
Documentation/devicetree/bindings/vendor-prefixes.txt +0 -0
index aeb5bb5..cb94a098 100644

Documentation/devicetree/bindings/vendor-prefixes.txt adapteva Adapteva, Inc. · line 18

Quoted 8 lines
Documentation/devicetree/bindings/vendor-prefixes.txt +2 -0
@@ -11,6 +11,8 @@ adapteva      Adapteva, Inc.
 adh    AD Holdings Plc.
 adi    Analog Devices, Inc.
 aeroflexgaisler        Aeroflex Gaisler AB
+ak     Asahi Kasei Corp.
+al     Annapurna Labs
 allwinner      Allwinner Technology Co., Ltd.
 alphascale     AlphaScale Integrated Circuits Systems, Inc.
 altr   Altera Corp.

The Asahi Kasei entry seems to be the result of an incorrect rebase, I've edited the patch to remove this.

Arnd