ARM: dts: rockchip: add hym8563 rtc to Radxa Rock board
PATCH 1/2 ARM: dts: rockchip: add hym8563 rtc to Radxa Rock board
The Radxa Rock uses a hym8563 as rtc. Add the i2c device and necessary pinconfig for the interrupt pin - labeled rtc_int in the schematics.
---
if nobody complains I'll queue this into my v3.18-next/dts branch
arch/arm/boot/dts/rk3188-radxarock.dts | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)
arch/arm/boot/dts/rk3188-radxarock.dts +17 -0
@@ -80,6 +80,17 @@ status = "okay"; clock-frequency = <400000>; + rtc at 51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + interrupt-parent = <&gpio0>; + interrupts = <13 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&rtc_int>; + #clock-cells = <0>; + clock-output-names = "xin32k"; + }; + act8846: act8846 at 5a { compatible = "active-semi,act8846"; reg = <0x5a>;
@@ -196,6 +207,12 @@ }; }; + hym8563 { + rtc_int: rtc-int { + rockchip,pins = <RK_GPIO0 0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + ir-receiver { ir_recv_pin: ir-recv-pin { rockchip,pins = <RK_GPIO0 10 RK_FUNC_GPIO &pcfg_pull_none>;
Signature · 1 line
1.9.0
PATCH 1/2 ARM: dts: rockchip: add hym8563 rtc to Radxa Rock board
Am Mittwoch, 20. August 2014, 21:07:22 schrieb Heiko St?bner:
Quoted 4 lines
The Radxa Rock uses a hym8563 as rtc. Add the i2c device and necessary pinconfig for the interrupt pin - labeled
rtc_intin the schematics.Signed-off-by Heiko Stuebner <[email protected]>
Added both patches to my v3.18-next/dts branch.
Quoted 41 lines
---
if nobody complains I'll queue this into my v3.18-next/dts brancharch/arm/boot/dts/rk3188-radxarock.dts | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)(quoted diff) +0
-0
b/arch/arm/boot/dts/rk3188-radxarock.dtsindex ef72faf..ff35acfa 100644arch/arm/boot/dts/rk3188-radxarock.dts +17
-0@@ -80,6 +80,17 @@ status = "okay"; clock-frequency = <400000>; + rtc at 51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + interrupt-parent = <&gpio0>; + interrupts = <13 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&rtc_int>; + #clock-cells = <0>; + clock-output-names = "xin32k"; + }; + act8846: act8846 at 5a { compatible = "active-semi,act8846"; reg = <0x5a>;@@ -196,6 +207,12 @@ }; }; + hym8563 { + rtc_int: rtc-int { + rockchip,pins = <RK_GPIO0 0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + ir-receiver { ir_recv_pin: ir-recv-pin { rockchip,pins = <RK_GPIO0 10 RK_FUNC_GPIO &pcfg_pull_none>;
PATCH 2/2 ARM: dts: rockchip: add saradc nodes
In reply to Heiko StübnerAdd the core device nodes for the SARADC found on both the Cortex-A9 series (rk3066 and rk3188) as well as the newer rk3288.
---
if nobody complains I'll queue this into my v3.18-next/dts branch
arch/arm/boot/dts/rk3288.dtsi | 10 ++++++++++ arch/arm/boot/dts/rk3xxx.dtsi | 10 ++++++++++ 2 files changed, 20 insertions(+)
arch/arm/boot/dts/rk3288.dtsi +10 -0
@@ -98,6 +98,16 @@ status = "disabled"; }; + saradc: saradc at ff100000 { + compatible = "rockchip,saradc"; + reg = <0xff100000 0x100>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + #io-channel-cells = <1>; + clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; + clock-names = "saradc", "apb_pclk"; + status = "disabled"; + }; + i2c1: i2c at ff140000 { compatible = "rockchip,rk3288-i2c"; reg = <0xff140000 0x1000>;
arch/arm/boot/dts/rk3xxx.dtsi +10 -0
@@ -264,4 +264,14 @@ clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>; status = "disabled"; }; + + saradc: saradc at 2006c000 { + compatible = "rockchip,saradc"; + reg = <0x2006c000 0x100>; + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; + #io-channel-cells = <1>; + clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; + clock-names = "saradc", "apb_pclk"; + status = "disabled"; + }; };
Signature · 1 line
1.9.0