fsl_elbc_nand.c and nand_boot_fsl_elbc.c for large page devices
So I have a few quick questions/observations.
1. I don't see anywhere that the AL (address length, or number of address cycles) can be set to anything other than 2. It appears to be hard coded in both files.
2. nand_boot_fsl_elbc.c uses ECCM = 1 for large page devices, but I don't see a place where fsl_elbc_nand.c sets ECCM to 1 for similar devices. The result, I believe, is that if I try to write a new u-boot into the large page flash device it will be written with ECCM = 0. When I try to reset the board it will be read with ECCM = 1 (inside of nand_boot_fsl_elbc.c) resulting in an ecc error in the LTESR.
I would be more than happy to help make these changes (if necessary) but I don't know if there is already a fix in the works, or if perhaps I am wrong in these two assumptions.
Ron
Quoted 3 lines · Ron Madrid
1. I don't see anywhere that the AL (address length, or number of address cycles) can be set to anything other than 2. It appears to be hard coded in both files.
Correct. AFAICT, setting AL to anything less than 2 is just an optimization for small flashes. Linux will make that optimization, but the way NAND devices are currently probed in u-boot makes that awkward (no opportunity to run code after size is known, but before nand_scan_tail).
Quoted 3 lines
2.
nand_boot_fsl_elbc.cuses ECCM = 1 for large page devices, but I don't see a place wherefsl_elbc_nand.csets ECCM to 1 for similar devices.
That looks like a bug.
-Scott
So is there a particular convention for which bytes should be used within the OOB area for an ECC? I've looked for information on this but haven't been able to come up with anything.
Quoted 30 lines · Scott Wood
From: Scott Wood <[email protected]>
Subject: Re: [U-Boot]fsl_elbc_nand.candnand_boot_fsl_elbc.cfor large page devices
To: "Ron Madrid" <[email protected]>
Cc: u-boot at lists.denx.de
Date: Thursday, October 16, 2008, 12:17 PMQuoted 1 line · Ron Madrid
1. I don't see anywhere that the AL (address
length, or number of
Quoted 1 line
address cycles) can be set to anything other than 2.
It appears to be
Quoted 1 line
hard coded in both files.
Correct. AFAICT, setting AL to anything less than 2 is just an
optimization for small flashes. Linux will make that optimization, but
the way NAND devices are currently probed in u-boot makes that awkward
(no opportunity to run code after size is known, but beforenand_scan_tail).Quoted 1 line
2.
nand_boot_fsl_elbc.cuses ECCM = 1 for large pagedevices, but I
Quoted 1 line
don't see a place where
fsl_elbc_nand.csets ECCMto 1 for similar
Quoted 1 line
devices.
That looks like a bug.
-Scott
Quoted 3 lines · Ron Madrid
So is there a particular convention for which bytes should be used within the OOB area for an ECC? I've looked for information on this but haven't been able to come up with anything.
The 8313 manual says that when booting from NAND, it expects ECCM 0 on small page and ECCM 1 on large page.
BTW, can you get your e-mail client to wrap long lines?
-Scott