soc: renesas: Add R-Car SYSC PM Domain Support

index 14c42a1bdf1ef20d..4174cbcbc467d047 100644
@@ -9,9 +9,10 @@
  * for more details.
  */
 
+#include <linux/soc/renesas/rcar-sysc.h>
+
 #include <asm/io.h>
 
-#include "pm-rcar.h"
 #include "r8a7779.h"
 
 /* SYSC */

index 6815781ad1165ef3..691ac166a277c03f 100644
@@ -13,9 +13,9 @@
 #include <linux/kernel.h>
 #include <linux/of.h>
 #include <linux/smp.h>
+#include <linux/soc/renesas/rcar-sysc.h>
 #include <asm/io.h>
 #include "common.h"
-#include "pm-rcar.h"
 #include "rcar-gen2.h"
 
 /* RST */

index f5c31fbc10b2efbf..c6951ee245889b8f 100644
@@ -19,13 +19,13 @@
 #include <linux/spinlock.h>
 #include <linux/io.h>
 #include <linux/delay.h>
+#include <linux/soc/renesas/rcar-sysc.h>
 
 #include <asm/cacheflush.h>
 #include <asm/smp_plat.h>
 #include <asm/smp_scu.h>
 
 #include "common.h"
-#include "pm-rcar.h"
 #include "r8a7779.h"
 
 #define AVECR IOMEM(0xfe700040)

index f6426c6fdefcb489..28f26d5362d8d4d2 100644
@@ -17,12 +17,12 @@
 #include <linux/init.h>
 #include <linux/smp.h>
 #include <linux/io.h>
+#include <linux/soc/renesas/rcar-sysc.h>
 
 #include <asm/smp_plat.h>
 
 #include "common.h"
 #include "platsmp-apmu.h"
-#include "pm-rcar.h"
 #include "rcar-gen2.h"
 #include "r8a7790.h"
 

similarity index 99%
rename from arch/arm/mach-shmobile/pm-rcar.c
rename to drivers/soc/renesas/rcar-sysc.c
index 0af05d288b09c3ab..d59bcdf78f0b56ba 100644
@@ -13,7 +13,7 @@
 #include <linux/mm.h>
 #include <linux/spinlock.h>
 #include <linux/io.h>
-#include "pm-rcar.h"
+#include <linux/soc/renesas/rcar-sysc.h>
 
 /* SYSC Common */
 #define SYSCSR			0x00	/* SYSC Status Register */

similarity index 66%
rename from arch/arm/mach-shmobile/pm-rcar.h
rename to include/linux/soc/renesas/rcar-sysc.h
index 1b901db4a24c4633..96f30c2883881d97 100644
@@ -1,5 +1,7 @@
-#ifndef PM_RCAR_H
-#define PM_RCAR_H
+#ifndef __LINUX_SOC_RENESAS_RCAR_SYSC_H__
+#define __LINUX_SOC_RENESAS_RCAR_SYSC_H__
+
+#include <linux/types.h>
 
 struct rcar_sysc_ch {
 	u16 chan_offs;

@@ -12,4 +14,4 @@ int rcar_sysc_power_up(const struct rcar_sysc_ch *sysc_ch);
 bool rcar_sysc_power_is_off(const struct rcar_sysc_ch *sysc_ch);
 void __iomem *rcar_sysc_init(phys_addr_t base);
 
-#endif /* PM_RCAR_H */
+#endif /* __LINUX_SOC_RENESAS_RCAR_SYSC_H__ */

index d59bcdf78f0b56ba..9ba5fd15c53bf9b9 100644
@@ -128,7 +128,7 @@ static int rcar_sysc_power(const struct rcar_sysc_ch *sysc_ch, bool on)
  out:
 	spin_unlock_irqrestore(&rcar_sysc_lock, flags);
 
-	pr_debug("sysc power domain %d: %08x -> %d\n",
+	pr_debug("sysc power %s domain %d: %08x -> %d\n", on ? "on" : "off",
 		 sysc_ch->isr_bit, ioread32(rcar_sysc_base + SYSCISR), ret);
 	return ret;
 }

index 9ba5fd15c53bf9b9..6b21ea2a65bf59b9 100644
@@ -2,6 +2,7 @@
  * R-Car SYSC Power management support
  *
  * Copyright (C) 2014  Magnus Damm
+ * Copyright (C) 2015-2016 Glider bvba
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive

@@ -11,10 +12,15 @@
 #include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/mm.h>
+#include <linux/of_address.h>
+#include <linux/pm_domain.h>
+#include <linux/slab.h>
 #include <linux/spinlock.h>
 #include <linux/io.h>
 #include <linux/soc/renesas/rcar-sysc.h>
 
+#include "rcar-sysc.h"
+
 /* SYSC Common */
 #define SYSCSR			0x00	/* SYSC Status Register */
 #define SYSCISR			0x04	/* Interrupt Status Register */

@@ -162,3 +168,199 @@ void __iomem *rcar_sysc_init(phys_addr_t base)
 
 	return rcar_sysc_base;
 }
+
+struct rcar_sysc_pd {
+	struct generic_pm_domain genpd;
+	struct rcar_sysc_ch ch;
+	unsigned int flags;
+	char name[0];
+};
+
+static inline struct rcar_sysc_pd *to_rcar_pd(struct generic_pm_domain *d)
+{
+	return container_of(d, struct rcar_sysc_pd, genpd);
+}
+
+static bool rcar_sysc_active_wakeup(struct device *dev)
+{
+	return true;
+}
+
+static int rcar_sysc_pd_power_off(struct generic_pm_domain *genpd)
+{
+	struct rcar_sysc_pd *pd = to_rcar_pd(genpd);
+
+	pr_debug("%s: %s\n", __func__, genpd->name);
+
+	if (pd->flags & PD_NO_CR) {
+		pr_debug("%s: Cannot control %s\n", __func__, genpd->name);
+		return -EBUSY;
+	}
+
+	if (pd->flags & PD_BUSY) {
+		pr_debug("%s: %s busy\n", __func__, genpd->name);
+		return -EBUSY;
+	}
+
+	return rcar_sysc_power_down(&pd->ch);
+}
+
+static int rcar_sysc_pd_power_on(struct generic_pm_domain *genpd)
+{
+	struct rcar_sysc_pd *pd = to_rcar_pd(genpd);
+
+	pr_debug("%s: %s\n", __func__, genpd->name);
+
+	if (pd->flags & PD_NO_CR) {
+		pr_debug("%s: Cannot control %s\n", __func__, genpd->name);
+		return 0;
+	}
+
+	return rcar_sysc_power_up(&to_rcar_pd(genpd)->ch);
+}
+
+static void __init rcar_sysc_pd_setup(struct device_node *np,
+				      struct rcar_sysc_pd *pd)
+{
+	struct generic_pm_domain *genpd = &pd->genpd;
+	const char *name = pd->genpd.name;
+	struct dev_power_governor *gov = &simple_qos_governor;
+
+	if (pd->flags & PD_CPU) {
+		/*
+		 * This domain contains a CPU core and therefore it should
+		 * only be turned off if the CPU is not in use.
+		 */
+		pr_debug("PM domain %s contains CPU\n", name);
+		pd->flags |= PD_BUSY;
+		gov = &pm_domain_always_on_gov;
+	} else if (pd->flags & PD_SCU) {
+		/*
+		 * This domain contains an SCU and cache-controller, and
+		 * therefore it should only be turned off if the CPU cores are
+		 * not in use.
+		 */
+		pr_debug("PM domain %s contains SCU\n", name);
+		pd->flags |= PD_BUSY;
+		gov = &pm_domain_always_on_gov;
+	} else if (pd->flags & PD_NO_CR) {
+		/*
+		 * This domain cannot be turned off.
+		 */
+		pd->flags |= PD_BUSY;
+		gov = &pm_domain_always_on_gov;
+	}
+
+	pm_genpd_init(genpd, gov, false);
+	genpd->dev_ops.active_wakeup = rcar_sysc_active_wakeup;
+	genpd->power_off = rcar_sysc_pd_power_off;
+	genpd->power_on = rcar_sysc_pd_power_on;
+
+	if (pd->flags & (PD_CPU | PD_NO_CR)) {
+		/* Skip CPUs (handled by SMP code) and areas without control */
+		pr_debug("%s: Not touching %s\n", __func__, genpd->name);
+		return;
+	}
+
+	if (!rcar_sysc_power_is_off(&pd->ch)) {
+		pr_debug("%s: %s is already powered\n", __func__, genpd->name);
+		return;
+	}
+
+	rcar_sysc_power_up(&pd->ch);
+}
+
+static const struct of_device_id rcar_sysc_matches[] = {
+	{ /* sentinel */ }
+};
+
+struct rcar_pm_domains {
+	struct genpd_onecell_data onecell_data;
+	struct generic_pm_domain *domains[0];
+};
+
+static int __init rcar_sysc_pd_init(void)
+{
+	const struct rcar_sysc_info *info;
+	const struct of_device_id *match;
+	struct rcar_pm_domains *domains;
+	struct device_node *np;
+	unsigned int i, n = 0;
+	void __iomem *base;
+	u32 syscier = 0;
+	int error;
+
+	np = of_find_matching_node_and_match(NULL, rcar_sysc_matches, &match);
+	if (!np)
+		return -ENODEV;
+
+	info = match->data;
+
+	base = of_iomap(np, 0);
+	if (!base) {
+		pr_warn("%s cannot map reg 0\n", np->full_name);
+		error = -ENOMEM;
+		goto fail_put;
+	}
+
+	rcar_sysc_base = base;
+
+	for (i = 0; i < info->num_areas; i++) {
+		n = max_t(unsigned int, n, info->areas[i].isr_bit + 1);
+		syscier |= BIT(info->areas[i].isr_bit);
+	}
+
+	/*
+	 * SYSC needs all interrupt sources to be enabled to control power.
+	 * Mask all interrupt sources to prevent the CPU from receiving them.
+	 */
+	pr_debug("%s: syscier = 0x%08x\n", np->full_name, syscier);
+	iowrite32(syscier, rcar_sysc_base + SYSCIER);
+	iowrite32(syscier, rcar_sysc_base + SYSCIMR);
+
+	domains = kzalloc(sizeof(*domains) + n * sizeof(domains->domains[0]),
+			  GFP_KERNEL);
+	if (!domains) {
+		error = -ENOMEM;
+		goto fail_unmap;
+	}
+
+	for (i = 0; i < info->num_areas; i++) {
+		const struct rcar_sysc_area *area = &info->areas[i];
+		struct rcar_sysc_pd *pd;
+
+		pd = kzalloc(sizeof(*pd) + strlen(area->name) + 1, GFP_KERNEL);
+		if (!pd) {
+			error = -ENOMEM;
+			goto fail_unmap;
+		}
+
+		strcpy(pd->name, area->name);
+		pd->genpd.name = pd->name;
+		pd->ch.chan_offs = area->chan_offs;
+		pd->ch.chan_bit = area->chan_bit;
+		pd->ch.isr_bit = area->isr_bit;
+		pd->flags = area->flags;
+
+		rcar_sysc_pd_setup(np, pd);
+		if (area->parent >= 0)
+			pm_genpd_add_subdomain(domains->domains[area->parent],
+					       &pd->genpd);
+
+		domains->domains[area->isr_bit] = &pd->genpd;
+	}
+
+	domains->onecell_data.domains = domains->domains;
+	domains->onecell_data.num_domains = n;
+	of_genpd_add_provider_onecell(np, &domains->onecell_data);
+	of_node_put(np);
+	return 0;
+
+fail_unmap:
+	iounmap(base);
+fail_put:
+	of_node_put(np);
+	return error;
+}
+
+early_initcall(rcar_sysc_pd_init);

53 lines not on this page · raw message

index 6b21ea2a65bf59b9..28af0b704fc008d2 100644
@@ -149,7 +149,7 @@ int rcar_sysc_power_up(const struct rcar_sysc_ch *sysc_ch)
 	return rcar_sysc_power(sysc_ch, true);
 }
 
-bool rcar_sysc_power_is_off(const struct rcar_sysc_ch *sysc_ch)
+static bool rcar_sysc_power_is_off(const struct rcar_sysc_ch *sysc_ch)
 {
 	unsigned int st;
 

index 96f30c2883881d97..92fc613ab23db091 100644
@@ -11,7 +11,6 @@ struct rcar_sysc_ch {
 
 int rcar_sysc_power_down(const struct rcar_sysc_ch *sysc_ch);
 int rcar_sysc_power_up(const struct rcar_sysc_ch *sysc_ch);
-bool rcar_sysc_power_is_off(const struct rcar_sysc_ch *sysc_ch);
 void __iomem *rcar_sysc_init(phys_addr_t base);
 
 #endif /* __LINUX_SOC_RENESAS_RCAR_SYSC_H__ */

index 28af0b704fc008d2..2d6fbeb481883be7 100644
@@ -9,6 +9,7 @@
  * for more details.
  */
 
+#include <linux/clk/renesas.h>
 #include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/mm.h>

@@ -251,6 +252,15 @@ static void __init rcar_sysc_pd_setup(struct device_node *np,
 		gov = &pm_domain_always_on_gov;
 	}
 
+#ifdef CONFIG_ARCH_R8A7795
+	if (!(pd->flags & (PD_CPU | PD_SCU))) {
+		/* Enable Clock Domain for I/O devices */
+		genpd->flags = GENPD_FLAG_PM_CLK;
+		genpd->attach_dev = cpg_mssr_attach_dev;
+		genpd->detach_dev = cpg_mssr_detach_dev;
+	}
+#endif
+
 	pm_genpd_init(genpd, gov, false);
 	genpd->dev_ops.active_wakeup = rcar_sysc_active_wakeup;
 	genpd->power_off = rcar_sysc_pd_power_off;

new file mode 100644
index 0000000000000000..4449657bdb88a586
@@ -0,0 +1,31 @@
+/*
+ * Renesas R-Car H1 System Controller
+ *
+ * Copyright (C) 2016 Glider bvba
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+
+#include <linux/bug.h>
+#include <linux/kernel.h>
+
+#include <dt-bindings/power/r8a7779-sysc.h>
+
+#include "rcar-sysc.h"
+
+static const struct rcar_sysc_area r8a7779_areas[] __initconst = {
+	{ "arm1",	 0x40, 1, R8A7779_PD_ARM1,	-1, PD_CPU_CR, },
+	{ "arm2",	 0x40, 2, R8A7779_PD_ARM2,	-1, PD_CPU_CR, },
+	{ "arm3",	 0x40, 3, R8A7779_PD_ARM3,	-1, PD_CPU_CR, },
+	{ "sh",		 0x80, 0, R8A7779_PD_SH,	-1, },
+	{ "sgx",	 0xc0, 0, R8A7779_PD_SGX,	-1, },
+	{ "vdp",	0x100, 0, R8A7779_PD_VDP,	-1, },
+	{ "imp",	0x140, 0, R8A7779_PD_IMP,	-1, },
+};
+
+const struct rcar_sysc_info r8a7779_sysc_info __initconst = {
+	.areas = r8a7779_areas,
+	.num_areas = ARRAY_SIZE(r8a7779_areas),
+};

index 2d6fbeb481883be7..3d039009a2222820 100644
@@ -281,6 +281,9 @@ static void __init rcar_sysc_pd_setup(struct device_node *np,
 }
 
 static const struct of_device_id rcar_sysc_matches[] = {
+#ifdef CONFIG_ARCH_R8A7779
+	{ .compatible = "renesas,r8a7779-sysc", .data = &r8a7779_sysc_info },
+#endif
 	{ /* sentinel */ }
 };
 

index 7bb48b4f7334f960..7cf58b9cd544f4b9 100644
@@ -50,4 +50,5 @@ struct rcar_sysc_info {
 	unsigned int num_areas;
 };
 
+extern const struct rcar_sysc_info r8a7779_sysc_info;
 #endif /* __SOC_RENESAS_RCAR_SYSC_H__ */

45 lines not on this page · raw message

index 3d039009a2222820..44b8ef764cbc33d1 100644
@@ -284,6 +284,9 @@ static const struct of_device_id rcar_sysc_matches[] = {
 #ifdef CONFIG_ARCH_R8A7779
 	{ .compatible = "renesas,r8a7779-sysc", .data = &r8a7779_sysc_info },
 #endif
+#ifdef CONFIG_ARCH_R8A7790
+	{ .compatible = "renesas,r8a7790-sysc", .data = &r8a7790_sysc_info },
+#endif
 	{ /* sentinel */ }
 };
 

index 7cf58b9cd544f4b9..33c8f2d00a01eac6 100644
@@ -51,4 +51,5 @@ struct rcar_sysc_info {
 };
 
 extern const struct rcar_sysc_info r8a7779_sysc_info;
+extern const struct rcar_sysc_info r8a7790_sysc_info;
 #endif /* __SOC_RENESAS_RCAR_SYSC_H__ */

new file mode 100644
index 0000000000000000..b8db6f345720b6ba
@@ -0,0 +1,32 @@
+/*
+ * Renesas R-Car M2-W/N System Controller
+ *
+ * Copyright (C) 2016 Glider bvba
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+
+#include <linux/bug.h>
+#include <linux/kernel.h>
+
+#include <dt-bindings/power/r8a7791-sysc.h>
+
+#include "rcar-sysc.h"
+
+static const struct rcar_sysc_area r8a7791_areas[] __initconst = {
+	{ "ca15-scu",	0x180, 0, R8A7791_PD_CA15_SCU,	-1,
+	  PD_SCU },
+	{ "ca15-cpu0",	 0x40, 0, R8A7791_PD_CA15_CPU0,	R8A7791_PD_CA15_SCU,
+	  PD_CPU_NOCR, },
+	{ "ca15-cpu1",	 0x40, 1, R8A7791_PD_CA15_CPU1,	R8A7791_PD_CA15_SCU,
+	  PD_CPU_NOCR, },
+	{ "sh",		 0x80, 0, R8A7791_PD_SH,	-1, },
+	{ "sgx",	 0xc0, 0, R8A7791_PD_SGX,	-1, },
+};
+
+const struct rcar_sysc_info r8a7791_sysc_info __initconst = {
+	.areas = r8a7791_areas,
+	.num_areas = ARRAY_SIZE(r8a7791_areas),
+};

index 44b8ef764cbc33d1..c7f78ea59be7a9e3 100644
@@ -287,6 +287,9 @@ static const struct of_device_id rcar_sysc_matches[] = {
 #ifdef CONFIG_ARCH_R8A7790
 	{ .compatible = "renesas,r8a7790-sysc", .data = &r8a7790_sysc_info },
 #endif
+#ifdef CONFIG_ARCH_R8A7791
+	{ .compatible = "renesas,r8a7791-sysc", .data = &r8a7791_sysc_info },
+#endif
 	{ /* sentinel */ }
 };
 

index 33c8f2d00a01eac6..d58b39400e790a46 100644
@@ -52,4 +52,5 @@ struct rcar_sysc_info {
 
 extern const struct rcar_sysc_info r8a7779_sysc_info;
 extern const struct rcar_sysc_info r8a7790_sysc_info;
+extern const struct rcar_sysc_info r8a7791_sysc_info;
 #endif /* __SOC_RENESAS_RCAR_SYSC_H__ */

index c7f78ea59be7a9e3..6bee5880ac62db31 100644
@@ -290,6 +290,9 @@ static const struct of_device_id rcar_sysc_matches[] = {
 #ifdef CONFIG_ARCH_R8A7791
 	{ .compatible = "renesas,r8a7791-sysc", .data = &r8a7791_sysc_info },
 #endif
+#ifdef CONFIG_ARCH_R8A7793
+	{ .compatible = "renesas,r8a7793-sysc", .data = &r8a7793_sysc_info },
+#endif
 	{ /* sentinel */ }
 };
 

index d58b39400e790a46..d5594874cfef818f 100644
@@ -53,4 +53,6 @@ struct rcar_sysc_info {
 extern const struct rcar_sysc_info r8a7779_sysc_info;
 extern const struct rcar_sysc_info r8a7790_sysc_info;
 extern const struct rcar_sysc_info r8a7791_sysc_info;
+/* R-Car M2-N is identical to R-Car M2-W w.r.t. power domains. */
+#define r8a7793_sysc_info r8a7791_sysc_info
 #endif /* __SOC_RENESAS_RCAR_SYSC_H__ */

new file mode 100644
index 0000000000000000..5e469566a683d249
@@ -0,0 +1,32 @@
+/*
+ * Renesas R-Car E2 System Controller
+ *
+ * Copyright (C) 2016 Glider bvba
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+
+#include <linux/bug.h>
+#include <linux/kernel.h>
+
+#include <dt-bindings/power/r8a7794-sysc.h>
+
+#include "rcar-sysc.h"
+
+static const struct rcar_sysc_area r8a7794_areas[] __initconst = {
+	{ "ca7-scu",	0x100, 0, R8A7794_PD_CA7_SCU,	-1,
+	  PD_SCU },
+	{ "ca7-cpu0",	0x1c0, 0, R8A7794_PD_CA7_CPU0,	R8A7794_PD_CA7_SCU,
+	  PD_CPU_NOCR, },
+	{ "ca7-cpu1",	0x1c0, 1, R8A7794_PD_CA7_CPU1,	R8A7794_PD_CA7_SCU,
+	  PD_CPU_NOCR, },
+	{ "sh",		 0x80, 0, R8A7794_PD_SH,	-1, },
+	{ "sgx",	 0xc0, 0, R8A7794_PD_SGX,	-1, },
+};
+
+const struct rcar_sysc_info r8a7794_sysc_info __initconst = {
+	.areas = r8a7794_areas,
+	.num_areas = ARRAY_SIZE(r8a7794_areas),
+};

index 6bee5880ac62db31..21fd70aea4a4e7b5 100644
@@ -293,6 +293,9 @@ static const struct of_device_id rcar_sysc_matches[] = {
 #ifdef CONFIG_ARCH_R8A7793
 	{ .compatible = "renesas,r8a7793-sysc", .data = &r8a7793_sysc_info },
 #endif
+#ifdef CONFIG_ARCH_R8A7794
+	{ .compatible = "renesas,r8a7794-sysc", .data = &r8a7794_sysc_info },
+#endif
 	{ /* sentinel */ }
 };
 

index d5594874cfef818f..953c85dd04943980 100644
@@ -55,4 +55,5 @@ extern const struct rcar_sysc_info r8a7790_sysc_info;
 extern const struct rcar_sysc_info r8a7791_sysc_info;
 /* R-Car M2-N is identical to R-Car M2-W w.r.t. power domains. */
 #define r8a7793_sysc_info r8a7791_sysc_info
+extern const struct rcar_sysc_info r8a7794_sysc_info;
 #endif /* __SOC_RENESAS_RCAR_SYSC_H__ */

56 lines not on this page · raw message

index 21fd70aea4a4e7b5..7d2a139d7a660ed3 100644
@@ -296,6 +296,9 @@ static const struct of_device_id rcar_sysc_matches[] = {
 #ifdef CONFIG_ARCH_R8A7794
 	{ .compatible = "renesas,r8a7794-sysc", .data = &r8a7794_sysc_info },
 #endif
+#ifdef CONFIG_ARCH_R8A7795
+	{ .compatible = "renesas,r8a7795-sysc", .data = &r8a7795_sysc_info },
+#endif
 	{ /* sentinel */ }
 };
 

index 953c85dd04943980..f5aeac18f1c92813 100644
@@ -56,4 +56,5 @@ extern const struct rcar_sysc_info r8a7791_sysc_info;
 /* R-Car M2-N is identical to R-Car M2-W w.r.t. power domains. */
 #define r8a7793_sysc_info r8a7791_sysc_info
 extern const struct rcar_sysc_info r8a7794_sysc_info;
+extern const struct rcar_sysc_info r8a7795_sysc_info;
 #endif /* __SOC_RENESAS_RCAR_SYSC_H__ */