gose: Enable QSPI
Subsystems (2)
cover gose: Enable QSPI
Hi,
this short series adds QSPI to the r8a7793 and gose device tree. DMA is enabled for QSPI and accordingly DMAC nodes are also added to the r8a7793 device tree.
Based on renesas-devel-20151110-v4.3.
Simon Horman (3):
ARM: shmobile: r8a7793: Add DMAC devices to DT
ARM: shmobile: r8a7793: Add QSPI device to DT
ARM: shmobile: gose: Add QSPI device to DT
arch/arm/boot/dts/r8a7793-gose.dts | 40 ++++++++++++++++ arch/arm/boot/dts/r8a7793.dtsi | 98 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 138 insertions(+)
Signature · 1 line
2.1.4
PATCH 1/3 ARM: shmobile: r8a7793: Add DMAC devices to DT
Instantiate the two system DMA controllers in the r8a7793 device tree.
Based on similar work for the r8a7793 by Laurent Pinchart.
--- arch/arm/boot/dts/r8a7793.dtsi | 72 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 72 insertions(+)
arch/arm/boot/dts/r8a7793.dtsi +72 -0
@@ -128,6 +128,68 @@ #gpio-range-cells = <3>; }; + dmac0: dma-controller at e6700000 { + compatible = "renesas,rcar-dmac"; + reg = <0 0xe6700000 0 0x20000>; + interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH + 0 200 IRQ_TYPE_LEVEL_HIGH + 0 201 IRQ_TYPE_LEVEL_HIGH + 0 202 IRQ_TYPE_LEVEL_HIGH + 0 203 IRQ_TYPE_LEVEL_HIGH + 0 204 IRQ_TYPE_LEVEL_HIGH + 0 205 IRQ_TYPE_LEVEL_HIGH + 0 206 IRQ_TYPE_LEVEL_HIGH + 0 207 IRQ_TYPE_LEVEL_HIGH + 0 208 IRQ_TYPE_LEVEL_HIGH + 0 209 IRQ_TYPE_LEVEL_HIGH + 0 210 IRQ_TYPE_LEVEL_HIGH + 0 211 IRQ_TYPE_LEVEL_HIGH + 0 212 IRQ_TYPE_LEVEL_HIGH + 0 213 IRQ_TYPE_LEVEL_HIGH + 0 214 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14"; + clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC0>; + clock-names = "fck"; + power-domains = <&cpg_clocks>; + #dma-cells = <1>; + dma-channels = <15>; + }; + + dmac1: dma-controller at e6720000 { + compatible = "renesas,rcar-dmac"; + reg = <0 0xe6720000 0 0x20000>; + interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH + 0 216 IRQ_TYPE_LEVEL_HIGH + 0 217 IRQ_TYPE_LEVEL_HIGH + 0 218 IRQ_TYPE_LEVEL_HIGH + 0 219 IRQ_TYPE_LEVEL_HIGH + 0 308 IRQ_TYPE_LEVEL_HIGH + 0 309 IRQ_TYPE_LEVEL_HIGH + 0 310 IRQ_TYPE_LEVEL_HIGH + 0 311 IRQ_TYPE_LEVEL_HIGH + 0 312 IRQ_TYPE_LEVEL_HIGH + 0 313 IRQ_TYPE_LEVEL_HIGH + 0 314 IRQ_TYPE_LEVEL_HIGH + 0 315 IRQ_TYPE_LEVEL_HIGH + 0 316 IRQ_TYPE_LEVEL_HIGH + 0 317 IRQ_TYPE_LEVEL_HIGH + 0 318 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14"; + clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC1>; + clock-names = "fck"; + power-domains = <&cpg_clocks>; + #dma-cells = <1>; + dma-channels = <15>; + }; + scif0: serial at e6e60000 { compatible = "renesas,scif-r8a7793", "renesas,scif"; reg = <0 0xe6e60000 0 64>;
@@ -313,6 +375,16 @@ "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1", "vsp1-du0", "vsps"; }; + mstp2_clks: mstp2_clks at e6150138 { + compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>; + clocks = <&zs_clk>, <&zs_clk>; + #clock-cells = <1>; + clock-indices = < + R8A7793_CLK_SYS_DMAC1 R8A7793_CLK_SYS_DMAC0 + >; + clock-output-names = "sys-dmac1", "sys-dmac0"; + }; mstp3_clks: mstp3_clks at e615013c { compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
Signature · 1 line
2.1.4
PATCH 1/3 ARM: shmobile: r8a7793: Add DMAC devices to DT
Hi Simon,
Thank you for the patch.
Quoted 6 lines · On Tuesday 10 November 2015 16:13:59 Simon Horman wrote:
Instantiate the two system DMA controllers in the r8a7793 device tree.
Based on similar work for the r8a7793 by Laurent Pinchart.
Cc Laurent Pinchart <[email protected]>Signed-off-by Simon Horman <[email protected]>
Quoted 78 lines
--- arch/arm/boot/dts/r8a7793.dtsi | 72 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 72 insertions(+)arch/arm/boot/dts/r8a7793.dtsi +62
-0@@ -128,6 +128,68 @@ #gpio-range-cells = <3>; }; + dmac0: dma-controller at e6700000 { + compatible = "renesas,rcar-dmac"; + reg = <0 0xe6700000 0 0x20000>; + interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH + 0 200 IRQ_TYPE_LEVEL_HIGH + 0 201 IRQ_TYPE_LEVEL_HIGH + 0 202 IRQ_TYPE_LEVEL_HIGH + 0 203 IRQ_TYPE_LEVEL_HIGH + 0 204 IRQ_TYPE_LEVEL_HIGH + 0 205 IRQ_TYPE_LEVEL_HIGH + 0 206 IRQ_TYPE_LEVEL_HIGH + 0 207 IRQ_TYPE_LEVEL_HIGH + 0 208 IRQ_TYPE_LEVEL_HIGH + 0 209 IRQ_TYPE_LEVEL_HIGH + 0 210 IRQ_TYPE_LEVEL_HIGH + 0 211 IRQ_TYPE_LEVEL_HIGH + 0 212 IRQ_TYPE_LEVEL_HIGH + 0 213 IRQ_TYPE_LEVEL_HIGH + 0 214 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14"; + clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC0>; + clock-names = "fck"; + power-domains = <&cpg_clocks>; + #dma-cells = <1>; + dma-channels = <15>; + }; + + dmac1: dma-controller at e6720000 { + compatible = "renesas,rcar-dmac"; + reg = <0 0xe6720000 0 0x20000>; + interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH + 0 216 IRQ_TYPE_LEVEL_HIGH + 0 217 IRQ_TYPE_LEVEL_HIGH + 0 218 IRQ_TYPE_LEVEL_HIGH + 0 219 IRQ_TYPE_LEVEL_HIGH + 0 308 IRQ_TYPE_LEVEL_HIGH + 0 309 IRQ_TYPE_LEVEL_HIGH + 0 310 IRQ_TYPE_LEVEL_HIGH + 0 311 IRQ_TYPE_LEVEL_HIGH + 0 312 IRQ_TYPE_LEVEL_HIGH + 0 313 IRQ_TYPE_LEVEL_HIGH + 0 314 IRQ_TYPE_LEVEL_HIGH + 0 315 IRQ_TYPE_LEVEL_HIGH + 0 316 IRQ_TYPE_LEVEL_HIGH + 0 317 IRQ_TYPE_LEVEL_HIGH + 0 318 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14"; + clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC1>; + clock-names = "fck"; + power-domains = <&cpg_clocks>; + #dma-cells = <1>; + dma-channels = <15>; + }; + scif0: serial at e6e60000 { compatible = "renesas,scif-r8a7793", "renesas,scif"; reg = <0 0xe6e60000 0 64>;
arch/arm/boot/dts/r8a7793.dtsi line 379
Quoted 5 lines
arch/arm/boot/dts/r8a7793.dtsi +2
-0@@ -313,6 +375,16 @@ "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1", "vsp1-du0", "vsps"; }; + mstp2_clks: mstp2_clks at e6150138 { + compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-
clocks";
Quoted 11 lines
arch/arm/boot/dts/r8a7793.dtsi +8
-0+ reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>; + clocks = <&zs_clk>, <&zs_clk>; + #clock-cells = <1>; + clock-indices = < + R8A7793_CLK_SYS_DMAC1 R8A7793_CLK_SYS_DMAC0 + >; + clock-output-names = "sys-dmac1", "sys-dmac0"; + }; mstp3_clks: mstp3_clks at e615013c { compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
Signature · 3 lines
Regards, Laurent Pinchart
PATCH 1/3 ARM: shmobile: r8a7793: Add DMAC devices to DT
In reply to Simon HormanHi Simon,
Quoted 15 lines · Simon Horman
Instantiate the two system DMA controllers in the r8a7793 device tree.
Based on similar work for the r8a7793 by Laurent Pinchart.
Cc Laurent Pinchart <[email protected]>Signed-off-by Simon Horman <[email protected]>--- arch/arm/boot/dts/r8a7793.dtsi | 72 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 72 insertions(+)arch/arm/boot/dts/r8a7793.dtsi +0
-0
arch/arm/boot/dts/r8a7793.dtsi line 132
Quoted 5 lines
arch/arm/boot/dts/r8a7793.dtsi +2
-0@@ -128,6 +128,68 @@ #gpio-range-cells = <3>; }; + dmac0: dma-controller at e6700000 { + compatible = "renesas,rcar-dmac";
Thanks for cooking up this patch. It looks fine to me, but it reminds me about compat string handling.
Is there any special reason why we don't use the SoC part number in the compatible string for DMAC devices?
Cheers,
/ magnus
PATCH 1/3 ARM: shmobile: r8a7793: Add DMAC devices to DT
Quoted 22 lines · Magnus Damm
Hi Simon,
Quoted 18 lines · Simon Horman
Instantiate the two system DMA controllers in the r8a7793 device tree.
Based on similar work for the r8a7793 by Laurent Pinchart.
Cc Laurent Pinchart <[email protected]>Signed-off-by Simon Horman <[email protected]>--- arch/arm/boot/dts/r8a7793.dtsi | 72 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 72 insertions(+)arch/arm/boot/dts/r8a7793.dtsi +0
-0@@ -128,6 +128,68 @@ #gpio-range-cells = <3>; };
Quoted 8 lines
arch/arm/boot/dts/r8a7793.dtsi line 132
Quoted 2 lines
arch/arm/boot/dts/r8a7793.dtsi +2
-0+ dmac0: dma-controller at e6700000 { + compatible = "renesas,rcar-dmac";Thanks for cooking up this patch. It looks fine to me, but it reminds me about compat string handling.
Is there any special reason why we don't use the SoC part number in the compatible string for DMAC devices?
Thanks. I will try and resolve that separately to this patchset.
PATCH 2/3 ARM: shmobile: r8a7793: Add QSPI device to DT
In reply to Simon HormanInstantiate the QSPI controller in the r8a7793 device tree.
Based similar work for the r8a7794 by by Hisashi Nakamura and Sergei Shtylyov.
--- arch/arm/boot/dts/r8a7793.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+)
arch/arm/boot/dts/r8a7793.dtsi +26 -0
@@ -18,6 +18,10 @@ #address-cells = <2>; #size-cells = <2>; + aliases { + spi0 = &qspi; + }; + cpus { #address-cells = <1>; #size-cells = <0>;
@@ -222,6 +226,20 @@ status = "disabled"; }; + qspi: spi at e6b10000 { + compatible = "renesas,qspi-r8a7793", "renesas,qspi"; + reg = <0 0xe6b10000 0 0x2c>; + interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp9_clks R8A7793_CLK_QSPI_MOD>; + dmas = <&dmac0 0x17>, <&dmac0 0x18>; + dma-names = "tx", "rx"; + power-domains = <&cpg_clocks>; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + clocks { #address-cells = <2>; #size-cells = <2>;
@@ -463,6 +481,14 @@ "ipmmu_sgx", "vin2", "vin1", "vin0", "ether", "sata1", "sata0"; }; + mstp9_clks: mstp9_clks at e6150994 { + compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; + clocks = <&cpg_clocks R8A7793_CLK_QSPI>; + #clock-cells = <1>; + clock-indices = <R8A7793_CLK_QSPI_MOD>; + clock-output-names = "qspi_mod"; + }; }; ipmmu_sy0: mmu at e6280000 {
Signature · 1 line
2.1.4
PATCH 3/3 ARM: shmobile: gose: Add QSPI device to DT
In reply to Simon HormanEnable the QSPI controller in the gose device tree.
Based similar work for the silk board by by Vladimir Barinov and Sergei Shtylyov.
---
Tested: Read /dev/mtd0 with 512K blocks at 1.7MB/s
--- arch/arm/boot/dts/r8a7793-gose.dts | 40 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+)
arch/arm/boot/dts/r8a7793-gose.dts +40 -0
@@ -57,6 +57,11 @@ renesas,groups = "intc_irq0"; renesas,function = "intc"; }; + + qspi_pins: spi0 { + renesas,groups = "qspi_ctrl", "qspi_data4"; + renesas,function = "qspi"; + }; }; ðer {
@@ -92,3 +97,38 @@ status = "okay"; }; + +&qspi { + pinctrl-0 = <&qspi_pins>; + pinctrl-names = "default"; + + status = "okay"; + + flash at 0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spansion,s25fl512s", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <30000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + spi-cpol; + spi-cpha; + m25p,fast-read; + + partition at 0 { + label = "loader"; + reg = <0x00000000 0x00040000>; + read-only; + }; + partition at 40000 { + label = "user"; + reg = <0x00040000 0x00400000>; + read-only; + }; + partition at 440000 { + label = "flash"; + reg = <0x00440000 0x03bc0000>; + }; + }; +};
Signature · 1 line
2.1.4
PATCH 3/3 ARM: shmobile: gose: Add QSPI device to DT
Hi Simon,
Quoted 48 lines · Simon Horman
Enable the QSPI controller in the gose device tree.
Based similar work for the silk board by by Vladimir Barinov and Sergei Shtylyov.
Cc Vladimir Barinov <[email protected]>Cc Sergei Shtylyov <[email protected]>Signed-off-by Simon Horman <[email protected]>---
Tested: Read/dev/mtd0with 512K blocks at 1.7MB/s--- arch/arm/boot/dts/r8a7793-gose.dts | 40 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+)arch/arm/boot/dts/r8a7793-gose.dts +24
-0@@ -92,3 +97,38 @@ status = "okay"; }; + +&qspi { + pinctrl-0 = <&qspi_pins>; + pinctrl-names = "default"; + + status = "okay"; + + flash at 0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spansion,s25fl512s", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <30000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + spi-cpol; + spi-cpha; + m25p,fast-read; + + partition at 0 { + label = "loader"; + reg = <0x00000000 0x00040000>; + read-only; + };
arch/arm/boot/dts/r8a7793-gose.dts line 133
Quoted 10 lines
arch/arm/boot/dts/r8a7793-gose.dts +10
-0+ partition at 40000 { + label = "user"; + reg = <0x00040000 0x00400000>; + read-only; + }; + partition at 440000 { + label = "flash"; + reg = <0x00440000 0x03bc0000>; + }; + };
Please move the partitions inside a "partitions" subnode, cfr. the patch I've just sent for Koelsch ("[PATCH] ARM: shmobile: koelsch: Move SPI FLASH partitions to subnode"). I haven't updated the other DTSes yet.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds