SoC and board integration for RSPI on r7s72100/genmai

PATCH New Geert Uytterhoeven 4 participants 10 messages Jan 12, 2014 – Jan 15, 2014

Subsystems (6)

Arm (32-bit) Arm sub-architectures SPI SuperH +2 more subsystems

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Geert Uytterhoeven

author

2014-01-12 10:48 UTC #0 lore raw

v3 cover SoC and board integration for RSPI on r7s72100/genmai

This patch series integrates Renesas RSPI on the RZ/A1H aka R7S72100 SoC, and the Genmai development board.

The series is based on renesas-devel-v3.13-rc7-20140109v2, with Magnus' pinctrl, Wolfram's riic, and Simon's sh_eth work applied on top. [Simon: I don't know in which order you will merge these. If you want me
to rebase my patches, just ask! Thanks!]

It was tested on the Genmai development board (genmai-reference), using an in-kernel version of Documentation/spi/spidev_test.c, exercising loopback mode on rspi1, with the same outcome as the SDK reference code.

It will not yet work with the non-reference version of genmai, due to missing pinmux configuration in setup-r7s72100.c.

[1/5] pinctrl: sh-pfc: r7s72100: Add RSPI support [2/5] ARM: shmobile: r7s72100: Add RSPI clocks [3/5] ARM: shmobile: genmai: Add RSPI support
[4/5] [RFC] ARM: shmobile: genmai: Add preliminary RSPI pinmux [5/5] ARM: shmobile: genmai: Enable RSPI in defconfig

Changes in V2:
- Add "ARM: shmobile: genmai: Add RSPI children"
- Add "[RFC] ARM: shmobile: genmai: Add preliminary RSPI pinmux"

Changes in V3:
- Implement review comments
- Add defconfig update
- Remove DT support patches, they will be sent in a separate series
- Merge "ARM: shmobile: r7s72100: Add RSPI platform devices" and "ARM: shmobile: genmai: Add RSPI children"

Thanks!

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

Geert Uytterhoeven

author

2014-01-12 10:48 UTC #1 lore raw

PATCH v3 1/5 pinctrl: sh-pfc: r7s72100: Add RSPI support

From: Geert Uytterhoeven <[email protected]>

Signed-off-by Geert Uytterhoeven <[email protected]>

Cc Linus Walleij <[email protected]>

---
V2:
- No changes
V3:
- No changes

 drivers/pinctrl/sh-pfc/pfc-r7s72100.c |   94 +++++++++++++++++++++++++++++++++
 1 file changed, 94 insertions(+)

drivers/pinctrl/sh-pfc/pfc-r7s72100.c +94 -0

index 267677c683c5..5e0f03c14fcc 100644
@@ -138,6 +138,70 @@ RIIC1(RZ_PIN_AND_MUX)
 RIIC2(RZ_PIN_AND_MUX)
 RIIC3(RZ_PIN_AND_MUX)
 
+#define RSPI0(fn)			\
+	fn(rspi0, rspck,  2, 12, 2)	\
+	fn(rspi0, ssl0,   2, 13, 2)	\
+	fn(rspi0, mosi,   2, 14, 2)	\
+	fn(rspi0, miso,   2, 15, 2)	\
+	fn(rspi0, rspck,  7, 15, 2)	\
+	fn(rspi0, ssl0,   8,  0, 2)	\
+	fn(rspi0, mosi,   8,  1, 2)	\
+	fn(rspi0, miso,   8,  2, 2)	\
+	fn(rspi0, rspck, 10, 12, 4)	\
+	fn(rspi0, ssl0,  10, 13, 4)	\
+	fn(rspi0, mosi,  10, 14, 4)	\
+	fn(rspi0, miso,  10, 15, 4)	\
+
+#define RSPI1(fn)			\
+	fn(rspi1, rspck,  4,  4, 2)	\
+	fn(rspi1, ssl0,   4,  5, 2)	\
+	fn(rspi1, mosi,   4,  6, 2)	\
+	fn(rspi1, miso,   4,  7, 2)	\
+	fn(rspi1, rspck,  6,  4, 7)	\
+	fn(rspi1, ssl0,   6,  5, 7)	\
+	fn(rspi1, mosi,   6,  6, 7)	\
+	fn(rspi1, miso,   6,  7, 7)	\
+	fn(rspi1, rspck, 11, 12, 2)	\
+	fn(rspi1, ssl0,  11, 13, 2)	\
+	fn(rspi1, mosi,  11, 14, 2)	\
+	fn(rspi1, miso,  11, 15, 2)	\
+
+#define RSPI2(fn)			\
+	fn(rspi2, rspck,  8,  3, 3)	\
+	fn(rspi2, ssl0,   8,  4, 3)	\
+	fn(rspi2, mosi,   8,  5, 3)	\
+	fn(rspi2, miso,   8,  6, 3)	\
+	fn(rspi2, rspck,  8, 14, 5)	\
+	fn(rspi2, ssl0,   8, 15, 5)	\
+	fn(rspi2, mosi,   9,  0, 5)	\
+	fn(rspi2, miso,   9,  1, 5)	\
+
+#define RSPI3(fn)			\
+	fn(rspi3, rspck,  3,  0, 8)	\
+	fn(rspi3, ssl0,   3,  1, 8)	\
+	fn(rspi3, mosi,   3,  2, 8)	\
+	fn(rspi3, miso,   3,  3, 8)	\
+	fn(rspi3, rspck,  5,  0, 8)	\
+	fn(rspi3, ssl0,   5,  1, 8)	\
+	fn(rspi3, mosi,   5,  2, 8)	\
+	fn(rspi3, miso,   5,  3, 8)	\
+
+#define RSPI4(fn)			\
+	fn(rspi4, rspck,  2,  8, 8)	\
+	fn(rspi4, ssl0,   2,  9, 8)	\
+	fn(rspi4, mosi,   2, 10, 8)	\
+	fn(rspi4, miso,   2, 11, 8)	\
+	fn(rspi4, rspck,  4,  0, 7)	\
+	fn(rspi4, ssl0,   4,  1, 7)	\
+	fn(rspi4, mosi,   4,  2, 7)	\
+	fn(rspi4, miso,   4,  3, 7)	\
+
+RSPI0(RZ_PIN_AND_MUX)
+RSPI1(RZ_PIN_AND_MUX)
+RSPI2(RZ_PIN_AND_MUX)
+RSPI3(RZ_PIN_AND_MUX)
+RSPI4(RZ_PIN_AND_MUX)
+
 #define SCIF0(fn)			\
 	fn(scif0, clk, 2, 13, 6)	\
 	fn(scif0, txd, 2, 14, 6)	\

@@ -312,6 +376,11 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
 	RIIC1(RZ_PMX_GROUP)
 	RIIC2(RZ_PMX_GROUP)
 	RIIC3(RZ_PMX_GROUP)
+	RSPI0(RZ_PMX_GROUP)
+	RSPI1(RZ_PMX_GROUP)
+	RSPI2(RZ_PMX_GROUP)
+	RSPI3(RZ_PMX_GROUP)
+	RSPI4(RZ_PMX_GROUP)
 	SCIF0(RZ_PMX_GROUP)
 	SCIF1(RZ_PMX_GROUP)
 	SCIF2(RZ_PMX_GROUP)

@@ -339,6 +408,26 @@ static const char * const riic3_groups[] = {
 	RIIC3(RZ_GROUPS)
 };
 
+static const char * const rspi0_groups[] = {
+	RSPI0(RZ_GROUPS)
+};
+
+static const char * const rspi1_groups[] = {
+	RSPI1(RZ_GROUPS)
+};
+
+static const char * const rspi2_groups[] = {
+	RSPI2(RZ_GROUPS)
+};
+
+static const char * const rspi3_groups[] = {
+	RSPI3(RZ_GROUPS)
+};
+
+static const char * const rspi4_groups[] = {
+	RSPI4(RZ_GROUPS)
+};
+
 static const char * const scif0_groups[] = {
 	SCIF0(RZ_GROUPS)
 };

@@ -380,6 +469,11 @@ static const struct sh_pfc_function pinmux_functions[] = {
 	SH_PFC_FUNCTION(riic1),
 	SH_PFC_FUNCTION(riic2),
 	SH_PFC_FUNCTION(riic3),
+	SH_PFC_FUNCTION(rspi0),
+	SH_PFC_FUNCTION(rspi1),
+	SH_PFC_FUNCTION(rspi2),
+	SH_PFC_FUNCTION(rspi3),
+	SH_PFC_FUNCTION(rspi4),
 	SH_PFC_FUNCTION(scif0),
 	SH_PFC_FUNCTION(scif1),
 	SH_PFC_FUNCTION(scif2),

Signature · 1 line

1.7.9.5

Linus Walleij

2014-01-15 09:14 UTC #2 lore raw

PATCH v3 1/5 pinctrl: sh-pfc: r7s72100: Add RSPI support

Quoted 9 lines · Geert Uytterhoeven

From: Geert Uytterhoeven <[email protected]>
Signed-off-by Geert Uytterhoeven <[email protected]>
Cc Linus Walleij <[email protected]>
---
V2:
- No changes
V3:
- No changes

I'm expecting Laurent to queue this patch when he's happy with it (maybe he already said so in some other mail).

Yours,
Linus Walleij

Laurent Pinchart

2014-01-15 19:25 UTC #3 lore raw

PATCH v3 1/5 pinctrl: sh-pfc: r7s72100: Add RSPI support

Hi Linus,

Quoted 9 lines · On Wednesday 15 January 2014 10:14:53 Linus Walleij wrote:

On Sun, Jan 12, 2014 at 11:48 AM, Geert Uytterhoeven
Quoted 6 lines · <[email protected]> wrote:
From: Geert Uytterhoeven <[email protected]>
Signed-off-by Geert Uytterhoeven <[email protected]>
Cc Linus Walleij <[email protected]>
---

Quoted 8 lines

Quoted 5 lines
V2:
- No changes
V3:
- No changes
I'm expecting Laurent to queue this patch when he's happy with it (maybe he already said so in some other mail).

I'm fine with the patch, but I'm still waiting for Magnus to submit the next version of the r7s72100 pinctrl support.

Signature · 3 lines

Regards,

Laurent Pinchart

Geert Uytterhoeven

author

2014-01-12 10:48 UTC #4 lore raw

PATCH v3 2/5 ARM: shmobile: r7s72100: Add RSPI clocks

In reply to Geert Uytterhoeven

From: Geert Uytterhoeven <[email protected]>

Signed-off-by Geert Uytterhoeven <[email protected]>

---
V2:
- Correct platform device names ("rspi%u" -> "rspi.%u")
V3:
- No changes

 arch/arm/mach-shmobile/clock-r7s72100.c |   21 ++++++++++++++++++---
 1 file changed, 18 insertions(+), 3 deletions(-)

arch/arm/mach-shmobile/clock-r7s72100.c +18 -3

index 0242ca5f499a..6ae341ca713c 100644
@@ -22,13 +22,15 @@
 #include <mach/common.h>
 #include <mach/r7s72100.h>
 
-/* registers */
+/* Frequency Control Registers */
 #define FRQCR		0xfcfe0010
 #define FRQCR2		0xfcfe0014
+/* Standby Control Registers */
 #define STBCR3		0xfcfe0420
 #define STBCR4		0xfcfe0424
 #define STBCR7		0xfcfe0430
 #define STBCR9		0xfcfe0438
+#define STBCR10		0xfcfe043c
 
 #define PLL_RATE 30

@@ -146,12 +148,20 @@ struct clk div4_clks[DIV4_NR] = {
 					| CLK_ENABLE_ON_INIT),
 };
 
-enum {	MSTP97, MSTP96, MSTP95, MSTP94,
+enum {
+	MSTP107, MSTP106, MSTP105, MSTP104, MSTP103,
+	MSTP97, MSTP96, MSTP95, MSTP94,
 	MSTP74,
 	MSTP47, MSTP46, MSTP45, MSTP44, MSTP43, MSTP42, MSTP41, MSTP40,
-	MSTP33,	MSTP_NR };
+	MSTP33,	MSTP_NR
+};
 
 static struct clk mstp_clks[MSTP_NR] = {
+	[MSTP107] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 7, 0), /* RSPI0 */
+	[MSTP106] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 6, 0), /* RSPI1 */
+	[MSTP105] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 5, 0), /* RSPI2 */
+	[MSTP104] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 4, 0), /* RSPI3 */
+	[MSTP103] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 3, 0), /* RSPI4 */
 	[MSTP97] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 7, 0), /* RIIC0 */
 	[MSTP96] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 6, 0), /* RIIC1 */
 	[MSTP95] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 5, 0), /* RIIC2 */

@@ -179,6 +189,11 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
 
 	/* MSTP clocks */
+	CLKDEV_DEV_ID("rspi.0", &mstp_clks[MSTP107]),
+	CLKDEV_DEV_ID("rspi.1", &mstp_clks[MSTP106]),
+	CLKDEV_DEV_ID("rspi.2", &mstp_clks[MSTP105]),
+	CLKDEV_DEV_ID("rspi.3", &mstp_clks[MSTP104]),
+	CLKDEV_DEV_ID("rspi.4", &mstp_clks[MSTP103]),
 	CLKDEV_DEV_ID("fcfee000.i2c", &mstp_clks[MSTP97]),
 	CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]),
 	CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),

Signature · 1 line

1.7.9.5

Geert Uytterhoeven

author

2014-01-12 10:48 UTC #5 lore raw

PATCH v3 3/5 ARM: shmobile: genmai: Add RSPI support

In reply to Geert Uytterhoeven

From: Geert Uytterhoeven <[email protected]>

Add RSPI platform device, resources, platform data, and SPI child.

On this board, only rspi4 is in use. Its bus contains a single device (a wm8978 audio codec).

Signed-off-by Geert Uytterhoeven <[email protected]>

---
V2:
- Correct platform device names ("rspi%u.0" -> "rspi.%u")
- Add missing platform data
- Correct summary (resources -> platform devices)
V3:
- Move platform devices from setup-r7s72100.c to board-genmai.c, as genmai-reference will use devices instantiated from DT
- Merge with "ARM: shmobile: genmai: Add RSPI children", as this now touches the same file
- Instantiate SPI children in C on genmai only, as genmai-reference will instantiate them from DT

 arch/arm/mach-shmobile/board-genmai.c |   45 +++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)

arch/arm/mach-shmobile/board-genmai.c +45 -0

index a1f6fe1fb06f..f85628e24de4 100644
@@ -21,6 +21,8 @@
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
 #include <linux/sh_eth.h>
+#include <linux/spi/rspi.h>
+#include <linux/spi/spi.h>
 #include <mach/common.h>
 #include <mach/irqs.h>
 #include <mach/r7s72100.h>

@@ -41,11 +43,54 @@ static const struct resource ether_resources[] __initconst = {
 	DEFINE_RES_IRQ(gic_iid(359)),
 };
 
+/* RSPI */
+#define RSPI_RESOURCE(idx, baseaddr, irq)				\
+static const struct resource rspi##idx##_resources[] __initconst = {	\
+	DEFINE_RES_MEM(baseaddr, 0x24),					\
+	DEFINE_RES_IRQ(irq),		/* SPEI */			\
+	DEFINE_RES_IRQ(irq + 1),	/* SPRI */			\
+	DEFINE_RES_IRQ(irq + 2),	/* SPTI */			\
+}
+
+RSPI_RESOURCE(0, 0xe800c800, gic_iid(270));
+RSPI_RESOURCE(1, 0xe800d000, gic_iid(273));
+RSPI_RESOURCE(2, 0xe800d800, gic_iid(276));
+RSPI_RESOURCE(3, 0xe800e000, gic_iid(279));
+RSPI_RESOURCE(4, 0xe800e800, gic_iid(282));
+
+static const struct rspi_plat_data rspi_pdata __initconst = {
+	.data_width	= 8,
+	.txmode		= false,
+	.spcr2		= false,
+	.num_chipselect	= 1,
+};
+
+#define r7s72100_register_rspi(idx)					\
+	platform_device_register_resndata(&platform_bus, "rspi", idx,	\
+					rspi##idx##_resources,		\
+					ARRAY_SIZE(rspi##idx##_resources), \
+					&rspi_pdata, sizeof(rspi_pdata))
+
+static const struct spi_board_info spi_info[] __initconst = {
+	{
+		.modalias               = "wm8978",
+		.max_speed_hz           = 5000000,
+		.bus_num                = 4,
+		.chip_select            = 0,
+	},
+};
+
 static void __init genmai_add_standard_devices(void)
 {
 	r7s72100_clock_init();
 	r7s72100_add_dt_devices();
 
+	r7s72100_register_rspi(0);
+	r7s72100_register_rspi(1);
+	r7s72100_register_rspi(2);
+	r7s72100_register_rspi(3);
+	r7s72100_register_rspi(4);
+	spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
 	platform_device_register_resndata(&platform_bus, "r7s72100-ether", -1,
 					  ether_resources,
 					  ARRAY_SIZE(ether_resources),

Signature · 1 line

1.7.9.5

Geert Uytterhoeven

author

2014-01-12 10:48 UTC #6 lore raw

RFC PATCH v3 4/5 ARM: shmobile: genmai: Add preliminary RSPI pinmux setup

In reply to Geert Uytterhoeven

From: Geert Uytterhoeven <[email protected]>

This does not work as there's no pinmux configuration in setup-r7s72100.c yet.

Signed-off-by Geert Uytterhoeven <[email protected]>

---
V2:
- New
V3:
- No changes

 arch/arm/mach-shmobile/board-genmai.c |   17 +++++++++++++++++
 1 file changed, 17 insertions(+)

arch/arm/mach-shmobile/board-genmai.c +17 -0

index f85628e24de4..c8d07d3d81e9 100644
@@ -19,6 +19,7 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/pinctrl/machine.h>
 #include <linux/platform_device.h>
 #include <linux/sh_eth.h>
 #include <linux/spi/rspi.h>

@@ -80,9 +81,25 @@ static const struct spi_board_info spi_info[] __initconst = {
 	},
 };
 
+static const struct pinctrl_map genmai_pinctrl_map[] = {
+	/* RSPI4 */
+	PIN_MAP_MUX_GROUP_DEFAULT("rspi.4", "pfc-r7s72100",
+				  "rspi4_rspck_p4_0", "rspi4"),
+	PIN_MAP_MUX_GROUP_DEFAULT("rspi.4", "pfc-r7s72100",
+				  "rspi4_ssl0_p4_1", "rspi4"),
+	PIN_MAP_MUX_GROUP_DEFAULT("rspi.4", "pfc-r7s72100",
+				  "rspi4_mosi_p4_2", "rspi4"),
+	PIN_MAP_MUX_GROUP_DEFAULT("rspi.4", "pfc-r7s72100",
+				  "rspi4_miso_p4_3", "rspi4"),
+};
+
 static void __init genmai_add_standard_devices(void)
 {
 	r7s72100_clock_init();
+	pinctrl_register_mappings(genmai_pinctrl_map,
+				  ARRAY_SIZE(genmai_pinctrl_map));
+	/* FIXME there's no pinmux configuration in setup-r7s72100.c yet */
+	/* r7s72100_pinmux_init(); */
 	r7s72100_add_dt_devices();
 
 	r7s72100_register_rspi(0);

Signature · 1 line

1.7.9.5

Geert Uytterhoeven

author

2014-01-12 10:48 UTC #7 lore raw

PATCH v3 5/5 ARM: shmobile: genmai: Enable RSPI in defconfig

In reply to Geert Uytterhoeven

From: Geert Uytterhoeven <[email protected]>

Signed-off-by Geert Uytterhoeven <[email protected]>

---
V3:
- New

 arch/arm/configs/genmai_defconfig |    2 ++
 1 file changed, 2 insertions(+)

arch/arm/configs/genmai_defconfig +2 -0

index ede35f400df2..401285305251 100644
@@ -79,6 +79,8 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=10
 CONFIG_SERIAL_SH_SCI_CONSOLE=y
 # CONFIG_HW_RANDOM is not set
 CONFIG_I2C_SH_MOBILE=y
+CONFIG_SPI=y
+CONFIG_SPI_RSPI=y
 # CONFIG_HWMON is not set
 CONFIG_THERMAL=y
 CONFIG_RCAR_THERMAL=y

Signature · 1 line

1.7.9.5

Laurent Pinchart

2014-01-12 21:32 UTC #8 lore raw

v3 cover SoC and board integration for RSPI on r7s72100/genmai

In reply to Geert Uytterhoeven

Hi Geert,

Thank you for the patches.

Quoted 8 lines · On Sunday 12 January 2014 11:48:38 Geert Uytterhoeven wrote:

This patch series integrates Renesas RSPI on the RZ/A1H aka R7S72100 SoC, and the Genmai development board.
The series is based on renesas-devel-v3.13-rc7-20140109v2, with Magnus' pinctrl, Wolfram's riic, and Simon's sh_eth work applied on top. [Simon: I don't know in which order you will merge these. If you want me
to rebase my patches, just ask! Thanks!]

Quoted 6 lines

It was tested on the Genmai development board (genmai-reference), using an in-kernel version of Documentation/spi/spidev_test.c, exercising loopback mode on rspi1, with the same outcome as the SDK reference code.
It will not yet work with the non-reference version of genmai, due to missing pinmux configuration in setup-r7s72100.c.

The whole series looks good to me. The first patch depends on r7s72100 pinmux support, for which I'm still waiting a new version from Magnus. The rest could already be applied as far as I'm concerned.

Quoted 16 lines

[1/5] pinctrl: sh-pfc: r7s72100: Add RSPI support [2/5] ARM: shmobile: r7s72100: Add RSPI clocks [3/5] ARM: shmobile: genmai: Add RSPI support
[4/5] [RFC] ARM: shmobile: genmai: Add preliminary RSPI pinmux [5/5] ARM: shmobile: genmai: Enable RSPI in defconfig
Changes in V2:
- Add "ARM: shmobile: genmai: Add RSPI children"
- Add "[RFC] ARM: shmobile: genmai: Add preliminary RSPI pinmux"
Changes in V3:
- Implement review comments
- Add defconfig update
- Remove DT support patches, they will be sent in a separate series
- Merge "ARM: shmobile: r7s72100: Add RSPI platform devices" and "ARM: shmobile: genmai: Add RSPI children"

Signature · 3 lines

Regards,

Laurent Pinchart

Simon Horman

2014-01-13 00:33 UTC #9 lore raw

v3 cover SoC and board integration for RSPI on r7s72100/genmai

Quoted 17 lines · Laurent Pinchart

Hi Geert,
Thank you for the patches.
Quoted 12 lines · On Sunday 12 January 2014 11:48:38 Geert Uytterhoeven wrote:
This patch series integrates Renesas RSPI on the RZ/A1H aka R7S72100 SoC, and the Genmai development board.
The series is based on renesas-devel-v3.13-rc7-20140109v2, with Magnus' pinctrl, Wolfram's riic, and Simon's sh_eth work applied on top. [Simon: I don't know in which order you will merge these. If you want me
to rebase my patches, just ask! Thanks!]
It was tested on the Genmai development board (genmai-reference), using an in-kernel version of Documentation/spi/spidev_test.c, exercising loopback mode on rspi1, with the same outcome as the SDK reference code.

Quoted 6 lines

Quoted 2 lines
It will not yet work with the non-reference version of genmai, due to missing pinmux configuration in setup-r7s72100.c.
The whole series looks good to me. The first patch depends on r7s72100 pinmux support, for which I'm still waiting a new version from Magnus. The rest could already be applied as far as I'm concerned.

Thanks, that sounds reasonable to me.
But I would like to hear from Magnus.

Quoted 23 lines

Quoted 17 lines
[1/5] pinctrl: sh-pfc: r7s72100: Add RSPI support [2/5] ARM: shmobile: r7s72100: Add RSPI clocks [3/5] ARM: shmobile: genmai: Add RSPI support
[4/5] [RFC] ARM: shmobile: genmai: Add preliminary RSPI pinmux [5/5] ARM: shmobile: genmai: Enable RSPI in defconfig
Changes in V2:
- Add "ARM: shmobile: genmai: Add RSPI children"
- Add "[RFC] ARM: shmobile: genmai: Add preliminary RSPI pinmux"
Changes in V3:
- Implement review comments
- Add defconfig update
- Remove DT support patches, they will be sent in a separate series
- Merge "ARM: shmobile: r7s72100: Add RSPI platform devices" and "ARM: shmobile: genmai: Add RSPI children"
Signature · 3 lines
Regards,

Laurent Pinchart