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clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy mux

PATCH New Bai Ping 3 participants 11 messages Mar 20, 2018 – Apr 18, 2018

Subsystems (4)
Device tree bindings Arm i.MX and Layerscape Common clk NXP i.MX clock drivers
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Bai Ping

author
#0 lore raw

PATCH v6 1/4 clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy mux

The busy divider and busy mux is actually used by the system critical clocks, so add 'CLK_IS_CRITICAL' to clocks registered with these two type.

Signed-off-by Bai Ping <[email protected]>
Acked-by Dong Aisheng <[email protected]>

---
change from V3->v4:
- fix a typo in commit log
change from v4->v5:
- optimize the commit subject
change from v5->v6:
- no change

---
 drivers/clk/imx/clk-busy.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/clk/imx/clk-busy.c +2 -2
index 6df3389..9903652 100644
@@ -101,7 +101,7 @@ struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
 
 	init.name = name;
 	init.ops = &clk_busy_divider_ops;
-	init.flags = CLK_SET_RATE_PARENT;
+	init.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL;
 	init.parent_names = &parent_name;
 	init.num_parents = 1;
 

@@ -175,7 +175,7 @@ struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
 
 	init.name = name;
 	init.ops = &clk_busy_mux_ops;
-	init.flags = 0;
+	init.flags = CLK_IS_CRITICAL;
 	init.parent_names = parent_names;
 	init.num_parents = num_parents;
Signature · 1 line
1.9.1
author
#1 lore raw

PATCH v6 2/4 clk: imx: add new gate/gate2 wrapper funtion

Add new gate/gate2 wrapper function to register clocks with optional flags.

Signed-off-by Bai Ping <[email protected]>
Acked-by Dong Aisheng <[email protected]>

---
change from v3->v4:
- no
change from v4->5:
- optimize commit subject
change from v5->v6:
- no change

---
 drivers/clk/imx/clk.h | 14 ++++++++++++++
 1 file changed, 14 insertions(+)
drivers/clk/imx/clk.h +14 -0
index d69c4bb..8076ec0 100644
@@ -123,6 +123,13 @@ static inline struct clk *imx_clk_gate(const char *name, const char *parent,
 			shift, 0, &imx_ccm_lock);
 }
 
+static inline struct clk *imx_clk_gate_flags(const char *name, const char *parent,
+		void __iomem *reg, u8 shift, unsigned long flags)
+{
+	return clk_register_gate(NULL, name, parent, flags | CLK_SET_RATE_PARENT, reg,
+			shift, 0, &imx_ccm_lock);
+}
+
 static inline struct clk *imx_clk_gate_dis(const char *name, const char *parent,
 		void __iomem *reg, u8 shift)
 {

@@ -137,6 +144,13 @@ static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
 			shift, 0x3, 0, &imx_ccm_lock, NULL);
 }
 
+static inline struct clk *imx_clk_gate2_flags(const char *name, const char *parent,
+		void __iomem *reg, u8 shift, unsigned long flags)
+{
+	return clk_register_gate2(NULL, name, parent, flags | CLK_SET_RATE_PARENT, reg,
+			shift, 0x3, 0, &imx_ccm_lock, NULL);
+}
+
 static inline struct clk *imx_clk_gate2_shared(const char *name,
 		const char *parent, void __iomem *reg, u8 shift,
 		unsigned int *share_count)
Signature · 1 line
1.9.1
author
#3 lore raw

PATCH v6 3/4 dt-bindings: imx: update clock doc for imx6sll

In reply to Bai Ping

Add clock binding doc update for imx6sll.

Signed-off-by Bai Ping <[email protected]>
Acked-by Dong Aisheng <[email protected]>

---
change from v3-> v4:
- use SPDX license identifier
- correct the binding doc format
change from v4-> v5:
- optimize the commit subject
change from v5->v6:
- no change

---
 .../devicetree/bindings/clock/imx6sll-clock.txt    |  36 ++++
 include/dt-bindings/clock/imx6sll-clock.h          | 202 +++++++++++++++++++++
 2 files changed, 238 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/imx6sll-clock.txt
 create mode 100644 include/dt-bindings/clock/imx6sll-clock.h
Documentation/devicetree/bindings/clock/imx6sll-clock.txt new file +36 -0
new file mode 100644
index 0000000..fee849d
@@ -0,0 +1,36 @@
+* Clock bindings for Freescale i.MX6 SLL
+
+Required properties:
+- compatible: Should be "fsl,imx6sll-ccm"
+- reg: Address and length of the register set
+- #clock-cells: Should be <1>
+- clocks: list of clock specifiers, must contain an entry for each required
+  entry in clock-names
+- clock-names: should include entries "ckil", "osc", "ipp_di0" and "ipp_di1"
+
+The clock consumer should specify the desired clock by having the clock
+ID in its "clocks" phandle cell.  See include/dt-bindings/clock/imx6sll-clock.h
+for the full list of i.MX6 SLL clock IDs.
+
+Examples:
+
+#include <dt-bindings/clock/imx6sll-clock.h>
+
+clks: clock-controller@20c4000 {
+		compatible = "fsl,imx6sll-ccm";
+		reg = <0x020c4000 0x4000>;
+		interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+		#clock-cells = <1>;
+		clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
+		clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
+};
+
+uart1: serial@2020000 {
+		compatible = "fsl,imx6sl-uart", "fsl,imx6q-uart", "fsl,imx21-uart";
+		reg = <0x02020000 0x4000>;
+		interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&clks IMX6SLL_CLK_UART1_IPG>,
+			 <&clks IMX6SLL_CLK_UART1_SERIAL>;
+		clock-names = "ipg", "per";
+};
include/dt-bindings/clock/imx6sll-clock.h new file +202 -0

202 lines not on this page · raw message

Signature · 1 line
1.9.1
author
#5 lore raw

PATCH v6 4/4 clk: imx: add clock driver for imx6sll

In reply to Bai Ping

Add clk driver support for imx6sll.

Signed-off-by Bai Ping <[email protected]>
Acked-by Dong Aisheng <[email protected]>

---
change v1->v2
- fix minor comment from stephen
change v2->v3
- remove init_on array, use CLK_IS_CRITICAL flag to make sure system critical clock is always on
change v3->v4:
- update the license identifier to SPDX
- reformat the code indent
change v4->v5:
- optimize the commit subject
- remove the unnecessary macro define
change v5->v6:
- remove unused header include
- reorder the usdhc1 clk

---
 drivers/clk/imx/Makefile      |   1 +
 drivers/clk/imx/clk-imx6sll.c | 340 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 341 insertions(+)
 create mode 100644 drivers/clk/imx/clk-imx6sll.c
drivers/clk/imx/Makefile +1 -0
index f91f2b2..8c3baa7 100644
@@ -22,6 +22,7 @@ obj-$(CONFIG_SOC_IMX35)  += clk-imx35.o
 obj-$(CONFIG_SOC_IMX5)   += clk-imx51-imx53.o
 obj-$(CONFIG_SOC_IMX6Q)  += clk-imx6q.o
 obj-$(CONFIG_SOC_IMX6SL) += clk-imx6sl.o
+obj-$(CONFIG_SOC_IMX6SLL) += clk-imx6sll.o
 obj-$(CONFIG_SOC_IMX6SX) += clk-imx6sx.o
 obj-$(CONFIG_SOC_IMX6UL) += clk-imx6ul.o
 obj-$(CONFIG_SOC_IMX7D)  += clk-imx7d.o
drivers/clk/imx/clk-imx6sll.c new file +340 -0

340 lines not on this page · raw message

Signature · 1 line
1.9.1
#8 lore raw

PATCH v6 1/4 clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy mux

In reply to Bai Ping

Hi Bai,

Quoted 2 lines · Bai Ping

The busy divider and busy mux is actually used by the system critical clocks, so add 'CLK_IS_CRITICAL' to clocks registered with these two type.

This seems that this patch breaks i.MX 6ULL. Our Colibri iMX6ULL freezes with v4.17-rc1:

[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 4.17.0-rc1-00002-g7529efa14a7c-dirty
(ags at trochilidae) (gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11))
#517 SMP Wed Apr 18 11:11:07 CEST 2018
[    0.000000] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7),
cr=10c5387d
[    0.000000] CPU: div instructions available: patching division code
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing
instruction cache
[    0.000000] OF: fdt: Machine model: Toradex Colibri iMX6ULL 512MB on
Colibri Evaluation Board V3
[    0.000000] earlycon: ec_imx6q0 at MMIO 0x02020000 (options
'115200n8')
[    0.000000] bootconsole [ec_imx6q0] enabled
[    0.000000] debug: ignoring loglevel setting.
[    0.000000] Memory policy: Data cache writealloc
[    0.000000] cma: Reserved 256 MiB at 0x90000000
[    0.000000] On node 0 totalpages: 131072
[    0.000000]   Normal zone: 1024 pages used for memmap
[    0.000000]   Normal zone: 0 pages reserved
[    0.000000]   Normal zone: 131072 pages, LIFO batch:31
[    0.000000] random: fast init done
[    0.000000] percpu: Embedded 16 pages/cpu @(ptrval) s35084 r8192
d22260 u65536
[    0.000000] pcpu-alloc: s35084 r8192 d22260 u65536 alloc=16*4096
[    0.000000] pcpu-alloc: [0] 0
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages:
130048
[    0.000000] Kernel command line:

mtdparts=gpmi-nand:512k(mx6ull-bcb),1536k(u-boot1)ro,1536k(u-boot2)ro,512k(u-boot-env),-(ubi) earlycon user_debug=31 ignore_loglevel ubi.mtd=ubi root=ubi0:rootfs rw rootfstype=ubifs ubi.fm_autoconvert=1 consoleblank=0
no_console_suspend=1 console=tty1 console=ttymxc0,115200n8

[    0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144
bytes)
[    0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072
bytes)
[    0.000000] Memory: 243904K/524288K available (8192K kernel code,
365K rwdata, 2720K rodata, 1024K init, 389K bss, 18240K reserved,
262144K cma-reserved)
[    0.000000] Virtual kernel memory layout:
[    0.000000]     vector  : 0xffff0000 - 0xffff1000   (   4 kB)
[    0.000000]     fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)
[    0.000000]     vmalloc : 0xe0800000 - 0xff800000   ( 496 MB)
[    0.000000]     lowmem  : 0xc0000000 - 0xe0000000   ( 512 MB)
[    0.000000]     modules : 0xbf000000 - 0xc0000000   (  16 MB)
[    0.000000]       .text : 0x(ptrval) - 0x(ptrval)   (9184 kB)
[    0.000000]       .init : 0x(ptrval) - 0x(ptrval)   (1024 kB)
[    0.000000]       .data : 0x(ptrval) - 0x(ptrval)   ( 366 kB)
[    0.000000]        .bss : 0x(ptrval) - 0x(ptrval)   ( 390 kB)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1,
Nodes=1
[    0.000000] Hierarchical RCU implementation.
[    0.000000]  RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=1.
[    0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16,
nr_cpu_ids=1
[    0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16

<freeze>

Yet need to understand what is exactly going on.

--
Stefan

Quoted 37 lines
Signed-off-by Bai Ping <[email protected]>
Acked-by Dong Aisheng <[email protected]>

---
change from V3->v4:
- fix a typo in commit log
change from v4->v5:
- optimize the commit subject
change from v5->v6:
- no change

---
 drivers/clk/imx/clk-busy.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/clk/imx/clk-busy.c +2 -2
index 6df3389..9903652 100644
@@ -101,7 +101,7 @@ struct clk *imx_clk_busy_divider(const char *name,
 const char *parent_name,
 
 	init.name = name;
 	init.ops = &clk_busy_divider_ops;
-	init.flags = CLK_SET_RATE_PARENT;
+	init.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL;
 	init.parent_names = &parent_name;
 	init.num_parents = 1;

@@ -175,7 +175,7 @@ struct clk *imx_clk_busy_mux(const char *name,
 void __iomem *reg, u8 shift,
 
 	init.name = name;
 	init.ops = &clk_busy_mux_ops;
-	init.flags = 0;
+	init.flags = CLK_IS_CRITICAL;
 	init.parent_names = parent_names;
 	init.num_parents = num_parents;
author
#9 lore raw

PATCH v6 1/4 clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy mux

Quoted 12 lines

Subject: Re: [PATCH v6 1/4] clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy mux

Hi Bai,

Quoted 2 lines · Bai Ping

The busy divider and busy mux is actually used by the system critical clocks, so add 'CLK_IS_CRITICAL' to clocks registered with these two type.

This seems that this patch breaks i.MX 6ULL. Our Colibri iMX6ULL freezes with v4.17-rc1:

Thanks for you report this. I will try on imx6ull and look into it.

BR
Jacky Bai

Quoted 103 lines
[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 4.17.0-rc1-00002-g7529efa14a7c-dirty
(ags at trochilidae) (gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11))
#517 SMP Wed Apr 18 11:11:07 CEST 2018
[    0.000000] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7),
cr=10c5387d
[    0.000000] CPU: div instructions available: patching division code
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing
instruction cache
[    0.000000] OF: fdt: Machine model: Toradex Colibri iMX6ULL 512MB on
Colibri Evaluation Board V3
[    0.000000] earlycon: ec_imx6q0 at MMIO 0x02020000 (options
'115200n8')
[    0.000000] bootconsole [ec_imx6q0] enabled
[    0.000000] debug: ignoring loglevel setting.
[    0.000000] Memory policy: Data cache writealloc
[    0.000000] cma: Reserved 256 MiB at 0x90000000
[    0.000000] On node 0 totalpages: 131072
[    0.000000]   Normal zone: 1024 pages used for memmap
[    0.000000]   Normal zone: 0 pages reserved
[    0.000000]   Normal zone: 131072 pages, LIFO batch:31
[    0.000000] random: fast init done
[    0.000000] percpu: Embedded 16 pages/cpu @(ptrval) s35084 r8192
d22260 u65536
[    0.000000] pcpu-alloc: s35084 r8192 d22260 u65536 alloc=16*4096
[    0.000000] pcpu-alloc: [0] 0
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages:
130048
[    0.000000] Kernel command line:

mtdparts=gpmi-nand:512k(mx6ull-bcb),1536k(u-boot1)ro,1536k(u- boot2)ro,512k(u-boot-env),-(ubi)
earlycon user_debug=31 ignore_loglevel ubi.mtd=ubi root=ubi0:rootfs rw rootfstype=ubifs ubi.fm_autoconvert=1 consoleblank=0 no_console_suspend=1 console=tty1 console=ttymxc0,115200n8

[    0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144
bytes)
[    0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072
bytes)
[    0.000000] Memory: 243904K/524288K available (8192K kernel code,
365K rwdata, 2720K rodata, 1024K init, 389K bss, 18240K reserved, 262144K
cma-reserved)
[    0.000000] Virtual kernel memory layout:
[    0.000000]     vector  : 0xffff0000 - 0xffff1000   (   4 kB)
[    0.000000]     fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)
[    0.000000]     vmalloc : 0xe0800000 - 0xff800000   ( 496 MB)
[    0.000000]     lowmem  : 0xc0000000 - 0xe0000000   ( 512 MB)
[    0.000000]     modules : 0xbf000000 - 0xc0000000   (  16 MB)
[    0.000000]       .text : 0x(ptrval) - 0x(ptrval)   (9184 kB)
[    0.000000]       .init : 0x(ptrval) - 0x(ptrval)   (1024 kB)
[    0.000000]       .data : 0x(ptrval) - 0x(ptrval)   ( 366 kB)
[    0.000000]        .bss : 0x(ptrval) - 0x(ptrval)   ( 390 kB)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1,
Nodes=1
[    0.000000] Hierarchical RCU implementation.
[    0.000000]  RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=1.
[    0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16,
nr_cpu_ids=1
[    0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16

<freeze>

Yet need to understand what is exactly going on.

--
Stefan

Quoted 37 lines
Signed-off-by Bai Ping <[email protected]>
Acked-by Dong Aisheng <[email protected]>

---
change from V3->v4:
- fix a typo in commit log
change from v4->v5:
- optimize the commit subject
change from v5->v6:
- no change

---
 drivers/clk/imx/clk-busy.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/clk/imx/clk-busy.c +2 -2
index 6df3389..9903652 100644
@@ -101,7 +101,7 @@ struct clk *imx_clk_busy_divider(const char *name,
 const char *parent_name,
 
 	init.name = name;
 	init.ops = &clk_busy_divider_ops;
-	init.flags = CLK_SET_RATE_PARENT;
+	init.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL;
 	init.parent_names = &parent_name;
 	init.num_parents = 1;

@@ -175,7 +175,7 @@ struct clk *imx_clk_busy_mux(const char *name,
 void __iomem *reg, u8 shift,
 
 	init.name = name;
 	init.ops = &clk_busy_mux_ops;
-	init.flags = 0;
+	init.flags = CLK_IS_CRITICAL;
 	init.parent_names = parent_names;
 	init.num_parents = num_parents;
#10 lore raw

PATCH v6 1/4 clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy mux

Quoted 6 lines · Jacky Bai
Quoted 6 lines

Subject: Re: [PATCH v6 1/4] clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy mux

Hi Bai,

On 20.03.2018 03:24, Bai Ping wrote:

Quoted 9 lines
Quoted 6 lines
Quoted 2 lines

The busy divider and busy mux is actually used by the system critical clocks, so add 'CLK_IS_CRITICAL' to clocks registered with these two type.

This seems that this patch breaks i.MX 6ULL. Our Colibri iMX6ULL freezes with v4.17-rc1:

Thanks for you report this. I will try on imx6ull and look into it.

I just sent a possible fix for this, unfortunately I forgot to add you to the recipients list, sorry about that:
https://patchwork.kernel.org/patch/10348099/

However, I am not 100% sure why this leads to a crash and whether that fix is good enough. It would be best if somebody with better clocking overview could have a closer look at that...

--
Stefan

Quoted 105 lines

BR
Jacky Bai

Quoted 103 lines
[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 4.17.0-rc1-00002-g7529efa14a7c-dirty
(ags at trochilidae) (gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11))
#517 SMP Wed Apr 18 11:11:07 CEST 2018
[    0.000000] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7),
cr=10c5387d
[    0.000000] CPU: div instructions available: patching division code
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing
instruction cache
[    0.000000] OF: fdt: Machine model: Toradex Colibri iMX6ULL 512MB on
Colibri Evaluation Board V3
[    0.000000] earlycon: ec_imx6q0 at MMIO 0x02020000 (options
'115200n8')
[    0.000000] bootconsole [ec_imx6q0] enabled
[    0.000000] debug: ignoring loglevel setting.
[    0.000000] Memory policy: Data cache writealloc
[    0.000000] cma: Reserved 256 MiB at 0x90000000
[    0.000000] On node 0 totalpages: 131072
[    0.000000]   Normal zone: 1024 pages used for memmap
[    0.000000]   Normal zone: 0 pages reserved
[    0.000000]   Normal zone: 131072 pages, LIFO batch:31
[    0.000000] random: fast init done
[    0.000000] percpu: Embedded 16 pages/cpu @(ptrval) s35084 r8192
d22260 u65536
[    0.000000] pcpu-alloc: s35084 r8192 d22260 u65536 alloc=16*4096
[    0.000000] pcpu-alloc: [0] 0
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages:
130048
[    0.000000] Kernel command line:

mtdparts=gpmi-nand:512k(mx6ull-bcb),1536k(u-boot1)ro,1536k(u- boot2)ro,512k(u-boot-env),-(ubi)
earlycon user_debug=31 ignore_loglevel ubi.mtd=ubi root=ubi0:rootfs rw rootfstype=ubifs ubi.fm_autoconvert=1 consoleblank=0 no_console_suspend=1 console=tty1 console=ttymxc0,115200n8

[    0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144
bytes)
[    0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072
bytes)
[    0.000000] Memory: 243904K/524288K available (8192K kernel code,
365K rwdata, 2720K rodata, 1024K init, 389K bss, 18240K reserved, 262144K
cma-reserved)
[    0.000000] Virtual kernel memory layout:
[    0.000000]     vector  : 0xffff0000 - 0xffff1000   (   4 kB)
[    0.000000]     fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)
[    0.000000]     vmalloc : 0xe0800000 - 0xff800000   ( 496 MB)
[    0.000000]     lowmem  : 0xc0000000 - 0xe0000000   ( 512 MB)
[    0.000000]     modules : 0xbf000000 - 0xc0000000   (  16 MB)
[    0.000000]       .text : 0x(ptrval) - 0x(ptrval)   (9184 kB)
[    0.000000]       .init : 0x(ptrval) - 0x(ptrval)   (1024 kB)
[    0.000000]       .data : 0x(ptrval) - 0x(ptrval)   ( 366 kB)
[    0.000000]        .bss : 0x(ptrval) - 0x(ptrval)   ( 390 kB)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1,
Nodes=1
[    0.000000] Hierarchical RCU implementation.
[    0.000000]  RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=1.
[    0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16,
nr_cpu_ids=1
[    0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16

<freeze>

Yet need to understand what is exactly going on.

--
Stefan

Quoted 37 lines
Signed-off-by Bai Ping <[email protected]>
Acked-by Dong Aisheng <[email protected]>

---
change from V3->v4:
- fix a typo in commit log
change from v4->v5:
- optimize the commit subject
change from v5->v6:
- no change

---
 drivers/clk/imx/clk-busy.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/clk/imx/clk-busy.c +2 -2
index 6df3389..9903652 100644
@@ -101,7 +101,7 @@ struct clk *imx_clk_busy_divider(const char *name,
 const char *parent_name,
 
 	init.name = name;
 	init.ops = &clk_busy_divider_ops;
-	init.flags = CLK_SET_RATE_PARENT;
+	init.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL;
 	init.parent_names = &parent_name;
 	init.num_parents = 1;

@@ -175,7 +175,7 @@ struct clk *imx_clk_busy_mux(const char *name,
 void __iomem *reg, u8 shift,
 
 	init.name = name;
 	init.ops = &clk_busy_mux_ops;
-	init.flags = 0;
+	init.flags = CLK_IS_CRITICAL;
 	init.parent_names = parent_names;
 	init.num_parents = num_parents;