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rockchip: pinctrl: rk322x: Move the iomux definitions into pinctrl-driver

PATCH Superseded David Wu 3 participants 5 messages Nov 9, 2017 – Dec 26, 2017

v2 of 3 Superseded Latest is v3 →

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David Wu

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#0 lore raw

PATCH v2 14/18 rockchip: pinctrl: rk322x: Move the iomux definitions into pinctrl-driver

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Content preview: Clean the iomux definitions at grf_rk322x.h, and move them
into pinctrl-driver for resolving the compiling error of redefinition. After that, define the uart2 iomux at rk322x-board file. Signed-off-by: David Wu <[email protected]> --- [...]

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From: David Wu <[email protected]>
Subject: [PATCH v2 14/18] rockchip: pinctrl: rk322x: Move the iomux definitions into pinctrl-driver
Date: Thu, 9 Nov 2017 17:24:58 +0800
Size: 23387
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20171109/ed09b948/attachment.mht>

#1 lore raw

PATCH v2 14/18 rockchip: pinctrl: rk322x: Move the iomux definitions into pinctrl-driver

Quoted 30 lines

Spam detection software, running on the system "lists.denx.de", has identified this incoming email as possible spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see @@CONTACT_ADDRESS@@ for details.

Content preview: Clean the iomux definitions at grf_rk322x.h, and move them
into pinctrl-driver for resolving the compiling error of redefinition. After that, define the uart2 iomux at rk322x-board file. Signed-off-by: David Wu <[email protected]> --- [...]

Content analysis details: (6.5 points, 5.0 required)

pts rule name description
---- ---------------------- --------------------------------------------------
0.6 RCVD_IN_SORBS_WEB RBL: SORBS: sender is an abusable web server

                            [58.22.7.114 listed in dnsbl.sorbs.net]
 2.7 RCVD_IN_PSBL           RBL: Received via a relay in PSBL
                            [211.157.147.133 listed in psbl.surriel.com]
 2.4 RCVD_IN_MSPIKE_L5      RBL: Very bad reputation (-5)
                            [211.157.147.133 listed in bl.mailspike.net]

0.8 UPPERCASE_50_75 message body is 50-75% uppercase
0.0 RCVD_IN_MSPIKE_BL Mailspike blacklisted
Clean the iomux definitions at grf_rk322x.h, and move them into pinctrl-driver for resolving the compiling error of redefinition. After that, define the uart2 iomux at rk322x-board file.

---

Quoted 9 lines

Changes in v2:
- New patch

 arch/arm/include/asm/arch-rockchip/grf_rk322x.h | 455 ------------------------
 arch/arm/mach-rockchip/rk322x-board-spl.c       |  20 +-
 arch/arm/mach-rockchip/rk322x-board.c           |  16 +
 drivers/pinctrl/rockchip/pinctrl_rk322x.c       | 453 +++++++++++++++++++++++
 4 files changed, 488 insertions(+), 456 deletions(-)
#2 lore raw

PATCH v2 14/18 rockchip: pinctrl: rk322x: Move the iomux definitions into pinctrl-driver

In reply to David Wu
Quoted 31 lines

Spam detection software, running on the system "lists.denx.de", has identified this incoming email as possible spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see @@CONTACT_ADDRESS@@ for details.

Content preview: Clean the iomux definitions at grf_rk322x.h, and move them
into pinctrl-driver for resolving the compiling error of redefinition. After that, define the uart2 iomux at rk322x-board file. Signed-off-by: David Wu <[email protected]> --- [...]

Content analysis details: (6.5 points, 5.0 required)

pts rule name description
---- ---------------------- --------------------------------------------------
0.6 RCVD_IN_SORBS_WEB RBL: SORBS: sender is an abusable web server

                            [58.22.7.114 listed in dnsbl.sorbs.net]
 2.7 RCVD_IN_PSBL           RBL: Received via a relay in PSBL
                            [211.157.147.133 listed in psbl.surriel.com]
 2.4 RCVD_IN_MSPIKE_L5      RBL: Very bad reputation (-5)
                            [211.157.147.133 listed in bl.mailspike.net]

0.8 UPPERCASE_50_75 message body is 50-75% uppercase
0.0 RCVD_IN_MSPIKE_BL Mailspike blacklisted
Clean the iomux definitions at grf_rk322x.h, and move them into pinctrl-driver for resolving the compiling error of redefinition. After that, define the uart2 iomux at rk322x-board file.

---

Quoted 9 lines

Changes in v2:
- New patch

 arch/arm/include/asm/arch-rockchip/grf_rk322x.h | 455 ------------------------
 arch/arm/mach-rockchip/rk322x-board-spl.c       |  20 +-
 arch/arm/mach-rockchip/rk322x-board.c           |  16 +
 drivers/pinctrl/rockchip/pinctrl_rk322x.c       | 453 +++++++++++++++++++++++
 4 files changed, 488 insertions(+), 456 deletions(-)
#3 lore raw

PATCH v2 14/18 rockchip: pinctrl: rk322x: Move the iomux definitions into pinctrl-driver

In reply to David Wu

Hi David,

Am Donnerstag, 9. November 2017, 17:24:58 CET schrieb David Wu:

Quoted 10 lines
arch/arm/mach-rockchip/rk322x-board-spl.c +1 -1
index 35f4f97..f7c6045 100644
@@ -30,7 +30,25 @@ DECLARE_GLOBAL_DATA_PTR;
 
 void board_debug_uart_init(void)
 {
-static struct rk322x_grf * const grf = (void *)GRF_BASE;
+       static struct rk322x_grf * const grf = (void *)GRF_BASE;

arch/arm/mach-rockchip/rk322x-board-spl.c DECLARE_GLOBAL_DATA_PTR; · line 43

Quoted 10 lines
arch/arm/mach-rockchip/rk322x-board-spl.c +10 -0
+       enum {
+               GPIO1B2_SHIFT           = 4,
+               GPIO1B2_MASK            = 3 << GPIO1B2_SHIFT,
+               GPIO1B2_UART1_SIN,
+               GPIO1B2_UART21_SIN,
+
+               GPIO1B1_SHIFT           = 2,
+               GPIO1B1_MASK            = 3 << GPIO1B1_SHIFT,
+               GPIO1B1_UART1_SOUT,
+               GPIO1B1_UART21_SOUT,

You seem to drop the GPIO1B1_GPIO = 0, line, so the enum counting wil get jumbled, because GPIO1B1_UART1_SOUT for example will get to be 4 instead of the 1 it needs to be.

This may be true for the other patches for the other socs as well, so you may want to double check?

Heiko

author
#4 lore raw

PATCH v2 14/18 rockchip: pinctrl: rk322x: Move the iomux definitions into pinctrl-driver

Hi Heiko

Quoted 28 lines · Heiko Stuebner

Hi David,

Am Donnerstag, 9. November 2017, 17:24:58 CET schrieb David Wu:

Quoted 10 lines
arch/arm/mach-rockchip/rk322x-board-spl.c +1 -1
index 35f4f97..f7c6045 100644
@@ -30,7 +30,25 @@ DECLARE_GLOBAL_DATA_PTR;
 
  void board_debug_uart_init(void)
  {
-static struct rk322x_grf * const grf = (void *)GRF_BASE;
+       static struct rk322x_grf * const grf = (void *)GRF_BASE;

arch/arm/mach-rockchip/rk322x-board-spl.c DECLARE_GLOBAL_DATA_PTR; · line 43

Quoted 10 lines
arch/arm/mach-rockchip/rk322x-board-spl.c +10 -0
+       enum {
+               GPIO1B2_SHIFT           = 4,
+               GPIO1B2_MASK            = 3 << GPIO1B2_SHIFT,
+               GPIO1B2_UART1_SIN,
+               GPIO1B2_UART21_SIN,
+
+               GPIO1B1_SHIFT           = 2,
+               GPIO1B1_MASK            = 3 << GPIO1B1_SHIFT,
+               GPIO1B1_UART1_SOUT,
+               GPIO1B1_UART21_SOUT,

You seem to drop the GPIO1B1_GPIO = 0, line, so the enum counting wil get jumbled, because GPIO1B1_UART1_SOUT for example will get to be 4 instead of the 1 it needs to be.

Quoted 3 lines

This may be true for the other patches for the other socs as well, so you may want to double check?

Yes, they are needed to check again.

Quoted 5 lines

Heiko