clk-divider: make sure read-only dividers do not write to their register
Subsystems (2)
Heiko Stuebner
maintainerPATCH 1/1 clk-divider: make sure read-only dividers do not write to their register
Commit e6d5e7d90be9 ("clk-divider: Fix READ_ONLY when divider > 1") removed the special ops struct for read-only clocks and instead opted to handle them regularly.
On the rk3368 this results in breakage as aclkm now gets set a value. While it is the same divider, the A53 core still doesn't like it. The reason being that "ACLKENMasserts one clock cycle before the rising edge of ACLKM" and the clock should only be touched when STANDBYWFIL2 is asserted.
So make sure, read-only clocks don't touch the clock-register at all even if only writing the same value.
--- drivers/clk/clk-divider.c | 4 ++++ 1 file changed, 4 insertions(+)
drivers/clk/clk-divider.c +4 -0
@@ -391,6 +391,10 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,unsigned long flags =0 ;u32 val; +/* don't do writes in read-only case */ +if (divider->flags &CLK_DIVIDER_READ_ONLY ) +return 0 ; + value =divider_get_val (rate, parent_rate, divider->table, divider->width, divider->flags);
Signature · 1 line
2.6.4
PATCH 1/1 clk-divider: make sure read-only dividers do not write to their register
Quoted 10 lines · Heiko Stuebner
Commit
e6d5e7d90be9("clk-divider: FixREAD_ONLYwhen divider > 1") removed the special ops struct for read-only clocks and instead opted to handle them regularly.On the rk3368 this results in breakage as aclkm now gets set a value. While it is the same divider, the A53 core still doesn't like it. The reason being that "ACLKENMasserts one clock cycle before the rising edge of ACLKM" and the clock should only be touched when STANDBYWFIL2 is asserted.
Quoted 6 lines
So make sure, read-only clocks don't touch the clock-register at all even if only writing the same value.
Fixes e6d5e7d90be9 ("clk-divider: Fix READ_ONLY when divider > 1")Reported-by Zhang Qing <[email protected]>Signed-off-by Heiko Stuebner <[email protected]>
It wouldn't hurt to clarify in the comment that this isn't just an optimisation, and that even writing the same value to the hardware may not be safe.
In any case
Cheers
James
Quoted 23 lines
--- drivers/clk/clk-divider.c | 4 ++++ 1 file changed, 4 insertions(+)drivers/clk/clk-divider.c +4
-0@@ -391,6 +391,10 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,unsigned long flags =0 ;u32 val; +/* don't do writes in read-only case */ +if (divider->flags &CLK_DIVIDER_READ_ONLY ) +return 0 ; + value =divider_get_val (rate, parent_rate, divider->table, divider->width, divider->flags);Signature · 1 line
2.6.4
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Heiko Stuebner
maintainerPATCH v2 1/1 clk-divider: make sure read-only dividers do not write to their register
In reply to Heiko StuebnerCommit e6d5e7d90be9 ("clk-divider: Fix READ_ONLY when divider > 1") removed the special ops struct for read-only clocks and instead opted to handle them regularly.
On the rk3368 this results in breakage as aclkm now gets set a value. While it is the same divider value, the A53 core still doesn't like it, which can result in the cpu ending up in a hang.
The reason being that "ACLKENMasserts one clock cycle before the rising edge of ACLKM" and the clock should only be touched when STANDBYWFIL2 is asserted.
So make sure read-only clocks don't touch the clock-register at all even if only writing the same value, as even writing the same value may not be safe in all cases.
---
changes in v2:
- emphasize that even setting the same divider may be unsafe
drivers/clk/clk-divider.c | 4 ++++ 1 file changed, 4 insertions(+)
drivers/clk/clk-divider.c +4 -0
@@ -391,6 +391,10 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,unsigned long flags =0 ;u32 val; +/* don't do writes in read-only case, as it may be unsafe */ +if (divider->flags &CLK_DIVIDER_READ_ONLY ) +return 0 ; + value =divider_get_val (rate, parent_rate, divider->table, divider->width, divider->flags);
Signature · 1 line
2.6.4
PATCH v2 1/1 clk-divider: make sure read-only dividers do not write to their register
Quoted 15 lines · Heiko Stuebner
Commit
e6d5e7d90be9("clk-divider: FixREAD_ONLYwhen divider > 1") removed the special ops struct for read-only clocks and instead opted to handle them regularly.On the rk3368 this results in breakage as aclkm now gets set a value. While it is the same divider value, the A53 core still doesn't like it, which can result in the cpu ending up in a hang.
The reason being that "ACLKENMasserts one clock cycle before the rising edge of ACLKM" and the clock should only be touched when STANDBYWFIL2 is asserted.So make sure read-only clocks don't touch the clock-register at all even if only writing the same value, as even writing the same value may not be safe in all cases.
Quoted 5 lines
Fixes e6d5e7d90be9 ("clk-divider: Fix READ_ONLY when divider > 1")Reported-by Zhang Qing <[email protected]>Signed-off-by Heiko Stuebner <[email protected]>Reviewed-by James Hogan <[email protected]>---
Hmph, the same patch[1] has been sitting in my inbox for months now but I never got a response to my last question and then forgot about it. I'll repeat the question here and hopefully we can finish the discussion.
Maybe it would make more sense to have different ops for read only dividers? The clk_set_rate op would be empty, while we would have proper recalc_rate and round_rate ops. We can't just flat out revert commit e6d5e7d90be9 (clk-divider: Fix READ_ONLY when divider > 1, 2014-11-14) because that will introduce the problem that it was fixing, but as long as we implement round_rate in addition to recalc_rate it should work.
[1] http://lkml.kernel.org/r/1428392806-14538-1-git-send-email-jy0922.shim at samsung.com
Signature · 2 lines
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Heiko Stuebner
maintainerPATCH v2 1/1 clk-divider: make sure read-only dividers do not write to their register
Am Mittwoch, 20. Januar 2016, 14:16:56 schrieb Stephen Boyd:
Quoted 35 lines · Heiko Stuebner
Quoted 15 lines
Commit
e6d5e7d90be9("clk-divider: FixREAD_ONLYwhen divider > 1") removed the special ops struct for read-only clocks and instead opted to handle them regularly.On the rk3368 this results in breakage as aclkm now gets set a value. While it is the same divider value, the A53 core still doesn't like it, which can result in the cpu ending up in a hang.
The reason being that "ACLKENMasserts one clock cycle before the rising edge of ACLKM" and the clock should only be touched when STANDBYWFIL2 is asserted.So make sure read-only clocks don't touch the clock-register at all even if only writing the same value, as even writing the same value may not be safe in all cases.
Quoted 5 lines
Fixes e6d5e7d90be9 ("clk-divider: Fix READ_ONLY when divider > 1")Reported-by Zhang Qing <[email protected]>Signed-off-by Heiko Stuebner <[email protected]>Reviewed-by James Hogan <[email protected]>---
Hmph, the same patch[1] has been sitting in my inbox for months now but I never got a response to my last question and then forgot about it. I'll repeat the question here and hopefully we can finish the discussion.
Maybe it would make more sense to have different ops for read only dividers? The
clk_set_rateop would be empty, while we would have properrecalc_rateandround_rateops. We can't just flat out revert commite6d5e7d90be9(clk-divider: FixREAD_ONLYwhen divider > 1, 2014-11-14) because that will introduce the problem that it was fixing, but as long as we implementround_ratein addition torecalc_rateit should work.
Quoted 3 lines
[1]
http://lkml.kernel.org/r/1428392806-14538-1-git-send-email-jy0922.shim at sa msung.com
Sorry for the second submission then. That really is from quite a while ago. Reintroducing a secondary ops-struct with a round-rate sounds fine for my side - I'll give that a shot tomorrow.
Heiko