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ARM: shmobile: r8a7790 CCI configuration

PATCH New Simon Horman 2 participants 2 messages Nov 21, 2014

Subsystems (4)
Arm (32-bit) Arm sub-architectures SuperH Arm/RISC-V/Renesas architecture
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Simon Horman

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#0 lore raw

PATCH 1/1 ARM: shmobile: r8a7790 CCI configuration

From: Gaku Inami <[email protected]>

Add the settings of CCI-400 for enabling ca15/ca7 snoop on r8a7790. Needed to configure the CCI boot cluster port regardless of MCPM.

Signed-off-by Gaku Inami <[email protected]>
Signed-off-by Magnus Damm <[email protected]>
Signed-off-by Simon Horman <[email protected]>
---
 arch/arm/mach-shmobile/smp-r8a7790.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
arch/arm/mach-shmobile/smp-r8a7790.c +18 -0
index 9c3da13..e909091 100644
@@ -25,6 +25,12 @@
 #include "pm-rcar.h"
 #include "r8a7790.h"
 
+#define CCI_BASE	0xf0090000
+#define CCI_SLAVE3	0x4000
+#define CCI_SLAVE4	0x5000
+#define CCI_SNOOP	0x0000
+#define CCI_STATUS	0x000c
+
 static struct rcar_sysc_ch r8a7790_ca15_scu = {
 	.chan_offs = 0x180, /* PWRSR5 .. PWRER5 */
 	.isr_bit = 12, /* CA15-SCU */

@@ -48,6 +54,8 @@ static struct rcar_apmu_config r8a7790_apmu_config[] = {
 
 static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus)
 {
+	void __iomem *p;
+
 	/* let APMU code install data related to shmobile_boot_vector */
 	shmobile_smp_apmu_prepare_cpus(max_cpus,
 				       r8a7790_apmu_config,

@@ -57,6 +65,16 @@ static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus)
 	r8a7790_pm_init();
 	rcar_sysc_power_up(&r8a7790_ca15_scu);
 	rcar_sysc_power_up(&r8a7790_ca7_scu);
+
+	/* enable snoop and DVM */
+	p = ioremap_nocache(CCI_BASE, 0x8000);
+	writel_relaxed(readl_relaxed(p + CCI_SLAVE3 + CCI_SNOOP) | 0x3,
+		p + CCI_SLAVE3 + CCI_SNOOP);    /* ca15 */
+	writel_relaxed(readl_relaxed(p + CCI_SLAVE4 + CCI_SNOOP) | 0x3,
+		p + CCI_SLAVE4 + CCI_SNOOP);    /* ca7 */
+	while (__raw_readl(p + CCI_STATUS));
+	/* wait for pending bit low */
+	iounmap(p);
 }
 
 struct smp_operations r8a7790_smp_ops __initdata = {
Signature · 1 line
2.1.1
#1 lore raw

PATCH 1/1 ARM: shmobile: r8a7790 CCI configuration

arch/arm/mach-shmobile/smp-r8a7790.c static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus) · line 76

Quoted 5 lines · On Friday 21 November 2014 13:09:46 Simon Horman wrote:
arch/arm/mach-shmobile/smp-r8a7790.c +4 -0
+       writel_relaxed(readl_relaxed(p + CCI_SLAVE4 + CCI_SNOOP) | 0x3,
+               p + CCI_SLAVE4 + CCI_SNOOP);    /* ca7 */
+       while (__raw_readl(p + CCI_STATUS));
+       /* wait for pending bit low */

Why are you using __raw_readl for the last access? I would make that readl_relaxed() like the other ones for consistency.

Also, a better way to express waiting for the register read is to put the ';' on the next line, or add a cpu_relax() statement:

	while (readl_relaxed(p + CCI_STATUS))
		cpu_relax();


	Arnd