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Remove barriers from the SLB shadow buffer update

PATCH In review Michael Neuling 2 participants 2 messages Aug 24, 2007 PowerPC

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Michael Neuling

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PATCH 1/1 Remove barriers from the SLB shadow buffer update

After talking to an IBM POWER hypervisor design and development (PHYP) guy, there seems to be no need for memory barriers when updating the SLB shadow buffer provided we only update it from the current CPU, which we do.

Also, these guys see no need in the future for these barriers.

Signed-off-by Michael Neuling <[email protected]>

---
Tested on PHYP and BML.

paulus: As you mentioned, this is 2.6.24 material.

 arch/powerpc/kernel/entry_64.S |    8 ++++----
 arch/powerpc/mm/slb.c          |    6 ++----
 2 files changed, 6 insertions(+), 8 deletions(-)
arch/powerpc/kernel/entry_64.S +4 -4
Index: linux-2.6-ozlabs/arch/powerpc/kernel/entry_64.S
===================================================================
@@ -385,15 +385,15 @@ BEGIN_FTR_SECTION
 	oris	r0,r6,(SLB_ESID_V)@h
 	ori	r0,r0,(SLB_NUM_BOLTED-1)@l
 
-	/* Update the last bolted SLB */
+	/* Update the last bolted SLB.  No write barriers are needed
+	 * here, provided we only update the current CPU's SLB shadow
+	 * buffer.
+	 */
 	ld	r9,PACA_SLBSHADOWPTR(r13)
 	li	r12,0
 	std	r12,SLBSHADOW_STACKESID(r9) /* Clear ESID */
-	eieio
 	std	r7,SLBSHADOW_STACKVSID(r9)  /* Save VSID */
-	eieio
 	std	r0,SLBSHADOW_STACKESID(r9)  /* Save ESID */
-	eieio
 
 	slbie	r6
 	slbie	r6		/* Workaround POWER5 < DD2.1 issue */
arch/powerpc/mm/slb.c +2 -4
Index: linux-2.6-ozlabs/arch/powerpc/mm/slb.c
===================================================================
@@ -59,14 +59,12 @@ static inline void slb_shadow_update(uns
 {
 	/*
 	 * Clear the ESID first so the entry is not valid while we are
-	 * updating it.
+	 * updating it.  No write barriers are needed here, provided
+	 * we only update the current CPU's SLB shadow buffer.
 	 */
 	get_slb_shadow()->save_area[entry].esid = 0;
-	smp_wmb();
 	get_slb_shadow()->save_area[entry].vsid = mk_vsid_data(ea, flags);
-	smp_wmb();
 	get_slb_shadow()->save_area[entry].esid = mk_esid_data(ea, entry);
-	smp_wmb();
 }
 
 static inline void slb_shadow_clear(unsigned long entry)
#1 lore raw
Quoted 6 lines · Michael Neuling

After talking to an IBM POWER hypervisor design and development (PHYP) guy, there seems to be no need for memory barriers when updating the SLB shadow buffer provided we only update it from the current CPU, which we do.

Also, these guys see no need in the future for these barriers.

Does this result in a significant performance gain? I'm just curious.

josh