Summit support for 2.5 [3/4]
PATCH 1/1 Summit support for 2.5 [3/4]
Patch originally by James Cleverdon
This patch turns TARGET_CPUS into a simple function target_cpus() that returns the approprate value for the appropriate apic addressing mode being used. Will optimise away on non-summit boxes.
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arch/i386/kernel/io_apic.c +17 -4
@@ -692,6 +692,20 @@ next:return current_vector; } +static inline int target_cpus (void ) +{ +switch (clustered_apic_mode) { +case CLUSTERED_APIC_NUMAQ : +/* broadcast to local quad */ +return APIC_BROADCAST_ID ; +case CLUSTERED_APIC_XAPIC : +/* any CPU on cluster 0 */ +return XAPIC_DEST_CPUS_MASK ; +default : +return cpu_online_map; + } +} +static struct hw_interrupt_type ioapic_level_irq_type;static struct hw_interrupt_type ioapic_edge_irq_type;
@@ -714,7 +728,7 @@ void __init setup_IO_APIC_irqs(void) entry.delivery_mode = dest_LowestPrio; entry.dest_mode =INT_DELIVERY_MODE ; entry.mask =0 ;/* enable IRQ */ - entry.dest.logical.logical_dest =TARGET_CPUS ; + entry.dest.logical.logical_dest =target_cpus (); idx =find_irq_entry (apic,pin,mp_INT);if (idx ==-1 ) {
@@ -732,7 +746,6 @@ void __init setup_IO_APIC_irqs(void)if (irq_trigger (idx)) { entry.trigger =1 ; entry.mask =1 ; - entry.dest.logical.logical_dest =TARGET_CPUS ; } irq =pin_2_irq (idx, apic, pin);
@@ -794,7 +807,7 @@ void __init setup_ExtINT_IRQ0_pin(unsign*/ entry.dest_mode =INT_DELIVERY_MODE ; entry.mask =0 ;/* unmask IRQ now */ - entry.dest.logical.logical_dest =TARGET_CPUS ; + entry.dest.logical.logical_dest =target_cpus (); entry.delivery_mode = dest_LowestPrio; entry.polarity =0 ; entry.trigger =0 ;
@@ -1868,7 +1881,7 @@ int io_apic_set_pci_routing (int ioapic, entry.delivery_mode = dest_LowestPrio; entry.dest_mode =INT_DELIVERY_MODE ; - entry.dest.logical.logical_dest =TARGET_CPUS ; + entry.dest.logical.logical_dest =target_cpus (); entry.mask =1 ;/* Disabled (masked) */ entry.trigger =1 ;/* Level sensitive */ entry.polarity =1 ;/* Low active */
include/asm-i386/smp.h +3 -10
@@ -21,17 +21,10 @@#endif #endif -#ifdef CONFIG_SMP -# ifdef CONFIG_CLUSTERED_APIC -# define TARGET_CPUS 0xf/* all CPUs in *THIS* quad */ -# define INT_DELIVERY_MODE 0/* physical delivery on LOCAL quad */ -# else -# define TARGET_CPUS cpu_online_map -# define INT_DELIVERY_MODE 1/* logical delivery broadcast to all procs */ -# endif +#ifdef CONFIG_X86_NUMAQ +#define INT_DELIVERY_MODE 0/* physical delivery on LOCAL quad */ #else -# define INT_DELIVERY_MODE 1/* logical delivery */ -# define TARGET_CPUS 0x01 +#define INT_DELIVERY_MODE 1/* logical delivery broadcast to all procs */ #endif #define CLUSTERED_APIC_NONE 0x00