[Fwd: Re: Bug in the _save_fp_context.]
No one seem to answer on my previous mail, regarding the problem in the _save_fp_context function in arch/mips/kernel/r4k_fpu.S.
What about you Ralf, any comments ?
/Carsten
-------- Original Message --------
Subject: Re: Bug in the _save_fp_context.
Date: Mon, 19 Mar 2001 17:13:06 +0100
From: Carsten Langgaard <[email protected]>
To: "Kevin D. Kissell" <[email protected]>
CC: [email protected]
References: <[email protected]> <00e901c0b08b$50bed400$0deca8c0@Ulysses>
Quoted 34 lines · Kevin D. Kissell
Quoted 11 lines
I think there is a bug in the
_save_fp_contextfunction inarch/mips/kernel/r4k_fpu.SThe problem is the following piece of code:
jr ra
.set nomacro
EX(sw t0,SC_FPC_EIR(a0))
nop
.set macroQuoted 5 lines
First of all what should the ".set nomacro" do?
If it means that the EX macro shouldn't be used then this entry wouldn't get into__ex_table, which would be wrong.
But it look like it uses the macro anyway, regardless of the ".set nomacro", at least with the compiler I use.Not surprising, really. "EX" is presumably a cpp macro that gets expanded by gcc from the .S file, based on some include file. .set directives affect only the assembler, and would inhibit assembler-level macros only. I'm not sure just what the definition of an assembler macro would be - it may or may not include pseudo-instructions like "la" or "li 32_bit_constant". I *think* that what the author was trying to do here was to ensure that the "sw" instruction in the EX expansion was really and truly a single instruction.
Quoted 6 lines
Never the less we do not handle entries in the
__ex_tablewhich is located in a branch delay.
So we need to handle the situation where we take a page fault on an instruction which is located in a brach delay slot, or we don't put the "potential" faulting instruction in a delay slot.
Quoted 6 lines
Quoted 1 line
Any ideas, how we should handle this in a nice and clean way?
Is the
__ex_tablereally ending up in the delay slot? Just looking at the source, I have the impression that the "sw t0,..." instruction should be in the delay slot, followed by the__ex_table.
The problem is that the address of the delay slot is put in the __ex_table
and then we take a page fault EPC is pointing at the jr instruction and not
the delay slot.
This result in a miss match when we try to lookup in __ex_table, resulting in
a kernel crash.
The faulting situation look like this:
EPC = address of delay slot
entry in __ex_table = address of delay slot - 4
Hopes that clarify it a bit more.
Quoted 13 lines
On another topic, now that I've patched the kernel to turn off the stupid stuck interrupt on my Malta board, I've realized that I can't just connect my old Atlas SCSI disk. I'm torn between ordering a Tekram 390 PCI SCSI card, which should be able to use our "MIPS safe" NCR driver as-is (I hope) and buying an IDE disk and going through the network install ritual. Which do you recommend? One thing I really never knew was just what kernel config options I need to select to build a kernel that can do the NFS-root bootstrap. Can you help me there?
Quoted 3 lines
Regards,
Kevin K.
--
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