Cleanup f00f bug code
PATCH 1/1 Cleanup f00f bug code
This patch changes the f00f bug workaround code to use a fixed mapping instead of touching the page tables directly. It also removes the assumption that only 686's don't have the bug. It has been tested for normal operation of the relocated IDT, but I don't have a processor with the bug to do a real test. Could someone with such a processor please verify that the workaround still works?
Signature · 1 line
Brian Gerst
arch/i386/config.in +5 -0
@@ -52,6 +52,7 @@ define_int CONFIG_X86_L1_CACHE_SHIFT 4 define_bool CONFIG_RWSEM_GENERIC_SPINLOCK y define_bool CONFIG_RWSEM_XCHGADD_ALGORITHM n + define_bool CONFIG_X86_F00F_BUG y else define_bool CONFIG_X86_WP_WORKS_OK y define_bool CONFIG_X86_INVLPG y
@@ -66,17 +67,20 @@ define_int CONFIG_X86_L1_CACHE_SHIFT 4 define_bool CONFIG_X86_USE_STRING_486 y define_bool CONFIG_X86_ALIGNMENT_16 y + define_bool CONFIG_X86_F00F_BUG y fi if [ "$CONFIG_M586" = "y" ]; then define_int CONFIG_X86_L1_CACHE_SHIFT 5 define_bool CONFIG_X86_USE_STRING_486 y define_bool CONFIG_X86_ALIGNMENT_16 y + define_bool CONFIG_X86_F00F_BUG y fi if [ "$CONFIG_M586TSC" = "y" ]; then define_int CONFIG_X86_L1_CACHE_SHIFT 5 define_bool CONFIG_X86_USE_STRING_486 y define_bool CONFIG_X86_ALIGNMENT_16 y define_bool CONFIG_X86_TSC y + define_bool CONFIG_X86_F00F_BUG y fi if [ "$CONFIG_M586MMX" = "y" ]; then define_int CONFIG_X86_L1_CACHE_SHIFT 5
@@ -84,6 +88,7 @@ define_bool CONFIG_X86_ALIGNMENT_16 y define_bool CONFIG_X86_TSC y define_bool CONFIG_X86_GOOD_APIC y + define_bool CONFIG_X86_F00F_BUG y fi if [ "$CONFIG_M686" = "y" ]; then define_int CONFIG_X86_L1_CACHE_SHIFT 5
arch/i386/kernel/setup.c +3 -4
@@ -1712,13 +1712,10 @@static void __init init_intel (struct cpuinfo_x86 *c) { -#ifndef CONFIG_M686 -static int f00f_workaround_enabled =0 ; -#endif char *p =NULL ;unsigned int l1i =0 , l1d =0 , l2 =0 , l3 =0 ;/* Cache sizes */ -#ifndef CONFIG_M686 +#ifdef CONFIG_X86_F00F_BUG /* * All current models of Pentium and Pentium with MMX technology CPUs * have the F0 0F bug, which lets nonpriviledged users lock up the system.
@@ -1726,6 +1723,8 @@*/ c->f00f_bug =0 ;if ( c->x86 ==5 ) { +static int f00f_workaround_enabled =0 ; + c->f00f_bug =1 ;if ( !f00f_workaround_enabled ) {trap_init_f00f_bug ();
arch/i386/kernel/traps.c +3 -16
@@ -719,25 +719,12 @@#endif /* CONFIG_MATH_EMULATION */ -#ifndef CONFIG_M686 +#ifdef CONFIG_X86_F00F_BUG void __init trap_init_f00f_bug (void ) { -unsigned long page; -pgd_t * pgd; -pmd_t * pmd; -pte_t * pte; +__set_fixmap (FIX_F00F_IDT ,__pa (&idt_table),PAGE_KERNEL_RO );/* -* Allocate a new page in virtual address space, -* move the IDT into it and write protect this page. -*/ - page = (unsigned long )vmalloc (PAGE_SIZE ); - pgd =pgd_offset (&init_mm, page); - pmd =pmd_offset (pgd, page); - pte =pte_offset (pmd, page); -__free_page (pte_page (*pte)); - *pte =mk_pte_phys (__pa (&idt_table),PAGE_KERNEL_RO ); -/* * Not that any PGE-capable kernel should have the f00f bug ... */ __flush_tlb_all ();
@@ -747,7 +734,7 @@* variable so that updating idt will automatically * update the idt descriptor.. */ - idt = (struct desc_struct *)page; + idt = (struct desc_struct *)fix_to_virt (FIX_F00F_IDT ); __asm__ __volatile__("lidt %0": "=m" (idt_descr)); }#endif
include/asm-i386/fixmap.h +3 -0
@@ -51,6 +51,9 @@#ifdef CONFIG_X86_LOCAL_APIC FIX_APIC_BASE, /* local (CPU) APIC) -- required for SMP or not */#endif +#ifdef CONFIG_X86_F00F_BUG + FIX_F00F_IDT, /* Virtual mapping for IDT */ +#endif #ifdef CONFIG_X86_IO_APIC FIX_IO_APIC_BASE_0 , FIX_IO_APIC_BASE_END = FIX_IO_APIC_BASE_0 + MAX_IO_APICS-1,