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Fix NR_IRQS when no IO apic

PATCH In review Brian Gerst 3 participants 4 messages Jan 28, 2002

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Brian Gerst

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#0 lore raw

PATCH 1/1 Fix NR_IRQS when no IO apic

NR_IRQS should be 16 when the IO apic is not configured, as the 8259 PIC cannot generate any more interrupts. It also fixes a bug where the IDT gets populated with random addresses, since only 16 entry stubs are created.

Signature · 1 line
						Brian Gerst
include/asm-i386/irq.h +4 -0
diff -urN linux-2.5.3-pre5/include/asm-i386/irq.h linux/include/asm-i386/irq.h
@@ -23,7 +23,11 @@
  * Since vectors 0x00-0x1f are used/reserved for the CPU,
  * the usable vector space is 0x20-0xff (224 vectors)
  */
+#ifdef CONFIG_X86_IO_APIC
 #define NR_IRQS 224
+#else
+#define NR_IRQS 16
+#endif
 
 static __inline__ int irq_cannonicalize(int irq)
 {
#1 lore raw

include/asm-i386/irq.h line 30

Quoted 11 lines · Brian Gerst

NR_IRQS should be 16 when the IO apic is not configured, as the 8259 PIC cannot generate any more interrupts. It also fixes a bug where the IDT gets populated with random addresses, since only 16 entry stubs are created.

include/asm-i386/irq.h +4 -0
+#ifdef CONFIG_X86_IO_APIC
 #define NR_IRQS 224
+#else
+#define NR_IRQS 16
+#endif

What about when ioapic is configured but not present?

Jeff

Signature · 3 lines
Jeff Garzik      | "I went through my candy like hot oatmeal
Building 1024    |  through an internally-buttered weasel."
MandrakeSoft     |             - goats.com
#2 lore raw
Quoted 1 line · Jeff Garzik

What about when ioapic is configured but not present?

Then we are back where we started? Which, unless I am missing something, is just a waste of memory?

I see this as a no-change if CONFIG_X86_IO_APIC is set, but a proper setting of NR_IRQS (which doesn't hurt anything but make our arrays/loops/etc off if not set) for the case of non-IOAPIC.

Robert Love

author
#3 lore raw
In reply to Brian Gerst
Quoted 8 lines · Jeff Garzik
Quoted 5 lines · Brian Gerst

NR_IRQS should be 16 when the IO apic is not configured, as the 8259 PIC cannot generate any more interrupts. It also fixes a bug where the IDT gets populated with random addresses, since only 16 entry stubs are created.

Quoted 7 lines

include/asm-i386/irq.h line 30

Quoted 5 lines
include/asm-i386/irq.h +4 -0
+#ifdef CONFIG_X86_IO_APIC
 #define NR_IRQS 224
+#else
+#define NR_IRQS 16
+#endif

What about when ioapic is configured but not present?

No problem, just wasted memory. With CONFIG_X86_IO_APIC, all 224 entry stubs are created. See arch/i386/kernel/i8259.c

Signature · 1 line
						Brian Gerst