: { 2.5 } Correcting comment in include/asm-i386/tlbflush.h
PATCH 1/1 : { 2.5 } Correcting comment in include/asm-i386/tlbflush.h
TLB flush happens when the CR3 register is written to. Comment is
misleading ....
include/asm-i386/tlbflush.h +4 -4
@@ -7,14 +7,14 @@#define __flush_tlb () \ do { \ unsigned int tmpreg; \ \ __asm__ __volatile__( \ - "movl %%cr3, %0; # flush TLB \n" \ - "movl %0, %%cr3; \n" \ + "movl %%cr3, %0; \n" \ + "movl %0, %%cr3; # flush TLB \n" \ : "=r" (tmpreg) \ :: "memory"); \ } while (0)/* * Global pages have to be flushed a bit differently. Not a real
@@ -23,14 +23,14 @@#define __flush_tlb_global () \ do { \ unsigned int tmpreg; \ \ __asm__ __volatile__( \ "movl %1, %%cr4; # turn off PGE \n" \ - "movl %%cr3, %0; # flush TLB \n" \ - "movl %0, %%cr3; \n" \ + "movl %%cr3, %0; \n" \ + "movl %0, %%cr3; # flush TLB \n" \ "movl %2, %%cr4; # turn PGE back on \n" \ : "=&r" (tmpreg) \ : "r" (mmu_cr4_features & ~X86_CR4_PGE), \ "r" (mmu_cr4_features) \ : "memory"); \ } while (0)