rng driver update
Subsystems (2)
PATCH 1/1 rng driver update
Linus, please do a
bk pull bk://kernel.bkbits.net/jgarzik/random-2.5
This will update the following files:
Documentation/i810_rng.txt | 134 ------ drivers/char/amd768_rng.c | 295 -------------- drivers/char/i810_rng.c | 404 ------------------- Documentation/hw_random.txt | 134 ++++++ arch/i386/kernel/cpu/centaur.c | 47 +- arch/i386/kernel/cpu/common.c | 5 arch/i386/kernel/cpu/proc.c | 15 drivers/char/Kconfig | 37 - drivers/char/Makefile | 3 drivers/char/hw_random.c | 846 +++++++++++++++++++++++++++++++++++------ include/asm-i386/cpufeature.h | 10 include/asm-i386/msr.h | 1 12 files changed, 940 insertions(+), 991 deletions(-)
through these ChangeSets:
<[email protected]> (03/03/13 1.1109)
[hw_random] fixes and cleanups
* s/Via/VIA/
* allow multiple simultaneous open(2)s of the chrdev. This allows us to eliminate some code, without modifying the core code (rng_dev_read) at all.
* s/__exit// in ->cleanup ops, to eliminate link error
<[email protected]> (03/03/13 1.1108)
[hw_random] add support for VIA Nehemiah RNG ("xstore" instruction)
<[email protected]> (03/03/13 1.1107)
[ia32] cpu capabilities cleanups and additions
* Add support for new Centaur(VIA) and Intel cpuid feature bits, expanding the x86_capability array by two.
* (cleanup) Move cpu setup for newer Via C3 cpus into its own
function, init_c3()
* Add support for RNG control msr on VIA Nehemiah
* export X86_FEATURE_XSTORE and cpu_has_xstore macros so that kernel code may easily test for cpu support of the new "xstore" instruction.
<[email protected]> (03/03/13 1.1106)
[hw_random] update amd768_rng driver to be modular; add Intel support
Take Alan's amd768_rng driver, recently renamed to hw_random.c, and convert it's very-simple structure to support multiple types of hardware RNG. Integrate Intel i8xx (ICH) RNG support.
<[email protected]> (03/03/13 1.1105)
[hw_random] shuffle files in preparation for hw_random driver update
Delete drivers/char/i810_rng.c, superceded. Rename Doc/i810_rng.txt to Doc/hw_random.txt. Rename drv/char/amd768_rng.c to drv/char/hw_random.c.
PATCH 1/5 rng driver update
# This is a BitKeeper generated patch for the following project:
# Project Name: Linux kernel tree
# This patch format is intended for GNU patch command version 2.5 or higher. # This patch includes the following deltas:
# ChangeSet 1.1104 -> 1.1105
# drivers/char/amd768_rng.c 1.3 -> 1.4 drivers/char/hw_random.c (moved)
# drivers/char/i810_rng.c 1.13 -> (deleted)
# Documentation/i810_rng.txt 1.6 -> 1.7 Documentation/hw_random.txt (moved)
#
# The following is the BitKeeper ChangeSet Log
# --------------------------------------------
# 03/03/13 [email protected] 1.1105
# [hw_random] shuffle files in preparation for hw_random driver update #
# Delete drivers/char/i810_rng.c, superceded.
# Rename Doc/i810_rng.txt to Doc/hw_random.txt.
# Rename drv/char/amd768_rng.c to drv/char/hw_random.c.
# --------------------------------------------
#
Documentation/hw_random.txt new file +134 -0
@@ -0,0 +1,134 @@ + Hardware driver for Intel i810 Random Number Generator (RNG) + Copyright 2000,2001 Jeff Garzik <[email protected]> + Copyright 2000,2001 Philipp Rumpf <[email protected]> + +Introduction: + + The i810_rng device driver is software that makes use of a + special hardware feature on the Intel i8xx-based chipsets, + a Random Number Generator (RNG). + + In order to make effective use of this device driver, you + should download the support software as well. Download the + latest version of the "intel-rng-tools" package from the + i810_rng driver's official Web site: + + http://sourceforge.net/projects/gkernel/ + +About the Intel RNG hardware, from the firmware hub datasheet: + + The Firmware Hub integrates a Random Number Generator (RNG) + using thermal noise generated from inherently random quantum + mechanical properties of silicon. When not generating new random + bits the RNG circuitry will enter a low power state. Intel will + provide a binary software driver to give third party software + access to our RNG for use as a security feature. At this time, + the RNG is only to be used with a system in an OS-present state. + +Theory of operation: + + Character driver. Using the standard open() + and read() system calls, you can read random data from + the i810 RNG device. This data is NOT CHECKED by any + fitness tests, and could potentially be bogus (if the + hardware is faulty or has been tampered with). Data is only + output if the hardware "has-data" flag is set, but nevertheless + a security-conscious person would run fitness tests on the + data before assuming it is truly random. + + /dev/intel_rng is char device major 10, minor 183. + +Driver notes: + + * FIXME: support poll(2) + + NOTE: request_mem_region was removed, for two reasons: + 1) Only one RNG is supported by this driver, 2) The location + used by the RNG is a fixed location in MMIO-addressable memory, + 3) users with properly working BIOS e820 handling will always + have the region in which the RNG is located reserved, so + request_mem_region calls always fail for proper setups. + However, for people who use mem=XX, BIOS e820 information is + -not- in /proc/iomem, and request_mem_region(RNG_ADDR) can + succeed. + +Driver details: + + Based on: + Intel 82802AB/82802AC Firmware Hub (FWH) Datasheet + May 1999 Order Number: 290658-002 R + + Intel 82802 Firmware Hub: Random Number Generator + Programmer's Reference Manual + December 1999 Order Number: 298029-001 R + + Intel 82802 Firmware HUB Random Number Generator Driver + Copyright (c) 2000 Matt Sottek <[email protected]> + + Special thanks to Matt Sottek. I did the "guts", he + did the "brains" and all the testing. + +Change history: + + Version 0.9.8: + * Support other i8xx chipsets by adding 82801E detection + * 82801DB detection is the same as for 82801CA. + + Version 0.9.7: + * Support other i8xx chipsets too (by adding 82801BA(M) and + 82801CA(M) detection) + + Version 0.9.6: + * Internal driver cleanups, prep for 1.0.0 release. + + Version 0.9.5: + * Rip out entropy injection via timer. It never ever worked, + and a better solution (rngd) is now available. + + Version 0.9.4: + * Fix: Remove request_mem_region + * Fix: Horrible bugs in FIPS calculation and test execution + + Version 0.9.3: + * Clean up rng_read a bit. + * Update i810_rng driver Web site URL. + * Increase default timer interval to 4 samples per second. + * Abort if mem region is not available. + * BSS zero-initialization cleanup. + * Call misc_register() from rng_init_one. + * Fix O_NONBLOCK to occur before we schedule. + + Version 0.9.2: + * Simplify open blocking logic + + Version 0.9.1: + * Support i815 chipsets too (Matt Sottek) + * Fix reference counting when statically compiled (prumpf) + * Rewrite rng_dev_read (prumpf) + * Make module races less likely (prumpf) + * Small miscellaneous bug fixes (prumpf) + * Use pci table for PCI id list + + Version 0.9.0: + * Don't register a pci_driver, because we are really + using PCI bridge vendor/device ids, and someone + may want to register a driver for the bridge. (bug fix) + * Don't let the usage count go negative (bug fix) + * Clean up spinlocks (bug fix) + * Enable PCI device, if necessary (bug fix) + * iounmap on module unload (bug fix) + * If RNG chrdev is already in use when open(2) is called, + sleep until it is available. + * Remove redundant globals rng_allocated, rng_use_count + * Convert numeric globals to unsigned + * Module unload cleanup + + Version 0.6.2: + * Clean up spinlocks. Since we don't have any interrupts + to worry about, but we do have a timer to worry about, + we use spin_lock_bh everywhere except the timer function + itself. + * Fix module load/unload. + * Fix timer function and h/w enable/disable logic + * New timer interval sysctl + * Clean up sysctl names
Documentation/i810_rng.txt deleted +0 -134
134 lines not on this page · raw message
drivers/char/amd768_rng.c deleted +0 -295
295 lines not on this page · raw message
drivers/char/hw_random.c new file +295 -0
295 lines not on this page · raw message
drivers/char/i810_rng.c deleted +0 -404
404 lines not on this page · raw message
PATCH 2/5 rng driver update
In reply to Jeff Garzik# This is a BitKeeper generated patch for the following project:
# Project Name: Linux kernel tree
# This patch format is intended for GNU patch command version 2.5 or higher. # This patch includes the following deltas:
# ChangeSet 1.1105 -> 1.1106
# drivers/char/Kconfig 1.8 -> 1.9
# drivers/char/hw_random.c 1.4 -> 1.5
# drivers/char/Makefile 1.55 -> 1.56
#
# The following is the BitKeeper ChangeSet Log
# --------------------------------------------
# 03/03/13 [email protected] 1.1106
# [hw_random] update amd768_rng driver to be modular; add Intel support #
# Take Alan's amd768_rng driver, recently renamed to hw_random.c,
# and convert it's very-simple structure to support multiple # types of hardware RNG. Integrate Intel i8xx (ICH) RNG support. # -------------------------------------------- # diff -Nru a/drivers/char/Kconfig b/drivers/char/Kconfig --- a/drivers/char/Kconfig Thu Mar 13 18:52:44 2003 +++ b/drivers/char/Kconfig Thu Mar 13 18:52:44 2003 @@ -709,39 +709,20 @@
If you're not sure, say N.
-config INTEL_RNG
- tristate "Intel i8x0 Random Number Generator support"
+config HW_RANDOM
+ tristate "Intel/AMD H/W Random Number Generator support"
depends on (X86 || IA64) && PCI
---help---
This driver provides kernel-side support for the Random Number
- Generator hardware found on Intel i8xx-based motherboards. + Generator hardware found on Intel i8xx-based motherboards, + and AMD 76x-based motherboards.
- Both a character driver, used to read() entropy data, and a timer - function which automatically adds entropy directly into the - kernel pool, are exported by this driver. + Provides a character driver, used to read() entropy data.
To compile this driver as a module ( = code which can be inserted in and removed from the running kernel whenever you want), say M here and read <file:Documentation/modules.txt>. The module will be called
- i810_rng.
-
- If unsure, say N.
-
-config AMD_RNG
- tristate "AMD 768 Random Number Generator support"
- depends on X86 && PCI
- ---help---
- This driver provides kernel-side support for the Random Number
- Generator hardware found on AMD 76x based motherboards.
-
- Both a character driver, used to read() entropy data, and a timer - function which automatically adds entropy directly into the - kernel pool, are exported by this driver. - - To compile this driver as a module ( = code which can be inserted in - and removed from the running kernel whenever you want), say M here - and read <file:Documentation/modules.txt>. The module will be called - amd768_rng. + hw_random.
If unsure, say N.
drivers/char/Makefile +1 -2
@@ -59,8 +59,7 @@ obj-$(CONFIG_TOSHIBA) += toshiba.o obj-$(CONFIG_I8K) += i8k.o obj-$(CONFIG_DS1620) += ds1620.o -obj-$(CONFIG_INTEL_RNG) += i810_rng.o -obj-$(CONFIG_AMD_RNG) += amd768_rng.o +obj-$(CONFIG_HW_RANDOM) += hw_random.o obj-$(CONFIG_QIC02_TAPE) += tpqic02.o obj-$(CONFIG_FTAPE) += ftape/ obj-$(CONFIG_H8) += h8.o
drivers/char/hw_random.c +287 -76
467 lines not on this page · raw message
PATCH 3/5 rng driver update
In reply to Jeff Garzik# This is a BitKeeper generated patch for the following project:
# Project Name: Linux kernel tree
# This patch format is intended for GNU patch command version 2.5 or higher. # This patch includes the following deltas:
# ChangeSet 1.1106 -> 1.1107
# include/asm-i386/msr.h 1.12 -> 1.13
# arch/i386/kernel/cpu/common.c 1.19 -> 1.20
# arch/i386/kernel/cpu/centaur.c 1.6 -> 1.7
# include/asm-i386/cpufeature.h 1.6 -> 1.7
# arch/i386/kernel/cpu/proc.c 1.8 -> 1.9
#
# The following is the BitKeeper ChangeSet Log
# --------------------------------------------
# 03/03/13 [email protected] 1.1107
# [ia32] cpu capabilities cleanups and additions
#
# * Add support for new Centaur(VIA) and Intel cpuid feature bits,
# expanding the x86_capability array by two.
# * (cleanup) Move cpu setup for newer Via C3 cpus into its own
# function, init_c3()
# * Add support for RNG control msr on VIA Nehemiah
# * export X86_FEATURE_XSTORE and cpu_has_xstore macros so that
# kernel code may easily test for cpu support of the new
# "xstore" instruction.
# --------------------------------------------
#
arch/i386/kernel/cpu/centaur.c +32 -15
@@ -248,6 +248,37 @@ }#endif +static void __init init_c3 (struct cpuinfo_x86 *c) +{ +u32 lo, hi; + +/* Test for Centaur Extended Feature Flags presence */ +if (cpuid_eax (0xC0000000 ) >=0xC0000001 ) { +/* store Centaur Extended Feature Flags as +* word 5 of the CPU capability bit array +*/ + c->x86_capability[5 ] =cpuid_edx (0xC0000001 ); + } + +switch (c->x86_model) { + case 6 ... 8: /* Cyrix III family */ +rdmsr (MSR_VIA_FCR , lo, hi); + lo |= (1 <<1 |1 <<7 );/* Report CX8 & enable PGE */ +wrmsr (MSR_VIA_FCR , lo, hi); + +set_bit (X86_FEATURE_CX8 , c->x86_capability); +set_bit (X86_FEATURE_3DNOW , c->x86_capability); + +/* fall through */ + +case 9 :/* Nehemiah */ +default : +get_model_name (c); +display_cacheinfo (c); +break ; + } +} +static void __init init_centaur (struct cpuinfo_x86 *c) {enum {
@@ -386,21 +417,7 @@break ;case 6 : -switch (c->x86_model) { - case 6 ... 8: /* Cyrix III family */ -rdmsr (MSR_VIA_FCR , lo, hi); - lo |= (1 <<1 |1 <<7 );/* Report CX8 & enable PGE */ -wrmsr (MSR_VIA_FCR , lo, hi); - -set_bit (X86_FEATURE_CX8 , c->x86_capability); -set_bit (X86_FEATURE_3DNOW , c->x86_capability); - -case 9 :/* Nehemiah */ -default : -get_model_name (c); -display_cacheinfo (c); -break ; - } +init_c3 (c);break ; } }
arch/i386/kernel/cpu/common.c +3 -2
@@ -211,9 +211,10 @@/* Intel-defined flags: level 0x00000001 */ if ( c->cpuid_level >=0x00000001 ) { -u32 capability; -cpuid (0x00000001 , &tfms, &junk, &junk, &capability); +u32 capability, excap; +cpuid (0x00000001 , &tfms, &junk, &excap, &capability); c->x86_capability[0 ] = capability; + c->x86_capability[4 ] = excap; c->x86 = (tfms >>8 ) &15 ; c->x86_model = (tfms >>4 ) &15 ; c->x86_mask = tfms &15 ;
arch/i386/kernel/cpu/proc.c +14 -1
@@ -37,7 +37,20 @@NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,/* Other (Linux-defined) */ -"cxmmx" ,"k6_mtrr" ,"cyrix_arr" ,"centaur_mcr" ,NULL ,NULL ,NULL ,NULL , +"cxmmx" ,"k6_mtrr" ,"cyrix_arr" ,"centaur_mcr" , +NULL ,NULL ,NULL ,NULL , +NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL , +NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL , +NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL , + +/* Intel-defined (#2) */ +"pni" ,NULL ,NULL ,"monitor" ,"ds_cpl" ,NULL ,NULL ,NULL , +"tm2" ,NULL ,"cnxt_id" ,NULL ,NULL ,NULL ,NULL ,NULL , +NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL , +NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL , + +/* VIA/Cyrix/Centaur-defined */ +NULL ,NULL ,"xstore" ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL ,NULL , NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
include/asm-i386/cpufeature.h +8 -2
@@ -9,9 +9,9 @@#include <linux/bitops.h> -#define NCAPINTS 4/* Currently we have 4 32-bit words worth of info */ +#define NCAPINTS 6/* Currently we have 6 32-bit words worth of info */ -/* Intel-defined CPU features, CPUID level 0x00000001, word 0 */ +/* Intel-defined CPU features, CPUID level 0x00000001 (edx), word 0 */ #define X86_FEATURE_FPU (0*32+ 0)/* Onboard FPU */ #define X86_FEATURE_VME (0*32+ 1)/* Virtual Mode Extensions */ #define X86_FEATURE_DE (0*32+ 2)/* Debugging Extensions */
@@ -64,6 +64,11 @@#define X86_FEATURE_CYRIX_ARR (3*32+ 2)/* Cyrix ARRs (= MTRRs) */ #define X86_FEATURE_CENTAUR_MCR (3*32+ 3)/* Centaur MCRs (= MTRRs) */ +/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ + +/* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */ +#define X86_FEATURE_XSTORE (5*32+ 2)/* on-CPU RNG present (xstore insn) */ +#define cpu_has (c, bit) test_bit(bit, (c)->x86_capability)#define boot_cpu_has (bit) test_bit(bit, boot_cpu_data.x86_capability)
@@ -87,6 +92,7 @@#define cpu_has_k6_mtrr boot_cpu_has(X86_FEATURE_K6_MTRR)#define cpu_has_cyrix_arr boot_cpu_has(X86_FEATURE_CYRIX_ARR)#define cpu_has_centaur_mcr boot_cpu_has(X86_FEATURE_CENTAUR_MCR) +#define cpu_has_xstore boot_cpu_has(X86_FEATURE_XSTORE)#endif /* __ASM_I386_CPUFEATURE_H */
include/asm-i386/msr.h +1 -0
@@ -218,6 +218,7 @@/* VIA Cyrix defined MSRs*/ #define MSR_VIA_FCR 0x1107#define MSR_VIA_LONGHAUL 0x110a +#define MSR_VIA_RNG 0x110b#define MSR_VIA_BCR2 0x1147/* Transmeta defined MSRs */
PATCH 4/5 rng driver update
In reply to Jeff Garzik# This is a BitKeeper generated patch for the following project:
# Project Name: Linux kernel tree
# This patch format is intended for GNU patch command version 2.5 or higher. # This patch includes the following deltas:
# ChangeSet 1.1107 -> 1.1108
# drivers/char/Kconfig 1.9 -> 1.10
# drivers/char/hw_random.c 1.5 -> 1.6
#
# The following is the BitKeeper ChangeSet Log
# --------------------------------------------
# 03/03/13 [email protected] 1.1108
# [hw_random] add support for VIA Nehemiah RNG ("xstore" instruction) # --------------------------------------------
#
drivers/char/Kconfig +1 -1
@@ -710,7 +710,7 @@ If you're not sure, say N. config HW_RANDOM - tristate "Intel/AMD H/W Random Number Generator support" + tristate "Intel/AMD/Via H/W Random Number Generator support" depends on (X86 || IA64) && PCI ---help--- This driver provides kernel-side support for the Random Number
drivers/char/hw_random.c +145 -1
186 lines not on this page · raw message
PATCH 5/5 rng driver update
In reply to Jeff Garzik# This is a BitKeeper generated patch for the following project:
# Project Name: Linux kernel tree
# This patch format is intended for GNU patch command version 2.5 or higher. # This patch includes the following deltas:
# ChangeSet 1.1108 -> 1.1109
# drivers/char/Kconfig 1.10 -> 1.11
# drivers/char/hw_random.c 1.6 -> 1.7
#
# The following is the BitKeeper ChangeSet Log
# --------------------------------------------
# 03/03/13 [email protected] 1.1109
# [hw_random] fixes and cleanups
#
# * s/Via/VIA/
# * allow multiple simultaneous open(2)s of the chrdev. This allows
# us to eliminate some code, without modifying the core code (rng_dev_read) # at all. # * s/__exit// in ->cleanup ops, to eliminate link error # -------------------------------------------- # diff -Nru a/drivers/char/Kconfig b/drivers/char/Kconfig --- a/drivers/char/Kconfig Thu Mar 13 18:53:15 2003 +++ b/drivers/char/Kconfig Thu Mar 13 18:53:15 2003 @@ -710,12 +710,12 @@ If you're not sure, say N.
config HW_RANDOM
- tristate "Intel/AMD/Via H/W Random Number Generator support"
+ tristate "Intel/AMD/VIA HW Random Number Generator support"
depends on (X86 || IA64) && PCI
---help---
This driver provides kernel-side support for the Random Number Generator hardware found on Intel i8xx-based motherboards,
- and AMD 76x-based motherboards.
+ AMD 76x-based motherboards, and Via Nehemiah CPUs.
Provides a character driver, used to read() entropy data.
drivers/char/hw_random.c +11 -31
@@ -1,5 +1,5 @@/* -Hardware driver for the Intel/AMD/Via Random Number Generators (RNG) +Hardware driver for the Intel/AMD/VIA Random Number Generators (RNG) (c) Copyright 2003 Red Hat Inc <[email protected]> derived from
@@ -79,22 +79,21 @@#define RNG_MISCDEV_MINOR 183/* official */ static int rng_dev_open (struct inode *inode,struct file *filp); -static int rng_dev_release (struct inode *inode,struct file *filp);static ssize_t rng_dev_read (struct file *filp,char *buf,size_t size,loff_t * offp);static int __init intel_init (struct pci_dev *dev); -static void __exit intel_cleanup(void); +static void intel_cleanup (void );static unsigned int intel_data_present (void );static u32 intel_data_read (void );static int __init amd_init (struct pci_dev *dev); -static void __exit amd_cleanup(void); +static void amd_cleanup (void );static unsigned int amd_data_present (void );static u32 amd_data_read (void );static int __init via_init (struct pci_dev *dev); -static void __exit via_cleanup(void); +static void via_cleanup (void );static unsigned int via_data_present (void );static u32 via_data_read (void );
@@ -107,12 +106,9 @@ };static struct rng_operations *rng_ops; -static struct semaphore rng_open_sem;/* Semaphore for serializing rng_open/release */ -static struct file_operations rng_chrdev_ops = { .owner =THIS_MODULE , .open = rng_dev_open, - .release = rng_dev_release, .read = rng_dev_read, };
@@ -262,7 +258,7 @@return rc; } -static void __exit intel_cleanup(void) +static void intel_cleanup (void ) {u8 hw_status;
@@ -333,7 +329,7 @@return rc; } -static void __exit amd_cleanup(void) +static void amd_cleanup (void ) {u8 rnen;
@@ -346,7 +342,7 @@/*********************************************************************** * -* Via RNG operations +* VIA RNG operations * */
@@ -448,14 +444,14 @@unneeded */ rdmsr (MSR_VIA_RNG , lo, hi);if ((lo &VIA_RNG_ENABLE ) ==0 ) { - printk(KERN_ERR PFX "cannot enable Via C3 RNG, aborting\n"); + printk(KERN_ERR PFX "cannot enable VIA C3 RNG, aborting\n");return -ENODEV ; }return 0 ; } -static void __exit via_cleanup(void) +static void via_cleanup (void ) {u32 lo, hi;
@@ -473,26 +469,12 @@static int rng_dev_open (struct inode *inode,struct file *filp) { +/* enforce read-only access to this chrdev */ if ((filp->f_mode &FMODE_READ ) ==0 )return -EINVAL ;if (filp->f_mode &FMODE_WRITE )return -EINVAL ; -/* wait for device to become free */ -if (filp->f_flags &O_NONBLOCK ) { -if (down_trylock (&rng_open_sem)) -return -EAGAIN ; - }else { -if (down_interruptible (&rng_open_sem)) -return -ERESTARTSYS ; - } -return 0 ; -} - - -static int rng_dev_release (struct inode *inode,struct file *filp) -{ -up (&rng_open_sem);return 0 ; }
@@ -595,8 +577,6 @@DPRINTK ("ENTER\n" ); -init_MUTEX (&rng_open_sem); -/* Probe for Intel, AMD RNGs */ pci_for_each_dev (pdev) { ent =pci_match_device (rng_pci_tbl, pdev);
@@ -607,7 +587,7 @@ }#ifdef __i386__ -/* Probe for Via RNG */ +/* Probe for VIA RNG */ if (cpu_has_xstore) { rng_ops = &rng_vendor_ops[rng_hw_via]; pdev =NULL ;