Bugfix for 64-bit targets
PATCH 1/1 Bugfix for 64-bit targets
The attached patch fixes a bug in arm target emulation on hosts where sizeof(int) > 4. On these targets the offset wouldn't be properly sign extended.
Paul
Index: translate.c
===================================================================
RCS file: /cvsroot/qemu/qemu/target-arm/translate.c,v retrieving revision 1.10
translate.c +3 -3
@@ -690,15 +867,15 @@ static void disas_arm_insn(DisasContextcase 0xa :case 0xb : { -int offset; +int32_t offset;/* branch (and link) */ - val = (int )s->pc; + val = (int32_t )s->pc;if (insn & (1 <<24 )) {gen_op_movl_T0_im (val); gen_op_movl_reg_TN[0 ][14 ](); } - offset = (((int )insn <<8 ) >>8 ); + offset = (((int32_t )insn <<8 ) >>8 ); val += (offset <<2 ) +4 ;gen_op_jmp ((long )s->tb, val); s->is_jmp =DISAS_TB_JUMP ;
Hi,
I am afraid to say that sizeof(int) = 4 is hardcoded in QEMU. QEMU assumes that sizeof(long) = sizeof(void *) = 4 or 8 bytes depending on the host.
Fabrice.
Quoted 41 lines · Paul Brook
The attached patch fixes a bug in arm target emulation on hosts where sizeof(int) > 4. On these targets the offset wouldn't be properly sign extended.
Paul
------------------------------------------------------------------------
Index:
translate.c
===================================================================
RCS file: /cvsroot/qemu/qemu/target-arm/translate.c,v retrieving revision 1.10
diff -u -p -r1.10translate.ctranslate.c +3
-4@@ -690,15 +867,15 @@ static void disas_arm_insn(DisasContextcase 0xa :case 0xb : { -int offset; +int32_t offset;/* branch (and link) */ - val = (int )s->pc; + val = (int32_t )s->pc;if (insn & (1 <<24 )) {gen_op_movl_T0_im (val); gen_op_movl_reg_TN[0 ][14 ](); } - offset = (((int )insn <<8 ) >>8 ); + offset = (((int32_t )insn <<8 ) >>8 ); val += (offset <<2 ) +4 ;gen_op_jmp ((long )s->tb, val); s->is_jmp =DISAS_TB_JUMP ; ------------------------------------------------------------------------_______________________________________________
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