PPC4XX DMA polarity bug in linuxppc-2.6.9

I believe that there is a PPC4xx DMA driver bug in the following kernel, file and function:
linuxppc-2.6.9,
/arch/ppc/syslib/ppc4xx_dma.c,
ppc4xx_init_dma_channel()

Symptoms are:
DMA does not work as the polarity bits (DMA Req, Ack, EOT) are not set correctly in the DMA controller using the ppc4xx_init_dma_channel() function call, but when this is called twice in succession, then it does work.

Cause is (I believe):
/arch/ppc/syslib/ppc4xx_dma.c:
On line 469 the old polarity bits in p_dma_ch are ORed in when it should be ORing in the new polarity bits from p_init. p_init is then saved into p_dma_ch. This means that it only gets correctly programmed when the function is called twice:

   467  /* clear all polarity signals and then "or" in new signal levels */
   468  polarity &= ~GET_DMA_POLARITY(dmanr);
   469  polarity |= p_dma_ch->polarity;

Fix could be:
469 polarity |= p_init->polarity;

Is there anyone else using the PPC4XX DMA?

Colin Wernham

FWIW
I have used the PPC4xx dma on 405GP systems and a 440GP system with 2.4.21 and 2.4.25. I found the ppc4xx_dma.c functions didn't work in the way I needed. I just read the code very carefully and used a few of the functions combined with some direct manipulation of the DMA registers.

As I recall, I don't think the polarity is the only problem in that file. It certainly doesn't support the 440 DMA registers - the COUNT register is different.

The code in ppc4xx_dma.c is however, very useful as a guide in how to go about setting up a DMA transfer; just read it carefully with the processor manual to hand.

Mark Powell, Senior Software Engineer
Curtiss-Wright Controls Embedded Computing
Tel: +44 (0) 1763 852222
Email: [email protected]