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Fix MIPS counter / compare interrupt

PATCH In review Ralf Baechle 3 participants 4 messages Aug 15, 2005 – Aug 16, 2005

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#0 lore raw

PATCH 1/3 Fix MIPS counter / compare interrupt

The count / compare interrupt is wired to the CPU's internal interrupt controller, not a PIC.

 hw/mips_r4k.c        |   10 ++++++++--
 target-mips/helper.c |   12 +++++++++++-
 2 files changed, 19 insertions(+), 3 deletions(-)
hw/mips_r4k.c +4 -2
Index: qemu-mips/hw/mips_r4k.c
===================================================================
@@ -72,7 +75,8 @@ void cpu_mips_store_count (CPUState *env
 void cpu_mips_store_compare (CPUState *env, uint32_t value)
 {
     cpu_mips_update_count(env, cpu_mips_get_count(env), value);
-    pic_set_irq(5, 0);
+    cpu_single_env->CP0_Cause &= ~0x00008000;
+    cpu_reset_interrupt(cpu_single_env, CPU_INTERRUPT_HARD);
 }
 
 static void mips_timer_cb (void *opaque)
@@ -86,7 +90,8 @@ static void mips_timer_cb (void *opaque)
     }
 #endif
     cpu_mips_update_count(env, cpu_mips_get_count(env), env->CP0_Compare);
-    pic_set_irq(5, 1);
+    cpu_single_env->CP0_Cause |= 0x00008000;
+    cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HARD);
 }
 
 void cpu_mips_clock_init (CPUState *env)
#1 lore raw

Hi,

hw/mips_r4k.c

Quoted 11 lines · Ralf Baechle

The count / compare interrupt is wired to the CPU's internal interrupt controller, not a PIC.

 hw/mips_r4k.c        |   10 ++++++++--
 target-mips/helper.c |   12 +++++++++++-
 2 files changed, 19 insertions(+), 3 deletions(-)

Index: qemu-mips/hw/mips_r4k.c
===================================================================

hw/mips_r4k.c +0 -0

Somebody else than me seems to use git on qemu... I regularly cvsimport qemu, but do not have webspace to provide it. Is anybody interested in hosting it?

Ciao,
Dscho

#2 lore raw

You can always put it in the forum in the patches area. Just notify this list that it's there.

Thanks,
Hetz

Quoted 29 lines · Johannes Schindelin

Hi,

hw/mips_r4k.c

Quoted 11 lines · Ralf Baechle

The count / compare interrupt is wired to the CPU's internal interrupt controller, not a PIC.

 hw/mips_r4k.c        |   10 ++++++++--
 target-mips/helper.c |   12 +++++++++++-
 2 files changed, 19 insertions(+), 3 deletions(-)

Index: qemu-mips/hw/mips_r4k.c
===================================================================

hw/mips_r4k.c +0 -0

Somebody else than me seems to use git on qemu... I regularly cvsimport qemu, but do not have webspace to provide it. Is anybody interested in hosting it?

Ciao,
Dscho

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#3 lore raw

Hi,

Quoted 2 lines · Hetz Ben Hamo

You can always put it in the forum in the patches area. Just notify this list that it's there.

Sorry, I did not explain. GIT is the new source code management system adopted by many of the Linux kernel developers. It is similar to CVS in that it allows you to keep a record on what changes occured, and when, and by whom. It is dissimilar to CVS in that it does not need a central server (although you can set up even several), and makes it very, very easy to work on several branches of your project, merging the result backs to your mainline when you're satisfied with the outcome.

My current qemu-git directory uses 6 Megabyte, and in order to be useful, it cannot live as a single file on a public server.

Ciao,
Dscho