nand booting support (SPL) for phyCORE-i.MX31

index 9ccb9ac..1f639a8 100755
@@ -522,6 +522,7 @@ LIST_ARM11="		\
 	apollon		\
 	imx31_litekit	\
 	imx31_phycore	\
+	imx31_phycore_nand	\
 	mx31ads		\
 	smdk6400	\
 "

index 58b8331..7519dfe 100644
@@ -353,7 +353,7 @@ $(NAND_SPL):	$(VERSION_FILE)	$(obj)include/autoconf.mk
 		$(MAKE) -C nand_spl/board/$(BOARDDIR) all
 
 $(U_BOOT_NAND):	$(NAND_SPL) $(obj)u-boot.bin $(obj)include/autoconf.mk
-		cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
+		cat $(obj)nand_spl/u-boot-spl-aligned.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
 
 $(ONENAND_IPL):	$(VERSION_FILE)	$(obj)include/autoconf.mk
 		$(MAKE) -C onenand_ipl/board/$(BOARDDIR) all

@@ -2805,6 +2805,13 @@ imx31_litekit_config	: unconfig
 imx31_phycore_config	: unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm1136 imx31_phycore NULL mx31
 
+imx31_phycore_nand_config	: unconfig
+	@mkdir -p $(obj)include $(obj)board/imx31_phycore
+	@mkdir -p $(obj)nand_spl/board/imx31_phycore
+	@echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
+	@$(MKCONFIG) -n $@ -a imx31_phycore arm arm1136 imx31_phycore NULL mx31
+	@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
+
 mx31ads_config		: unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads freescale mx31
 

index d34dc02..412defc 100644
@@ -1 +1,11 @@
+#
+# (C) Copyright 2008
+# was changed by Maxim Artamonov, <[email protected]>
+#
+
+ifndef CONFIG_NAND_SPL
 TEXT_BASE = 0x87f00000
+else
+TEXT_BASE = 0x87ec0000
+endif
+

index c5d6eb0..bd838c7 100644
@@ -1,5 +1,7 @@
 /*
- *
+ * (C) Copyright 2008
+ * Maxim Artamonov, <[email protected]>
+ * 
  * (c) 2007 Pengutronix, Sascha Hauer <[email protected]>
  *
  * See file CREDITS for list of people who contributed to this

@@ -43,6 +45,20 @@
 	bcs 1b
 .endm
 
+#ifdef CONFIG_NAND_SPL
+/* somewhat macro to reduce bin size for CONFIG_NAND_SPL*/
+.macro FILLREGS begreg, val, count, step
+	ldr r2, =\begreg
+	ldr r3, =\val
+	ldr	r4, =\count
+2:
+	str	r3,	[r2]
+	add	r2,	r2, #\step
+	subs	r4,	r4,	#1
+	bcs 2b
+.endm
+#endif
+
 .globl lowlevel_init
 lowlevel_init:
 

@@ -60,10 +76,20 @@ lowlevel_init:
 
 	REG	CCM_SPCTL, PLL_PD(1) | PLL_MFD(0x43) | PLL_MFI(12) | PLL_MFN(1)
 
+	REG	CCM_UPCTL, 0x40c2403 /* USB Clock 60 MHZ *//*add 201108 for USB clocking init*/
+
+#ifdef CONFIG_NAND_SPL
+	FILLREGS 0x43FAC26C, 0, 0x3, 0x4
+#else
 	REG	0x43FAC26C, 0 /* SDCLK */
 	REG	0x43FAC270, 0 /* CAS */
 	REG	0x43FAC274, 0 /* RAS */
+#endif /* CONFIG_NAND_SPL */
 	REG	0x43FAC27C, 0x1000 /* CS2 (CSD0) */
+
+#ifdef CONFIG_NAND_SPL
+	FILLREGS 0x43FAC284, 0, 0x17, 0x4
+#else
 	REG	0x43FAC284, 0 /* DQM3 */
 	REG	0x43FAC288, 0 /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 (0x288..0x2DC) */
 	REG	0x43FAC28C, 0

@@ -87,6 +113,7 @@ lowlevel_init:
 	REG	0x43FAC2D4, 0
 	REG	0x43FAC2D8, 0
 	REG	0x43FAC2DC, 0
+#endif /* CONFIG_NAND_SPL */
 	REG	0xB8001010, 0x00000004
 	REG	0xB8001004, 0x006ac73a
 	REG	0xB8001000, 0x92100000

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index 51b664d..596efe9 100644
@@ -1,6 +1,9 @@
 /*
  *  armboot - Startup Code for OMP2420/ARM1136 CPU-core
  *
+ *
+ *  Copyright (c) 2008 Maxim Artamonov, <[email protected]>
+ *
  *  Copyright (c) 2004	Texas Instruments <[email protected]>
  *
  *  Copyright (c) 2001	Marius Gr?ger <[email protected]>

@@ -32,6 +35,15 @@
 #include <version.h>
 .globl _start
 _start: b	reset
+#ifdef CONFIG_NAND_SPL
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+#else
 #ifdef CONFIG_ONENAND_IPL
 	ldr	pc, _hang
 	ldr	pc, _hang

@@ -68,6 +80,7 @@ _irq:			.word irq
 _fiq:			.word fiq
 _pad:			.word 0x12345678 /* now 16*4=64 */
 #endif	/* CONFIG_ONENAND_IPL */
+#endif	/* CONFIG_NAND_SPL */
 .global _end_vect
 _end_vect:
 

@@ -156,9 +169,9 @@ relocate:				/* relocate U-Boot to RAM	    */
 	adr	r0, _start		/* r0 <- current position of code   */
 	ldr	r1, _TEXT_BASE		/* test if we run from flash or RAM */
 	cmp	r0, r1			/* don't reloc during debug	    */
-#ifndef CONFIG_ONENAND_IPL
+#if !defined(CONFIG_ONENAND_IPL) && !defined(CONFIG_NAND_SPL)
 	beq	stack_setup
-#endif	/* CONFIG_ONENAND_IPL */
+#endif	/* !CONFIG_ONENAND_IPL && !CONFIG_NAND_SPL*/
 
 	ldr	r2, _armboot_start
 	ldr	r3, _bss_start

@@ -175,7 +188,7 @@ copy_loop:
 	/* Set up the stack						    */
 stack_setup:
 	ldr	r0, _TEXT_BASE		/* upper 128 KiB: relocated uboot   */
-#ifdef CONFIG_ONENAND_IPL
+#if defined(CONFIG_ONENAND_IPL) || defined (CONFIG_NAND_SPL)
 	sub	sp, r0, #128		/* leave 32 words for abort-stack   */
 #else
 	sub	r0, r0, #CFG_MALLOC_LEN /* malloc area			    */

@@ -184,14 +197,14 @@ stack_setup:
 	sub	r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
 #endif
 	sub	sp, r0, #12		/* leave 3 words for abort-stack    */
-#endif	/* CONFIG_ONENAND_IPL */
+#endif	/* CONFIG_ONENAND_IPL || CONFIG_NAND_SPL*/
 
 clear_bss:
 	ldr	r0, _bss_start		/* find start of bss segment	    */
 	ldr	r1, _bss_end		/* stop here			    */
 	mov	r2, #0x00000000		/* clear			    */
 
-#ifndef CONFIG_ONENAND_IPL
+#if !defined(CONFIG_ONENAND_IPL) && !defined(CONFIG_NAND_SPL)
 clbss_l:str	r2, [r0]		/* clear loop...		    */
 	add	r0, r0, #4
 	cmp	r0, r1

@@ -200,12 +213,15 @@ clbss_l:str	r2, [r0]		/* clear loop...		    */
 
 	ldr	pc, _start_armboot
 
+#ifdef CONFIG_NAND_SPL
+_start_armboot: .word nand_boot
+#else
 #ifdef CONFIG_ONENAND_IPL
 _start_armboot: .word start_oneboot
 #else
 _start_armboot: .word start_armboot
-#endif
-
+#endif /* CONFIG_ONENAND_IPL */
+#endif /* CONFIG_NAND_SPL */
 
 /*
  *************************************************************************

@@ -244,7 +260,7 @@ cpu_init_crit:
 	mov	lr, ip		/* restore link */
 	mov	pc, lr		/* back to my caller */
 
-#ifndef CONFIG_ONENAND_IPL
+#if !defined(CONFIG_ONENAND_IPL) && !defined(CONFIG_NAND_SPL)
 /*
  *************************************************************************
  *

@@ -357,11 +373,12 @@ cpu_init_crit:
 	.macro get_fiq_stack			@ setup FIQ stack
 	ldr	sp, FIQ_STACK_START
 	.endm
-#endif	/* CONFIG_ONENAND_IPL */
+#endif	/* !CONFIG_ONENAND_IPL && !CONFIG_NAND_SPL*/
 
 /*
  * exception handlers
  */
+#ifndef CONFIG_NAND_SPL
 #ifdef CONFIG_ONENAND_IPL
 	.align	5
 do_hang:

@@ -436,3 +453,4 @@ arm1136_cache_flush:
 		mcr	p15, 0, r1, c7, c5, 0	@ invalidate I cache
 		mov	pc, lr			@ back to caller
 #endif	/* CONFIG_ONENAND_IPL */
+#endif	/* !CONFIG_NAND_SPL*/

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new file mode 100644
index 0000000..4c271c5
@@ -0,0 +1,33 @@
+#
+# (C) Copyright 2008
+# Maxim Artamonov, <[email protected]>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+# phyCORE-i.MX31 - PHYTEC???s phyCORE Single Board Computer module 
+
+# TEXT_BASE for SPL: = CFG_NAND_U_BOOT_DST-0x40000 is set in board/imx31_phycore/config.mk
+
+# PAD_TO used to generate a 2kByte binary needed for the combined image
+# -> PAD_TO = TEXT_BASE + 2048
+PAD_TO	:= $(shell expr $$[$(TEXT_BASE) + 2048])
+
+ifeq ($(debug),1)
+PLATFORM_CPPFLAGS += -DDEBUG
+endif

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