support for CPUFREQ_ETERNAL drivers by the ondemand governor
PATCH 1/1 support for CPUFREQ_ETERNAL drivers by the ondemand governor
Hello,
For now the ondemand governor doesn't support the drivers which reports a transition latency of CPUFREQ_ETERNAL. That's really a problem because most of the drivers declare such a latency (simply because it's not known, not really because the transition will take an eternal time). All userspace daemons suport those drivers, they just don't pay attention to the transition latency.
This patch proposes to consider a CPUFREQ_ETERNAL latency as the maximum possible latency of the governor (10 ms). I think this should be conservative enough to be safe with any driver.
Hoping you like it,
Eric
--
Support for CPUFREQ_ETERNAL drivers by the ondemand governor.
--
drivers/cpufreq/cpufreq_ondemand.c renamed from drivers/cpufreq/cpufreq_ondemand.c.orig +5 -3
@@ -56,7 +56,7 @@ static unsigned int def_sampling_rat#define MAX_SAMPLING_RATE (500 * def_sampling_rate)#define DEF_SAMPLING_RATE_LATENCY_MULTIPLIER (1000)#define DEF_SAMPLING_DOWN_FACTOR (10) -#define TRANSITION_LATENCY_LIMIT (10 * 1000) +#define TRANSITION_LATENCY_LIMIT (10 * 1000 * 1000)/* ns */ #define sampling_rate_in_HZ (x) (((x * HZ) < (1000 * 1000))?1:((x * HZ) / (1000 * 1000)))static void do_dbs_timer (void *data);
@@ -385,8 +385,8 @@ static int cpufreq_governor_dbs(struct c (!policy->cur))return -EINVAL ; -if (policy->cpuinfo.transition_latency > - (TRANSITION_LATENCY_LIMIT *1000 )) +if ((policy->cpuinfo.transition_latency >TRANSITION_LATENCY_LIMIT ) && + (policy->cpuinfo.transition_latency !=CPUFREQ_ETERNAL ))return -EINVAL ;if (this_dbs_info->enable)/* Already enabled */ break ;
@@ -416,6 +416,8 @@ static int cpufreq_governor_dbs(struct c/* policy latency is in nS. Convert it to uS first */ latency = policy->cpuinfo.transition_latency; +if (latency ==CPUFREQ_ETERNAL ) + latency =TRANSITION_LATENCY_LIMIT ;if (latency <1000 ) latency =1000 ;
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Quoted 9 lines · Eric Piel
Hello,
For now the ondemand governor doesn't support the drivers which reports a transition latency of
CPUFREQ_ETERNAL. That's really a problem because most of the drivers declare such a latency (simply because it's not known, not really because the transition will take an eternal time). All userspace daemons suport those drivers, they just don't pay attention to the transition latency.
Quoted 3 lines
This patch proposes to consider a
CPUFREQ_ETERNALlatency as the maximum possible latency of the governor (10 ms). I think this should be conservative enough to be safe with any driver.
No. CPUFREQ_ETERNAL is there to assert no dynamic frequency governor runs with this driver. If a driver is safe to run on dynamic frequency governors like ondemand, fix the latency value instead.
Dominik
PATCH 1/1 transition latency of speedstep-ich
Quoted 1 line · Dominik Brodowski
On Sun, Feb 06, 2005 at 11:33:49PM +0100, Eric Piel wrote:
:
Quoted 6 lines
Quoted 1 line
This patch proposes to consider a
CPUFREQ_ETERNALlatency as the maximum possible latency of the governor (10 ms). I think this should be conservative enough to be safe with any driver.No.
CPUFREQ_ETERNALis there to assert no dynamic frequency governor runs with this driver. If a driver is safe to run on dynamic frequency governors like ondemand, fix the latency value instead.
OK, so here is a patch for vanilla 2.6.11 to set the transition latency of speedstep-ich (the only driver which I can test in addtion to p4-clockmod). Actually it was quite hard to find, the intel manual (29834006.pdf) doesn't assert this latency clearly. From what I understood the frequency transition could take up to about 40µs (p.44) while the voltage transition could take up to 100µs (p.22 and p.58). So I put 100µs as the transition latency of this driver.
I've tried it on my computer, it works, and the ondemand governor can now support my hardware!
Hope you like it,
Eric
--
Set the transition latency of speedstep-ich to 100µs as described in intel's manual.
--
arch/i386/kernel/cpu/cpufreq/speedstep-ich.c renamed from arch/i386/kernel/cpu/cpufreq/speedstep-ich.c.orig +2 -1
@@ -335,7 +335,8 @@/* cpuinfo and default policy values */ policy->governor =CPUFREQ_DEFAULT_GOVERNOR ; - policy->cpuinfo.transition_latency =CPUFREQ_ETERNAL ; +/* Max 100µs, according to intel's 29834006.pdf p.22 */ + policy->cpuinfo.transition_latency =100000 ; policy->cur = speed; result =cpufreq_frequency_table_cpuinfo (policy, speedstep_freqs);
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Re: [PATCH] transition latency of speedstep-ich (third try)
Quoted 13 lines · Dominik Brodowski wrote/
Hi,
Quoted 1 line · Eric Piel
Here is my third try to get speedstep-ich compatible with the ondemand governor. Taking into account the comments of Dominik I've gone through the intel documentation in order to get the transition latency depending on the processor.
Thanks for doing so!
Review
Quoted 2 lines
(quoted diff) +2
-0+ case SPEEDSTEP_PROCESSOR_PIII_T: + /* Max 100??s, according to intel's 29834006.pdf p.22 */^^
Quoted 8 lines
The greek sign in microsecond can't be printed well, so I suggest you use "us" instead.
Review
Quoted 1 line
(quoted diff) +1
-0+ * Max ~42??s -> 50??s, according to intel's 25068607.pdf p.40 and p.50^^ ^^same here.
Ok, sorry, just forgot it was not an ASCII character (even xterm supports UTF-8 nowadays ;-) ). I'll resend as soon as I get the answer from Venki.
Quoted 3 lines
Other than that, it'd be great if you, Venki, could take a look at the technical side of this. Because of the cpufreq list still being down, I attached the message in full below.
Indeed, Venki, I would be extremely thanksfull if you could validate those numbers. To sum up, could you confirm that the transition latency between two frequencies never exeeds:
* 100us for Coppermine and Tualatin
* 50us for Pentium 4 M
Cheers
Eric
Quoted 62 lines
Quoted 62 lines
While for the centrino processors such information is clearly written, this was not the case for the processors managed by speedstep-ich. I did my best to understand the electrical timing descriptions and the results look realistic, but I can't guaranty 100% certainty. At least, the code hasn't destroyed my pentium coppermine yet ;-)
It's against 2.6.13, hope you like it...
Eric
--
Set the transition latency of speedstep-ich depending on the processor, using information taken from intel's manuals.Signed-off-by Eric Piel <[email protected]>--
arch/i386/kernel/cpu/cpufreq/speedstep-ich.c renamed from arch/i386/kernel/cpu/cpufreq/speedstep-ich.c.bak +31
-1@@ -301,6 +301,35 @@ static int speedstep_verify (struct cpuf } +/** +* speedstep_get_transition_latency - returns the maximum transition latency +* of the current processor +* @processor: type of processor +* +* The CPU transition latency depends on the type of CPU, so we get it +* from a database. +*/ +static unsigned int speedstep_get_transition_latency (unsigned int processor) +{ +switch (processor) { +case SPEEDSTEP_PROCESSOR_PIII_C : +case SPEEDSTEP_PROCESSOR_PIII_C_EARLY : +/* According to intel's p3_ds.pdf p.23 and table 22, similar to PIII_T */ +case SPEEDSTEP_PROCESSOR_PIII_T : +/* Max 100??s, according to intel's 29834006.pdf p.22 */ +return 100000 ; +case SPEEDSTEP_PROCESSOR_P4M : +/* +* Depends on the bus clock, which should be at least 100MHz. +* Max ~42??s -> 50??s, according to intel's 25068607.pdf p.40 and p.50 +*/ +return 50000 ; +default : +/* No info has yet be found, so we are conservative */ +return CPUFREQ_ETERNAL ; + } +} +static int speedstep_cpu_init (struct cpufreq_policy *policy) {int result =0 ;@@ -335,7 +364,8 @@ static int speedstep_cpu_init(struct cpu/* cpuinfo and default policy values */ policy->governor =CPUFREQ_DEFAULT_GOVERNOR ; - policy->cpuinfo.transition_latency =CPUFREQ_ETERNAL ; + policy->cpuinfo.transition_latency = +speedstep_get_transition_latency (speedstep_processor); policy->cur = speed; result =cpufreq_frequency_table_cpuinfo (policy, speedstep_freqs);