ppc32: Support for 82xx PQII on-chip PCI bridge
PATCH 1/1 ppc32: Support for 82xx PQII on-chip PCI bridge
This patch adds on-chip PCI bridge support for the PQ2 family. The incomplete existent code is updated with interrupt handling stuff and board-specific bits for 8272ADS and PQ2FADS; the related files were renamed (from m8260_pci to m82xx_pci) to be of more generic fashion. This is tested with 8266ADS and 8272ADS, should work on PQ2FADS as well.
Signed-off-by Vitaly Bordug <[email protected]>
support for PCI bridge on Freescale 8272ADS
---
commit fd47b8335113abcfb34553a83e641cd5ee5e8637
tree 874039bc658fe59955b149328a70521a56744a27
parent 88d7bd8cb9eb8d64bf7997600b0d64f7834047c5
author Vitaly Bordug <[email protected]> 1116425444 +0400 committer Vitaly Bordug <[email protected]> 1116425444 +0400
arch/ppc/Kconfig (mode:100644 sha1:6e6377a69d5bc58c16de9f12013b377b3af7d17e) renamed from arch/ppc/Kconfig (mode:100644 sha1:600f23d7fd33aae9e5115875ada43a289e075b5d) +2 -2
@@ -1143,12 +1143,12 @@ config PCI_8260 bool - depends on PCI && 8260 && !8272 + depends on PCI && 8260 default y config 8260_PCI9 bool " Enable workaround for MPC826x erratum PCI 9" - depends on PCI_8260 + depends on PCI_8260 && !ADS8272 default y choice
arch/ppc/platforms/pq2ads.h (mode:100644 sha1:067d9a5aebc108f7301913e74d3d218161c23ea7) renamed from arch/ppc/platforms/pq2ads.h (mode:100644 sha1:cf5e5dd06d6300d7733b20f4e5b21c31a1bdda48) +21 -26
59 lines not on this page · raw message
arch/ppc/syslib/Makefile (mode:100644 sha1:14c90119c2802283d6e96f71d990365170e89eb7) renamed from arch/ppc/syslib/Makefile (mode:100644 sha1:dd418ea3426c70a4ed065986e464967fce8122fb) +1 -1
@@ -81,7 +81,7 @@ obj-$(CONFIG_SPRUCE) += cpc700_pic.o indirect_pci.o pci_auto.o \ todc_time.o obj-$(CONFIG_8260) += m8260_setup.o -obj-$(CONFIG_PCI_8260) += m8260_pci.o indirect_pci.o +obj-$(CONFIG_PCI_8260) += m82xx_pci.o indirect_pci.o pci_auto.o obj-$(CONFIG_8260_PCI9) += m8260_pci_erratum9.o obj-$(CONFIG_CPM2) += cpm2_common.o cpm2_pic.o ifeq ($(CONFIG_PPC_GEN550),y)
dev/null (tree:874039bc658fe59955b149328a70521a56744a27) renamed from arch/ppc/syslib/m8260_pci.c (mode:100644 sha1:057cc3f8ff378c0de881482d55b47255e3c5ea72) +0 -193
193 lines not on this page · raw message
dev/null (tree:874039bc658fe59955b149328a70521a56744a27) renamed from arch/ppc/syslib/m8260_pci.h (mode:100644 sha1:d1352120acd7ef7853041098bf12ae79a8ac1e0a) +0 -76
76 lines not on this page · raw message
arch/ppc/syslib/m8260_pci_erratum9.c (mode:100644 sha1:1dc7e4e1d4914ed5d11f583b944de475092436d7) renamed from arch/ppc/syslib/m8260_pci_erratum9.c (mode:100644 sha1:9c0582d639e051ccba4d213044045bf99211550c) +5 -5
@@ -31,7 +31,7 @@ #include <asm/immap_cpm2.h> #include <asm/cpm2.h> -#include "m8260_pci.h" +#include "m82xx_pci.h" #ifdef CONFIG_8260_PCI9 /*#include <asm/mpc8260_pci9.h>*/ /* included in asm/io.h */
@@ -248,11 +248,11 @@ static inline int is_pci_mem(unsigned long addr) { - if (addr >= MPC826x_PCI_LOWER_MMIO && - addr <= MPC826x_PCI_UPPER_MMIO) + if (addr >= M82xx_PCI_LOWER_MMIO && + addr <= M82xx_PCI_UPPER_MMIO) return 1; - if (addr >= MPC826x_PCI_LOWER_MEM && - addr <= MPC826x_PCI_UPPER_MEM) + if (addr >= M82xx_PCI_LOWER_MEM && + addr <= M82xx_PCI_UPPER_MEM) return 1; return 0; }
arch/ppc/syslib/m8260_setup.c (mode:100644 sha1:fda75d79050c3e9201ce7033193645bd74609aec) renamed from arch/ppc/syslib/m8260_setup.c (mode:100644 sha1:23ea3f694de2066ec5b324ebedb38b1c027415ce) +9 -2
@@ -34,7 +34,8 @@ unsigned char __res[sizeof(bd_t)]; extern void cpm2_reset(void); -extern void m8260_find_bridges(void); +extern void pq2_find_bridges(void); +extern void pq2pci_init_irq(void); extern void idma_pci9_init(void); /* Place-holder for board-specific init */
@@ -56,7 +57,7 @@ idma_pci9_init(); #endif #ifdef CONFIG_PCI_8260 - m8260_find_bridges(); + pq2_find_bridges(); #endif #ifdef CONFIG_BLK_DEV_INITRD if (initrd_start)
@@ -173,6 +174,12 @@ * in case the boot rom changed something on us. */ cpm2_immr->im_intctl.ic_siprr = 0x05309770; + +#if defined(CONFIG_PCI) && (defined(CONFIG_ADS8272) || defined(CONFIG_PQ2FADS)) + /* Initialize stuff for the 82xx CPLD IC and install demux */ + pq2pci_init_irq(); +#endif + } /*
arch/ppc/syslib/m82xx_pci.c (mode:100644 sha1:0e56792a88b73ee42b3496caeaaf94015baaa752) renamed from dev/null (tree:eed337ef5e9ae7d62caa84b7974a11fddc7f06e0) +383 -0
383 lines not on this page · raw message
arch/ppc/syslib/m82xx_pci.h (mode:100644 sha1:0e95bf6a73b0be65ee5dcc36374f4e8870f82c37) renamed from dev/null (tree:eed337ef5e9ae7d62caa84b7974a11fddc7f06e0) +92 -0
92 lines not on this page · raw message
include/asm-ppc/cpm2.h (mode:100644 sha1:c5883dbed63f8bbf84d8d1eeb11d6f77a93a62ac) renamed from include/asm-ppc/cpm2.h (mode:100644 sha1:42fd1068cf2a4100f468f439f69c2da3c0fe5b38) +46 -0
52 lines not on this page · raw message
include/asm-ppc/m8260_pci.h (mode:100644 sha1:bf9e05dd54b5243d256f12c5e5df70f6b5a6c128) renamed from include/asm-ppc/m8260_pci.h (mode:100644 sha1:163a6b91d5b2ffe0c49f9d9814a65a5bc23d0cd0) +1 -0
@@ -19,6 +19,7 @@ * Define the vendor/device ID for the MPC8265. */ #define PCI_DEVICE_ID_MPC8265 ((0x18C0 << 16) | PCI_VENDOR_ID_MOTOROLA) +#define PCI_DEVICE_ID_MPC8272 ((0x18C1 << 16) | PCI_VENDOR_ID_MOTOROLA) #define M8265_PCIBR0 0x101ac #define M8265_PCIBR1 0x101b0
include/asm-ppc/mpc8260.h (mode:100644 sha1:89eb8a2ac6934552eeaf74d5ed222690ed504732) renamed from include/asm-ppc/mpc8260.h (mode:100644 sha1:d820894e59916a4c491b8bdd0312830acec228a9) +1 -1
@@ -41,7 +41,7 @@ #endif #ifdef CONFIG_PCI_8260 -#include <syslib/m8260_pci.h> +#include <syslib/m82xx_pci.h> #endif /* Make sure the memory translation stuff is there if PCI not used.