ppc32: add Freescale MPC885ADS board support

Andrew,

This the second version of the patch
(the first post is
http://lkml.org/lkml/2005/6/10/119).
The new version is based on current linux-2.6.git, and assumes the "add Freescale MPC86xADS boards support" patch I've sent few minutes ago is applied first. Otherwise the patch is the same as the first version.

Please, consider applying.

Thanks,
Andrei

This patch adds the Freescale MPC885ADS board support. The supported devices are two SMC UARTs and 10Mbit ethernet on SCC3.

FEC is not supported as the "combined FCC/FEC ethernet driver" driver by Pantelis Antoniou (fs_enet for short) should replace the current FEC driver.

On MPC885ADS SCC ethernet PHY defaults to the full duplex mode upon reset. SCC is set to half duplex by default. This inconsistency is not handled by this patch for the following reasons:
- ethernet works anyway (the statistics should look terrible though)
- work on a patch to add SCC ehternet support to the fs_enet driver is in progress, and we will address this full/half duplex issue when moving the board to the new ethernet driver and platform devices.

---
commit 87e579447db1de3f27411886a562348bf739369f
tree 5c8688a941002f3ade061cb874d05ffbf595d572
parent 7ce52a8ad573a67ddfc089399df2001ae7e3a979
author Andrei Konovalov <ank@ank.(none)> Thu, 23 Jun 2005 18:08:52 +0400 committer Andrei Konovalov <ank@ank.(none)> Thu, 23 Jun 2005 18:08:52 +0400

 arch/ppc/8xx_io/enet.c                  |   42 ++
 arch/ppc/Kconfig                        |    8 
 arch/ppc/configs/mpc885ads_defconfig    |  622 +++++++++++++++++++++++++++++++
 arch/ppc/platforms/mpc885ads.h          |   92 +++++
 arch/ppc/syslib/m8xx_setup.c            |    2 
 drivers/serial/cpm_uart/cpm_uart_cpm1.c |   18 +
 include/asm-ppc/mpc8xx.h                |    4 
 7 files changed, 778 insertions(+), 10 deletions(-)

@@ -714,16 +714,24 @@ static int __init scc_enet_init(void)
 	immap->im_ioport.iop_pcdat &= ~PC_ENET_LBK;	/* Disable Loopback */
 #endif	/* PC_ENET_LBK */
 
-	/* Configure port C pins to enable CLSN and RENA.
+#ifdef PE_ENET_TCLK
+	/* Configure port E for TCLK and RCLK.
 	*/
-	immap->im_ioport.iop_pcpar &= ~(PC_ENET_CLSN | PC_ENET_RENA);
-	immap->im_ioport.iop_pcdir &= ~(PC_ENET_CLSN | PC_ENET_RENA);
-	immap->im_ioport.iop_pcso  |=  (PC_ENET_CLSN | PC_ENET_RENA);
-
+	cp->cp_pepar |=  (PE_ENET_TCLK | PE_ENET_RCLK);
+	cp->cp_pedir &= ~(PE_ENET_TCLK | PE_ENET_RCLK);
+	cp->cp_peso  &= ~(PE_ENET_TCLK | PE_ENET_RCLK);
+#else
 	/* Configure port A for TCLK and RCLK.
 	*/
 	immap->im_ioport.iop_papar |=  (PA_ENET_TCLK | PA_ENET_RCLK);
 	immap->im_ioport.iop_padir &= ~(PA_ENET_TCLK | PA_ENET_RCLK);
+#endif
+
+	/* Configure port C pins to enable CLSN and RENA.
+	*/
+	immap->im_ioport.iop_pcpar &= ~(PC_ENET_CLSN | PC_ENET_RENA);
+	immap->im_ioport.iop_pcdir &= ~(PC_ENET_CLSN | PC_ENET_RENA);
+	immap->im_ioport.iop_pcso  |=  (PC_ENET_CLSN | PC_ENET_RENA);
 
 	/* Configure Serial Interface clock routing.
 	 * First, clear all SCC bits to zero, then set the ones we want.

@@ -896,14 +904,18 @@ static int __init scc_enet_init(void)
 	/* It is now OK to enable the Ethernet transmitter.
 	 * Unfortunately, there are board implementation differences here.
 	 */
-#if   (!defined (PB_ENET_TENA) &&  defined (PC_ENET_TENA))
+#if   (!defined (PB_ENET_TENA) &&  defined (PC_ENET_TENA) && !defined (PE_ENET_TENA))
 	immap->im_ioport.iop_pcpar |=  PC_ENET_TENA;
 	immap->im_ioport.iop_pcdir &= ~PC_ENET_TENA;
-#elif ( defined (PB_ENET_TENA) && !defined (PC_ENET_TENA))
+#elif ( defined (PB_ENET_TENA) && !defined (PC_ENET_TENA) && !defined (PE_ENET_TENA))
 	cp->cp_pbpar |= PB_ENET_TENA;
 	cp->cp_pbdir |= PB_ENET_TENA;
+#elif ( !defined (PB_ENET_TENA) && !defined (PC_ENET_TENA) && defined (PE_ENET_TENA))
+	cp->cp_pepar |=  PE_ENET_TENA;
+	cp->cp_pedir &= ~PE_ENET_TENA;
+	cp->cp_peso  |=  PE_ENET_TENA;
 #else
-#error Configuration Error: define exactly ONE of PB_ENET_TENA, PC_ENET_TENA
+#error Configuration Error: define exactly ONE of PB_ENET_TENA, PC_ENET_TENA, PE_ENET_TENA
 #endif
 
 #if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)

@@ -956,6 +968,19 @@ static int __init scc_enet_init(void)
 		return err;
 	}
 
+#ifdef CONFIG_MPC885ADS
+
+	/* Deassert PHY reset and enable the PHY.
+	 */
+	*((volatile uint *)BCSR4) |= BCSR4_ETH10_RST;
+	*((volatile uint *)BCSR1) |= BCSR1_ETHEN;
+
+	/* On MPC885ADS SCC ethernet PHY defaults to the full duplex mode
+	 * upon reset. SCC is set to half duplex by default. So this
+	 * inconsistency should be better fixed by the software.
+	 */
+#endif
+
 	/* And last, enable the transmit and receive processing.
 	*/
 	sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);

@@ -969,3 +994,4 @@ static int __init scc_enet_init(void)
 }
 
 module_init(scc_enet_init);
+

@@ -391,6 +391,14 @@ config MPC86XADS
 	  development around the MPC86X processor families.
 	select FADS
 
+config MPC885ADS
+	bool "MPC885ADS"
+	help
+	  Freescale Semiconductor MPC885 Application Development System (ADS).
+	  Also known as DUET.
+	  The MPC885ADS is meant to serve as a platform for s/w and h/w
+	  development around the MPC885 processor family.
+
 config TQM823L
 	bool "TQM823L"
 	help

@@ -369,7 +369,7 @@ m8xx_map_io(void)
 #if defined(CONFIG_HTDMSOUND) || defined(CONFIG_RPXTOUCH) || defined(CONFIG_FB_RPX)
 	io_block_mapping(HIOX_CSR_ADDR, HIOX_CSR_ADDR, HIOX_CSR_SIZE, _PAGE_IO);
 #endif
-#ifdef CONFIG_FADS
+#if defined(CONFIG_FADS) || defined(CONFIG_MPC885ADS)
 	io_block_mapping(BCSR_ADDR, BCSR_ADDR, BCSR_SIZE, _PAGE_IO);
 #endif
 #ifdef CONFIG_PCI

@@ -94,12 +94,28 @@ void smc1_lineif(struct uart_cpm_port *p
 		((immap_t *)IMAP_ADDR)->im_ioport.iop_paodr &= ~iobits;
 	}
 
+#ifdef CONFIG_MPC885ADS
+	/* Enable SMC1 transceivers */
+	*((volatile uint *)BCSR1) &= ~BCSR1_RS232EN_1;
+#endif
+
 	pinfo->brg = 1;
 }
 
 void smc2_lineif(struct uart_cpm_port *pinfo)
 {
-	/* XXX SMC2: insert port configuration here */
+#ifdef CONFIG_MPC885ADS
+	volatile cpm8xx_t *cp = cpmp;
+
+	cp->cp_pepar |= 0x00000c00;
+	cp->cp_pedir &= 0x00000c00;
+	cp->cp_peso &= ~0x00000400;
+	cp->cp_peso |= 0x00000800;
+
+	/* Enable SMC2 transceivers */
+	*((volatile uint *)BCSR1) &= ~BCSR1_RS232EN_2;
+#endif
+
 	pinfo->brg = 2;
 }
 

@@ -68,6 +68,10 @@
 #include <platforms/lantec.h>
 #endif
 
+#if defined(CONFIG_MPC885ADS)
+#include <platforms/mpc885ads.h>
+#endif
+
 /* Currently, all 8xx boards that support a processor to PCI/ISA bridge
  * use the same memory map.
  */

Hi Andrei,

On Thu, Jun 23, 2005 at 07:38:54PM +0400, Andrei Konovalov wrote:
<snip>

I think it'd be great if we _stop_ adding new io_block_mapping users, there is ioremap() for stuff like this, let's use it instead.

Eugene

(go back after reading previous discussion)

For that you need ioremap() to handle BATs and CAMs right? What would be the difficulties with doing that?

For 8xx (which lacks BAT's and CAM's) we could try immediately I suppose.

Seems to be BenH's plan, along with making the virtual addresses dynamic and not static.

While at it, what are the possibilities of making BAT's and/or CAM's available to userspace through hugetlbfs or some other mechanism?

Why? BATs or CAMs are just an optimization. You can use ordinary 4K ptes.

We don't have BATs on 44x and don't use io_block_mapping also. It's not that difficult - just start using ioremap() instead of io_block_mapping() and fix code which assumes phys_addr == virt_addr.

Eugene

Hi Marcelo,

No, not at the moment at least.
Actually, the patch doesn't even #define IO_BASE.
In 2.4 that io_block_mapping(IO_BASE) was needed for PCMCIA / CF cards to work. We haven't got to PCMCIA support in 2.6 yet, and PCMCIA is unlikely to work as is in case of MPC885ADS, as drivers/pcmcia/m8xx_pcmcia.c is just missing. We plan to address PCMCIA later.

Thanks,
Andrei

Lets just drop that hunk then..

Tom Rini
http://gate.crashing.org/~trini/

Do you mean not to use
io_block_mapping(BCSR_ADDR, BCSR_ADDR, BCSR_SIZE, _PAGE_IO);
?

Thanks,
Andrei

[snip]

So I had myself slightly confused as first, but yes, what Eugene said at first is right, as shouldn't add more io_block_mappings, we should use ioremap() and fix drivers.

Tom Rini
http://gate.crashing.org/~trini/

The hunk is removed, ioremap's added to the drivers. Additionally, a misprint in cpm_uart_cpm1.c is fixed:
- cp->cp_pedir &= 0x00000c00;
+ cp->cp_pedir &= ~0x00000c00;

The MPC885ADS patch expects the MPC86xADS patch to be applied first. The updated to the latest git MPC86xADS patch is attached as well just in case (no changes except those to account for arch/ppc/Kconfig modification since the previous patch dated June 23).

Andrew,
If none objects please consider applying the patches.

Thanks,
Andrei

This patch adds the Freescale MPC86xADS board support. The supported devices are SMC UART and 10Mbit ethernet on SCC1.

The manual for the board says that it "is compatible with the MPC8xxFADS for software point of view". That's why this patch extends FADS instead of introducing a new platform.

FEC is not supported as the "combined FCC/FEC ethernet driver" driver by Pantelis Antoniou should replace the current FEC driver.

---
commit b2c81b479c854b798cb60298c664b3fcf6818f03
tree 154b2ebf98af9fd24a8f6b0ef1eb4beb79871d26
parent 4c91aedb75d1b87deccf16d58f67fb46402d7d44
author Andrei Konovalov <ank@ank.(none)> Wed, 29 Jun 2005 12:23:09 +0400 committer Andrei Konovalov <ank@ank.(none)> Wed, 29 Jun 2005 12:23:09 +0400

 arch/ppc/Kconfig                      |   14 +
 arch/ppc/configs/mpc86x_ads_defconfig |  633 +++++++++++++++++++++++++++++++++
 arch/ppc/platforms/fads.h             |  109 +++++-
 3 files changed, 749 insertions(+), 7 deletions(-)

@@ -284,6 +284,9 @@ endmenu
 
 menu "Platform options"
 
+config FADS
+	bool
+
 choice
 	prompt "8xx Machine Type"
 	depends on 8xx

@@ -399,8 +402,17 @@ config BSEIP
 	  26MB DRAM, 4MB flash, Ethernet, a 16K-gate FPGA, USB, an LCD/video
 	  controller, and two RS232 ports.
 
-config FADS
+config MPC8XXFADS
 	bool "FADS"
+	select FADS
+
+config MPC86XADS
+	bool "MPC86XADS"
+	help
+	  MPC86x Application Development System by Freescale Semiconductor.
+	  The MPC86xADS is meant to serve as a platform for s/w and h/w
+	  development around the MPC86X processor families.
+	select FADS
 
 config TQM823L
 	bool "TQM823L"

This patch adds the Freescale MPC885ADS board support. The supported devices are two SMC UARTs and 10Mbit ethernet on SCC3.

FEC is not supported as the "combined FCC/FEC ethernet driver" driver by Pantelis Antoniou (fs_enet for short) should replace the current FEC driver.

On MPC885ADS SCC ethernet PHY defaults to the full duplex mode upon reset. SCC is set to half duplex by default. This inconsistency is not handled by this patch for the following reasons:
- ethernet works anyway (the statistics should look terrible though)
- work on a patch to add SCC ehternet support to the fs_enet driver is in progress, and we will address this full/half duplex issue when moving the board to the new ethernet driver and platform devices.

---
commit bae846206a4e560b962446864f9d1756992d58dd
tree 9706019c088037e3d63e5f1beac30353e4080ab7
parent b2c81b479c854b798cb60298c664b3fcf6818f03
author Andrei Konovalov <ank@ank.(none)> Wed, 29 Jun 2005 12:28:13 +0400 committer Andrei Konovalov <ank@ank.(none)> Wed, 29 Jun 2005 12:28:13 +0400

 arch/ppc/8xx_io/enet.c                  |   52 ++-
 arch/ppc/Kconfig                        |    8 
 arch/ppc/configs/mpc885ads_defconfig    |  622 +++++++++++++++++++++++++++++++
 arch/ppc/platforms/mpc885ads.h          |   92 +++++
 drivers/serial/cpm_uart/cpm_uart_cpm1.c |   32 ++
 include/asm-ppc/mpc8xx.h                |    4 
 6 files changed, 801 insertions(+), 9 deletions(-)

@@ -414,6 +414,14 @@ config MPC86XADS
 	  development around the MPC86X processor families.
 	select FADS
 
+config MPC885ADS
+	bool "MPC885ADS"
+	help
+	  Freescale Semiconductor MPC885 Application Development System (ADS).
+	  Also known as DUET.
+	  The MPC885ADS is meant to serve as a platform for s/w and h/w
+	  development around the MPC885 processor family.
+
 config TQM823L
 	bool "TQM823L"
 	help

@@ -94,12 +94,42 @@ void smc1_lineif(struct uart_cpm_port *p
 		((immap_t *)IMAP_ADDR)->im_ioport.iop_paodr &= ~iobits;
 	}
 
+#ifdef CONFIG_MPC885ADS
+	/* Enable SMC1 transceivers */
+	{
+		volatile uint __iomem *bcsr1 = ioremap(BCSR1, 4);
+		uint tmp;
+
+		tmp = in_be32(bcsr1);
+		tmp &= ~BCSR1_RS232EN_1;
+		out_be32(bcsr1, tmp);
+		iounmap(bcsr1);
+	}
+#endif
+
 	pinfo->brg = 1;
 }
 
 void smc2_lineif(struct uart_cpm_port *pinfo)
 {
-	/* XXX SMC2: insert port configuration here */
+#ifdef CONFIG_MPC885ADS
+	volatile cpm8xx_t *cp = cpmp;
+	volatile uint __iomem *bcsr1;
+	uint tmp;
+
+	cp->cp_pepar |= 0x00000c00;
+	cp->cp_pedir &= ~0x00000c00;
+	cp->cp_peso &= ~0x00000400;
+	cp->cp_peso |= 0x00000800;
+
+	/* Enable SMC2 transceivers */
+	bcsr1 = ioremap(BCSR1, 4);
+	tmp = in_be32(bcsr1);
+	tmp &= ~BCSR1_RS232EN_2;
+	out_be32(bcsr1, tmp);
+	iounmap(bcsr1);
+#endif
+
 	pinfo->brg = 2;
 }
 

@@ -68,6 +68,10 @@
 #include <platforms/lantec.h>
 #endif
 
+#if defined(CONFIG_MPC885ADS)
+#include <platforms/mpc885ads.h>
+#endif
+
 /* Currently, all 8xx boards that support a processor to PCI/ISA bridge
  * use the same memory map.
  */