Support AMCC Yosemite 440EP and Yellowstone 440GR (v2)
PATCH 1/3 Support AMCC Yosemite 440EP and Yellowstone 440GR (v2)
This updated patch adds support for AMCC 440EP Yosemite and 440GR Yellowstone evaluation boards. I tested it against the 2.6.13 kernel on both boards.
Note: the 440EP and 440GR share the same PVR of 422218D3.
The Yosemite platform files are based on Wade Farnsworth's Bamboo code. There is only a single board name macro that depends on CONFIG_YOSEMITE vs CONFIG_YELLOWSTONE so I didn't create an otherwise identical yellowstone.c/h.
The defconfig files are in parts 2 and 3.
This patch supersedes "Support for AMCC Yosemite 440EP Eval Board" from Jul 27: http://patchwork.ozlabs.org/linuxppc/patch?id=1859
Dependencies
------------
Jul20 J Otken Fix invalid function name usb_hcd_put in ohci-ppc-soc.c Aug10 D Farnsworth 2.6.12-3 header <asm/usb.h> missing? Aug17 J Otken Support 440EP On-Chip OHCI USB Host Controller (v3) Aug31 E Surovegin Move 4xx PHY_MODE_XXX defines to ibm_ocp.h
Links
-----
http://patchwork.ozlabs.org/linuxppc/patch?id=1803
http://patchwork.ozlabs.org/linuxppc/patch?id=1969
http://patchwork.ozlabs.org/linuxppc/patch?id=2027
http://patchwork.ozlabs.org/linuxppc/patch?id=2202
Comments are welcome.
arch/ppc/kernel/head_44x.S +2 -2
@@ -190,7 +190,7 @@ skpinv: addi r4,r4,1 /* Increment */ /* xlat fields */ lis r4,UART0_PHYS_IO_BASE@h /* RPN depends on SoC */ -#ifndef CONFIG_440EP +#if !defined(CONFIG_440EP) && !defined(CONFIG_440GR) ori r4,r4,0x0001 /* ERPN is 1 for second 4GB page */ #endif
@@ -230,7 +230,7 @@ skpinv: addi r4,r4,1 /* Increment */ lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */ mtspr SPRN_IVPR,r4 -#ifdef CONFIG_440EP +#if defined(CONFIG_440EP) || defined(CONFIG_440GR) /* Clear DAPUIB flag in CCR0 (enable APU between CPU and FPU) */ mfspr r2,SPRN_CCR0 lis r3,0xffef
arch/ppc/platforms/4xx/Kconfig +27 -4
@@ -98,6 +98,18 @@ config OCOTEA help This option enables support for the IBM PPC440GX evaluation board. +config YELLOWSTONE + bool "Yellowstone" + select WANT_EARLY_SERIAL + help + This option enables support for the AMCC PPC440GR evaluation board. + +config YOSEMITE + bool "Yosemite" + select WANT_EARLY_SERIAL + help + This option enables support for the AMCC PPC440EP evaluation board. + endchoice config EP405PC
@@ -115,7 +127,7 @@ config NP405H config 440EP bool - depends on BAMBOO + depends on BAMBOO || YOSEMITE select PPC_FPU default y
@@ -124,6 +136,12 @@ config 440GP depends on EBONY default y +config 440GR + bool + depends on YELLOWSTONE + select PPC_FPU + default y + config 440GX bool depends on OCOTEA
@@ -136,7 +154,7 @@ config 440SP config 440 bool - depends on 440GP || 440SP || 440EP + depends on 440GP || 440SP || 440EP || 440GR default y config 440A
@@ -144,9 +162,14 @@ config 440A depends on 440GX default y +config 440_FPU + bool + depends on 440EP && !440GR + default y + config IBM440EP_ERR42 bool - depends on 440EP + depends on 440EP || 440GR default y # All 405-based cores up until the 405GPR and 405EP have this errata.
@@ -168,7 +191,7 @@ config BOOKE config IBM_OCP bool - depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT + depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT || YELLOWSTONE || YOSEMITE default y config XILINX_OCP
arch/ppc/platforms/4xx/Makefile +3 -0
@@ -15,12 +15,15 @@ obj-$(CONFIG_REDWOOD_6) += redwood6.o obj-$(CONFIG_SYCAMORE) += sycamore.o obj-$(CONFIG_WALNUT) += walnut.o obj-$(CONFIG_XILINX_ML300) += xilinx_ml300.o +obj-$(CONFIG_YELLOWSTONE) += yosemite.o +obj-$(CONFIG_YOSEMITE) += yosemite.o obj-$(CONFIG_405GP) += ibm405gp.o obj-$(CONFIG_REDWOOD_5) += ibmstb4.o obj-$(CONFIG_NP405H) += ibmnp405h.o obj-$(CONFIG_REDWOOD_6) += ibmstbx25.o obj-$(CONFIG_440EP) += ibm440ep.o +obj-$(CONFIG_440GR) += ibm440ep.o obj-$(CONFIG_440GP) += ibm440gp.o obj-$(CONFIG_440GX) += ibm440gx.o obj-$(CONFIG_440SP) += ibm440sp.o
arch/ppc/platforms/4xx/yosemite.c +377 -0
377 lines not on this page · raw message
arch/ppc/platforms/4xx/yosemite.h +85 -0
85 lines not on this page · raw message
arch/ppc/syslib/ibm440gx_common.c +2 -2
@@ -34,7 +34,7 @@ void __init ibm440gx_get_clocks(struct iu32 plld =CPR_READ (DCRN_CPR_PLLD );u32 uart0 =SDR_READ (DCRN_SDR_UART0 );u32 uart1 =SDR_READ (DCRN_SDR_UART1 ); -#ifdef CONFIG_440EP +#if defined(CONFIG_440EP ) || defined(CONFIG_440GR )u32 uart2 =SDR_READ (DCRN_SDR_UART2 );u32 uart3 =SDR_READ (DCRN_SDR_UART3 );#endif
@@ -100,7 +100,7 @@ bypass: p->uart1 = ser_clk; else p->uart1 = p->plb / __fix_zero(uart1 & 0xff, 256); -#ifdef CONFIG_440EP +#if defined(CONFIG_440EP ) || defined(CONFIG_440GR )if (uart2 &0x00800000 ) p->uart2 = ser_clk;else
arch/ppc/syslib/ibm44x_common.h +1 -1
@@ -29,7 +29,7 @@ struct ibm44x_clocks {unsigned int ebc;/* PerClk */ unsigned int uart0;unsigned int uart1; -#ifdef CONFIG_440EP +#if defined(CONFIG_440EP ) || defined(CONFIG_440GR )unsigned int uart2;unsigned int uart3;#endif
arch/ppc/syslib/Makefile +3 -0
@@ -12,6 +12,7 @@ obj-$(CONFIG_PPC_OCP) += ocp.o obj-$(CONFIG_IBM_OCP) += ibm_ocp.o obj-$(CONFIG_44x) += ibm44x_common.o obj-$(CONFIG_440EP) += ibm440gx_common.o +obj-$(CONFIG_440GR) += ibm440gx_common.o obj-$(CONFIG_440GP) += ibm440gp_common.o obj-$(CONFIG_440GX) += ibm440gx_common.o obj-$(CONFIG_440SP) += ibm440gx_common.o ibm440sp_common.o
@@ -82,6 +83,8 @@ obj-$(CONFIG_SANDPOINT) += i8259.o pci_ obj-$(CONFIG_SBC82xx) += todc_time.o obj-$(CONFIG_SPRUCE) += cpc700_pic.o indirect_pci.o pci_auto.o \ todc_time.o +obj-$(CONFIG_YELLOWSTONE) += indirect_pci.o pci_auto.o +obj-$(CONFIG_YOSEMITE) += indirect_pci.o pci_auto.o obj-$(CONFIG_8260) += m8260_setup.o obj-$(CONFIG_PCI_8260) += m82xx_pci.o indirect_pci.o pci_auto.o obj-$(CONFIG_8260_PCI9) += m8260_pci_erratum9.o
include/asm-ppc/ibm44x.h +5 -5
@@ -37,7 +37,7 @@/* LS 32-bits of UART0 physical address location for early serial text debug */ #if defined(CONFIG_440SP )#define UART0_PHYS_IO_BASE 0xf0000200 -#elif defined(CONFIG_440EP ) +#elif defined(CONFIG_440EP ) || defined(CONFIG_440GR )#define UART0_PHYS_IO_BASE 0xe0000000#else #define UART0_PHYS_IO_BASE 0x40000200
@@ -56,7 +56,7 @@#define PPC44x_PCICFG_PAGE 0x0000000900000000ULL#define PPC44x_PCIIO_PAGE PPC44x_PCICFG_PAGE#define PPC44x_PCIMEM_PAGE 0x0000000a00000000ULL -#elif defined(CONFIG_440EP ) +#elif defined(CONFIG_440EP ) || defined(CONFIG_440GR )#define PPC44x_IO_PAGE 0x0000000000000000ULL#define PPC44x_PCICFG_PAGE 0x0000000000000000ULL#define PPC44x_PCIIO_PAGE PPC44x_PCICFG_PAGE
@@ -82,7 +82,7 @@#define PPC44x_PCI2CFG_HI 0x2ec00007UL#define PPC44x_PCIMEM_LO 0x80000000UL#define PPC44x_PCIMEM_HI 0xdfffffffUL -#elif defined(CONFIG_440EP ) +#elif defined(CONFIG_440EP ) || defined(CONFIG_440GR )#define PPC44x_IO_LO 0xef500000UL#define PPC44x_IO_HI 0xefffffffUL#define PPC44x_PCI0CFG_LO 0xeec00000UL
@@ -166,7 +166,7 @@#define DCRN_SDR_UART0 0x0120#define DCRN_SDR_UART1 0x0121 -#ifdef CONFIG_440EP +#if defined(CONFIG_440EP ) || defined(CONFIG_440GR )#define DCRN_SDR_UART2 0x0122#define DCRN_SDR_UART3 0x0123#define DCRN_SDR_CUST0 0x4000
@@ -189,7 +189,7 @@#define DCRNCAP_DMA_SG 1/* have DMA scatter/gather capability */ #define DCRN_MAL_BASE 0x180 -#ifdef CONFIG_440EP +#if defined(CONFIG_440EP ) || defined(CONFIG_440GR )#define DCRN_DMA2P40_BASE 0x300#define DCRN_DMA2P41_BASE 0x308#define DCRN_DMA2P42_BASE 0x310
include/asm-ppc/ibm4xx.h +4 -0
@@ -113,6 +113,10 @@ void ppc4xx_init(unsigned long r3, unsig#include <platforms/4xx/ocotea.h> #endif +#if defined(CONFIG_YELLOWSTONE ) || defined(CONFIG_YOSEMITE ) +#include <platforms/4xx/yosemite.h> +#endif +#ifndef __ASSEMBLY__#ifdef CONFIG_40x/*