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Rename RK1108 to RV1108

PATCH New Heiko Stuebner 2 participants 13 messages Mar 17, 2017 – May 14, 2017

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Heiko Stuebner

author maintainer
#0 lore raw

v2 cover Rename RK1108 to RV1108

The former rk1108 got a new name: rv1108. It is still early for its development and there are no devices in the wild, except the internal evaluation board. So we're somewhat safe in reanming things now, before things spread to much.

My basic idea for merging is the individual changes (pinctrl, clk) going through the respective maintainer trees and I've added necessary dts glue, so that it doesn't break bisectability or fail to compile even though the internal board wouldn't care.
After the pieces are in mainline (after 4.12-rc1?) we can then just do the dts renames.

changes in v2:
- drop mmc binding patch, which got applied
- rebased pinctrl patches onto pinctrl tree
- adapted patches, so that they don't break when applied individually
- fixed recipients (mturquette)

Andy Yan (6):
dt-bindings: rockchip,pinctrl: rename RK1108 to RV1108
pinctrl: rockchip: rename RK1108 to RV1108
dt-bindings: rk1108-cru: rename RK1108 to RV1108
clk: rockchip: rename RK1108 to RV1108
ARM: dts: rockchip: rename core dtsi from RK1108 to RV1108
ARM: dts: rockchip: rename RK1108-evb to RV1108-evb

 Documentation/devicetree/bindings/arm/rockchip.txt |   4 +-
 ...chip,rk1108-cru.txt => rockchip,rv1108-cru.txt} |  12 +-
 .../bindings/pinctrl/rockchip,pinctrl.txt          |  17 +-
 arch/arm/boot/dts/Makefile                         |   2 +-
 .../boot/dts/{rk1108-evb.dts => rv1108-evb.dts}    |   6 +-
 arch/arm/boot/dts/{rk1108.dtsi => rv1108.dtsi}     |  24 +-
 drivers/clk/rockchip/Makefile                      |   2 +-
 .../clk/rockchip/{clk-rk1108.c => clk-rv1108.c}    | 414 ++++++++++-----------
 drivers/clk/rockchip/clk.h                         |  28 +-
 drivers/pinctrl/pinctrl-rockchip.c                 |  76 ++--
 .../clock/{rk1108-cru.h => rv1108-cru.h}           |   6 +-
 11 files changed, 299 insertions(+), 292 deletions(-)
 rename Documentation/devicetree/bindings/clock/{rockchip,rk1108-cru.txt => rockchip,rv1108-cru.txt} (83%)
 rename arch/arm/boot/dts/{rk1108-evb.dts => rv1108-evb.dts} (94%)
 rename arch/arm/boot/dts/{rk1108.dtsi => rv1108.dtsi} (94%)
 rename drivers/clk/rockchip/{clk-rk1108.c => clk-rv1108.c} (57%)
 rename include/dt-bindings/clock/{rk1108-cru.h => rv1108-cru.h} (97%)
Signature · 1 line
2.11.0
author maintainer
#1 lore raw

PATCH v2 1/6 dt-bindings: rockchip, pinctrl: rename RK1108 to RV1108

From: Andy Yan <[email protected]>

Rockchip finally named the SOC as RV1108, so change it. Also move the compatible list to one compatible per line.

---
 .../devicetree/bindings/pinctrl/rockchip,pinctrl.txt    | 17 ++++++++++++-----
 1 file changed, 12 insertions(+), 5 deletions(-)
Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt +12 -5
index 403b5a272f56..ee01ab58224d 100644
@@ -19,11 +19,18 @@ The pins are grouped into up to 5 individual pin banks which need to be
 defined as gpio sub-nodes of the pinmux controller.
 
 Required properties for iomux controller:
-  - compatible: one of "rockchip,rk1108-pinctrl", "rockchip,rk2928-pinctrl"
-		       "rockchip,rk3066a-pinctrl", "rockchip,rk3066b-pinctrl"
-		       "rockchip,rk3188-pinctrl", "rockchip,rk3228-pinctrl"
-		       "rockchip,rk3288-pinctrl", "rockchip,rk3328-pinctrl"
-		       "rockchip,rk3368-pinctrl", "rockchip,rk3399-pinctrl"
+  - compatible: should be
+		"rockchip,rv1108-pinctrl":  for Rockchip RV1108
+		"rockchip,rk2928-pinctrl":  for Rockchip RK2928
+		"rockchip,rk3066a-pinctrl": for Rockchip RK3066a
+		"rockchip,rk3066b-pinctrl": for Rockchip RK3066b
+		"rockchip,rk3188-pinctrl":  for Rockchip RK3188
+		"rockchip,rk3228-pinctrl":  for Rockchip RK3228
+		"rockchip,rk3288-pinctrl":  for Rockchip RK3288
+		"rockchip,rk3328-pinctrl":  for Rockchip RK3328
+		"rockchip,rk3368-pinctrl":  for Rockchip RK3368
+		"rockchip,rk3399-pinctrl":  for Rockchip RK3399
+
   - rockchip,grf: phandle referencing a syscon providing the
 	 "general register files"
 
Signature · 1 line
2.11.0
author maintainer
#3 lore raw

PATCH v2 2/6 pinctrl: rockchip: rename RK1108 to RV1108

In reply to Heiko Stuebner

From: Andy Yan <[email protected]>

Rockchip finally named the SOC as RV1108, so change it.

[adapted rk1108 dtsi to keep bisectability]
---
 arch/arm/boot/dts/rk1108.dtsi      |  2 +-
 drivers/pinctrl/pinctrl-rockchip.c | 76 +++++++++++++++++++-------------------
 2 files changed, 39 insertions(+), 39 deletions(-)
arch/arm/boot/dts/rk1108.dtsi +1 -1
index d6194bff7afe..6c8fc19d0ecd 100644
@@ -222,7 +222,7 @@
 	};
 
 	pinctrl: pinctrl {
-		compatible = "rockchip,rk1108-pinctrl";
+		compatible = "rockchip,rv1108-pinctrl";
 		rockchip,grf = <&grf>;
 		rockchip,pmu = <&pmugrf>;
 		#address-cells = <1>;
drivers/pinctrl/pinctrl-rockchip.c +38 -38

155 lines not on this page · raw message

Signature · 1 line
2.11.0
author maintainer
#5 lore raw

PATCH v2 3/6 dt-bindings: rk1108-cru: rename RK1108 to RV1108

In reply to Heiko Stuebner

From: Andy Yan <[email protected]>

Rockchip finally named the SOC as RV1108, so change it.

---
 .../{rockchip,rk1108-cru.txt => rockchip,rv1108-cru.txt}     | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)
 rename Documentation/devicetree/bindings/clock/{rockchip,rk1108-cru.txt => rockchip,rv1108-cru.txt} (83%)
Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.txt renamed from Documentation/devicetree/bindings/clock/rockchip,rk1108-cru.txt +6 -6
similarity index 83%
rename from Documentation/devicetree/bindings/clock/rockchip,rk1108-cru.txt
rename to Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.txt
index 4da126116cf0..161326a4f9c1 100644
@@ -1,12 +1,12 @@
-* Rockchip RK1108 Clock and Reset Unit
+* Rockchip RV1108 Clock and Reset Unit
 
-The RK1108 clock controller generates and supplies clock to various
+The RV1108 clock controller generates and supplies clock to various
 controllers within the SoC and also implements a reset controller for SoC
 peripherals.
 
 Required Properties:
 
-- compatible: should be "rockchip,rk1108-cru"
+- compatible: should be "rockchip,rv1108-cru"
 - reg: physical base address of the controller and length of memory mapped
   region.
 - #clock-cells: should be 1.
@@ -19,7 +19,7 @@ Optional Properties:
 
 Each clock is assigned an identifier and client nodes can use this identifier
 to specify the clock which they consume. All available clocks are defined as
-preprocessor macros in the dt-bindings/clock/rk1108-cru.h headers and can be
+preprocessor macros in the dt-bindings/clock/rv1108-cru.h headers and can be
 used in device tree sources. Similar macros exist for the reset sources in
 these files.
 
@@ -38,7 +38,7 @@ clock-output-names:
 Example: Clock controller node:
 
 	cru: cru at 20200000 {
-		compatible = "rockchip,rk1108-cru";
+		compatible = "rockchip,rv1108-cru";
 		reg = <0x20200000 0x1000>;
 		rockchip,grf = <&grf>;
 
@@ -50,7 +50,7 @@ Example: UART controller node that consumes the clock generated by the clock
   controller:
 
 	uart0: serial at 10230000 {
-		compatible = "rockchip,rk1108-uart", "snps,dw-apb-uart";
+		compatible = "rockchip,rv1108-uart", "snps,dw-apb-uart";
 		reg = <0x10230000 0x100>;
 		interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
 		reg-shift = <2>;
Signature · 1 line
2.11.0
author maintainer
#7 lore raw

PATCH v2 4/6 clk: rockchip: rename RK1108 to RV1108

In reply to Heiko Stuebner

From: Andy Yan <[email protected]>

Rockchip finally named the SOC as RV1108, so change it.

[include rename in rk1108.dtsi to prevent compile errors]
---
 arch/arm/boot/dts/rk1108.dtsi                      |   2 +-
 drivers/clk/rockchip/Makefile                      |   2 +-
 .../clk/rockchip/{clk-rk1108.c => clk-rv1108.c}    | 414 ++++++++++-----------
 drivers/clk/rockchip/clk.h                         |  28 +-
 .../clock/{rk1108-cru.h => rv1108-cru.h}           |   6 +-
 5 files changed, 226 insertions(+), 226 deletions(-)
 rename drivers/clk/rockchip/{clk-rk1108.c => clk-rv1108.c} (57%)
 rename include/dt-bindings/clock/{rk1108-cru.h => rv1108-cru.h} (97%)
arch/arm/boot/dts/rk1108.dtsi +1 -1
index 6c8fc19d0ecd..1297924db6ad 100644
@@ -41,7 +41,7 @@
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/clock/rk1108-cru.h>
+#include <dt-bindings/clock/rv1108-cru.h>
 #include <dt-bindings/pinctrl/rockchip.h>
 / {
 	#address-cells = <1>;
drivers/clk/rockchip/Makefile +1 -1
index 141971488f40..26b220c988b2 100644
@@ -12,7 +12,7 @@ obj-y	+= clk-muxgrf.o
 obj-y	+= clk-ddr.o
 obj-$(CONFIG_RESET_CONTROLLER)	+= softrst.o
 
-obj-y	+= clk-rk1108.o
+obj-y	+= clk-rv1108.o
 obj-y	+= clk-rk3036.o
 obj-y	+= clk-rk3188.o
 obj-y	+= clk-rk3228.o
drivers/clk/rockchip/clk-rv1108.c renamed from drivers/clk/rockchip/clk-rk1108.c +207 -207

639 lines not on this page · raw message

drivers/clk/rockchip/clk.h +14 -14
index 7c15473ea72b..ef601dded32c 100644
@@ -34,20 +34,20 @@ struct clk;
 #define HIWORD_UPDATE(val, mask, shift) \
 		((val) << (shift) | (mask) << ((shift) + 16))
 
-/* register positions shared by RK1108, RK2928, RK3036, RK3066, RK3188 and RK3228 */
-#define RK1108_PLL_CON(x)		((x) * 0x4)
-#define RK1108_CLKSEL_CON(x)		((x) * 0x4 + 0x60)
-#define RK1108_CLKGATE_CON(x)		((x) * 0x4 + 0x120)
-#define RK1108_SOFTRST_CON(x)		((x) * 0x4 + 0x180)
-#define RK1108_GLB_SRST_FST		0x1c0
-#define RK1108_GLB_SRST_SND		0x1c4
-#define RK1108_MISC_CON			0x1cc
-#define RK1108_SDMMC_CON0		0x1d8
-#define RK1108_SDMMC_CON1		0x1dc
-#define RK1108_SDIO_CON0		0x1e0
-#define RK1108_SDIO_CON1		0x1e4
-#define RK1108_EMMC_CON0		0x1e8
-#define RK1108_EMMC_CON1		0x1ec
+/* register positions shared by RV1108, RK2928, RK3036, RK3066, RK3188 and RK3228 */
+#define RV1108_PLL_CON(x)		((x) * 0x4)
+#define RV1108_CLKSEL_CON(x)		((x) * 0x4 + 0x60)
+#define RV1108_CLKGATE_CON(x)		((x) * 0x4 + 0x120)
+#define RV1108_SOFTRST_CON(x)		((x) * 0x4 + 0x180)
+#define RV1108_GLB_SRST_FST		0x1c0
+#define RV1108_GLB_SRST_SND		0x1c4
+#define RV1108_MISC_CON			0x1cc
+#define RV1108_SDMMC_CON0		0x1d8
+#define RV1108_SDMMC_CON1		0x1dc
+#define RV1108_SDIO_CON0		0x1e0
+#define RV1108_SDIO_CON1		0x1e4
+#define RV1108_EMMC_CON0		0x1e8
+#define RV1108_EMMC_CON1		0x1ec
 
 #define RK2928_PLL_CON(x)		((x) * 0x4)
 #define RK2928_MODE_CON		0x40
include/dt-bindings/clock/rv1108-cru.h renamed from include/dt-bindings/clock/rk1108-cru.h +3 -3
similarity index 97%
rename from include/dt-bindings/clock/rk1108-cru.h
rename to include/dt-bindings/clock/rv1108-cru.h
index 9350a5527a36..ae26f8105914 100644
@@ -13,8 +13,8 @@
  * GNU General Public License for more details.
  */
 
-#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK1108_H
-#define _DT_BINDINGS_CLK_ROCKCHIP_RK1108_H
+#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RV1108_H
+#define _DT_BINDINGS_CLK_ROCKCHIP_RV1108_H
 
 /* pll id */
 #define PLL_APLL			0
@@ -266,4 +266,4 @@
 #define ARST_DSP_EDP_PERF		184
 #define ARST_DSP_EPP_PERF		185
 
-#endif /* _DT_BINDINGS_CLK_ROCKCHIP_RK1108_H */
+#endif /* _DT_BINDINGS_CLK_ROCKCHIP_RV1108_H */
Signature · 1 line
2.11.0
author maintainer
#9 lore raw

PATCH v2 5/6 ARM: dts: rockchip: rename core dtsi from RK1108 to RV1108

In reply to Heiko Stuebner

From: Andy Yan <[email protected]>

Rockchip finally named the SOC as RV1108, so change it for compatible.

[adapt include in rk1108-evb.dts to not introduce errors]
---
 arch/arm/boot/dts/rk1108-evb.dts               |  2 +-
 arch/arm/boot/dts/{rk1108.dtsi => rv1108.dtsi} | 20 ++++++++++----------
 2 files changed, 11 insertions(+), 11 deletions(-)
 rename arch/arm/boot/dts/{rk1108.dtsi => rv1108.dtsi} (95%)
arch/arm/boot/dts/rk1108-evb.dts +1 -1
index 3956cff4ca79..88fe0a8c4faa 100644
@@ -40,7 +40,7 @@
 
 /dts-v1/;
 
-#include "rk1108.dtsi"
+#include "rv1108.dtsi"
 
 / {
 	model = "Rockchip RK1108 Evaluation board";
arch/arm/boot/dts/rv1108.dtsi renamed from arch/arm/boot/dts/rk1108.dtsi +10 -10
similarity index 95%
rename from arch/arm/boot/dts/rk1108.dtsi
rename to arch/arm/boot/dts/rv1108.dtsi
index 1297924db6ad..437098b556eb 100644
@@ -47,7 +47,7 @@
 	#address-cells = <1>;
 	#size-cells = <1>;
 
-	compatible = "rockchip,rk1108";
+	compatible = "rockchip,rv1108";
 
 	interrupt-parent = <&gic>;
 
@@ -113,7 +113,7 @@
 	};
 
 	uart2: serial at 10210000 {
-		compatible = "rockchip,rk1108-uart", "snps,dw-apb-uart";
+		compatible = "rockchip,rv1108-uart", "snps,dw-apb-uart";
 		reg = <0x10210000 0x100>;
 		interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
 		reg-shift = <2>;
@@ -127,7 +127,7 @@
 	};
 
 	uart1: serial at 10220000 {
-		compatible = "rockchip,rk1108-uart", "snps,dw-apb-uart";
+		compatible = "rockchip,rv1108-uart", "snps,dw-apb-uart";
 		reg = <0x10220000 0x100>;
 		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
 		reg-shift = <2>;
@@ -141,7 +141,7 @@
 	};
 
 	uart0: serial at 10230000 {
-		compatible = "rockchip,rk1108-uart", "snps,dw-apb-uart";
+		compatible = "rockchip,rv1108-uart", "snps,dw-apb-uart";
 		reg = <0x10230000 0x100>;
 		interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
 		reg-shift = <2>;
@@ -155,17 +155,17 @@
 	};
 
 	grf: syscon at 10300000 {
-		compatible = "rockchip,rk1108-grf", "syscon";
+		compatible = "rockchip,rv1108-grf", "syscon";
 		reg = <0x10300000 0x1000>;
 	};
 
 	pmugrf: syscon at 20060000 {
-		compatible = "rockchip,rk1108-pmugrf", "syscon";
+		compatible = "rockchip,rv1108-pmugrf", "syscon";
 		reg = <0x20060000 0x1000>;
 	};
 
 	cru: clock-controller at 20200000 {
-		compatible = "rockchip,rk1108-cru";
+		compatible = "rockchip,rv1108-cru";
 		reg = <0x20200000 0x1000>;
 		rockchip,grf = <&grf>;
 		#clock-cells = <1>;
@@ -173,7 +173,7 @@
 	};
 
 	emmc: dwmmc at 30110000 {
-		compatible = "rockchip,rk1108-dw-mshc", "rockchip,rk3288-dw-mshc";
+		compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc";
 		clock-freq-min-max = <400000 150000000>;
 		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
 			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
@@ -185,7 +185,7 @@
 	};
 
 	sdio: dwmmc at 30120000 {
-		compatible = "rockchip,rk1108-dw-mshc", "rockchip,rk3288-dw-mshc";
+		compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc";
 		clock-freq-min-max = <400000 150000000>;
 		clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
 			 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
@@ -197,7 +197,7 @@
 	};
 
 	sdmmc: dwmmc at 30130000 {
-		compatible = "rockchip,rk1108-dw-mshc", "rockchip,rk3288-dw-mshc";
+		compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc";
 		clock-freq-min-max = <400000 100000000>;
 		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
Signature · 1 line
2.11.0
author maintainer
#11 lore raw

PATCH v2 6/6 ARM: dts: rockchip: rename RK1108-evb to RV1108-evb

In reply to Heiko Stuebner

From: Andy Yan <[email protected]>

Rockchip finally named the SOC as RV1108, so change it for compatible.

The rk1108/rv1108 is completely new to the market, so there no real devices exist in the wild, only the Rockchip internal evaluation board. Therefore we're not breaking any existing devices when changing compatible values.

[added paragraph about no real devices existing]
---
 Documentation/devicetree/bindings/arm/rockchip.txt   | 4 ++--
 arch/arm/boot/dts/Makefile                           | 2 +-
 arch/arm/boot/dts/{rk1108-evb.dts => rv1108-evb.dts} | 4 ++--
 3 files changed, 5 insertions(+), 5 deletions(-)
 rename arch/arm/boot/dts/{rk1108-evb.dts => rv1108-evb.dts} (95%)
Documentation/devicetree/bindings/arm/rockchip.txt +2 -2
index cc4ace6397ab..9901cbd6d11a 100644
@@ -111,9 +111,9 @@ Rockchip platforms device tree bindings
     Required root node properties:
       - compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368";
 
-- Rockchip RK1108 Evaluation board
+- Rockchip RV1108 Evaluation board
     Required root node properties:
-      - compatible = "rockchip,rk1108-evb", "rockchip,rk1108";
+      - compatible = "rockchip,rv1108-evb", "rockchip,rv1108";
 
 - Rockchip RK3368 evb:
     Required root node properties:
arch/arm/boot/dts/Makefile +1 -1
index 011808490fed..d0d37d028790 100644
@@ -674,7 +674,7 @@ dtb-$(CONFIG_ARCH_REALVIEW) += \
 	arm-realview-pba8.dtb \
 	arm-realview-pbx-a9.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += \
-	rk1108-evb.dtb \
+	rv1108-evb.dtb \
 	rk3036-evb.dtb \
 	rk3036-kylin.dtb \
 	rk3066a-bqcurie2.dtb \
arch/arm/boot/dts/rv1108-evb.dts renamed from arch/arm/boot/dts/rk1108-evb.dts +2 -2
similarity index 95%
rename from arch/arm/boot/dts/rk1108-evb.dts
rename to arch/arm/boot/dts/rv1108-evb.dts
index 88fe0a8c4faa..58cf4ac079c3 100644
@@ -43,8 +43,8 @@
 #include "rv1108.dtsi"
 
 / {
-	model = "Rockchip RK1108 Evaluation board";
-	compatible = "rockchip,rk1108-evb", "rockchip,rk1108";
+	model = "Rockchip RV1108 Evaluation board";
+	compatible = "rockchip,rv1108-evb", "rockchip,rv1108";
 
 	memory at 60000000 {
 		device_type = "memory";
Signature · 1 line
2.11.0
author maintainer
#12 lore raw

PATCH v2 6/6 ARM: dts: rockchip: rename RK1108-evb to RV1108-evb

Am Freitag, 17. M?rz 2017, 18:18:40 CEST schrieb Heiko Stuebner:

Quoted 10 lines

From: Andy Yan <[email protected]>

Rockchip finally named the SOC as RV1108, so change it for compatible.

The rk1108/rv1108 is completely new to the market, so there no real devices exist in the wild, only the Rockchip internal evaluation board. Therefore we're not breaking any existing devices when changing compatible values.

Quoted 5 lines
[added paragraph about no real devices existing]

adapted for Makefile changes in 4.12-rc1 and applied for 4.13