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Adaptec aic79xx performance

DISCUSSION Denny Page 1 participant 5 messages Dec 3, 2005 – Dec 8, 2005 SCSI

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Denny Page

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#0 lore raw

[Ok, once more with the correct subject :-]

Hello,

I have a question regarding the support condition of the aic79xx driver.

I am running kernel version 2.6.14 (gentoo) on a dual processor system PCI-X system. I am using an Adaptec scsi adapter to run an HP Ultrium tape drive. Nothing else is attached to the controller.

I was previously using an Adaptec 29160N (aic7892), which is a 32 bit, 66Mhz controller. With this controller, the tape was not able to maintain full streaming, or achieve full speed. Average rate was approximately 27MB per second. In order to address the performance problem, HP recommended that I change to a 64 bit U160 or U320 controller.

I've put in an Adaptec 29320ALP-R (aic7901), which is a 32 bit, 133Mhz controller. With this controller, performance has dropped to an abysmal 2.7MB per second!

I am running the controller at 133Mhz, but I have also tried locking it to 66Mhz with no effect. I am using the same cable with both controllers, and the terminator is built into the cable. Nothing stands out in /var/log/messages.

So, can anyone offer ideas as to why the 79xx controller performs at one tenth the rate of the 78xx controller and how to fix it? Any help appreciated.

Thanks,

Denny

author
#1 lore raw

Further info, indicating a negotiation problem:

/proc/scsi/aic7xxx:
Target 3 Negotiation Settings
User: 160.000MB/s transfers (80.000MHz DT, offset 127, 16bit)
Goal: 160.000MB/s transfers (80.000MHz DT, offset 127, 16bit)
Curr: 160.000MB/s transfers (80.000MHz DT, offset 127, 16bit) Channel A Target 3 Lun 0 Settings
Commands Queued 24
Commands Active 0
Command Openings 1
Max Tagged Openings 0
Device Queue Frozen Count 0

/proc/scsi/aic79xx:
Target 3 Negotiation Settings
User: 320.000MB/s transfers (160.000MHz RDSTRM|DT|IU|RTI|QAS, 16bit)
Goal: 3.300MB/s transfers
Curr: 3.300MB/s transfers
Channel A Target 3 Lun 0 Settings
Commands Queued 19
Commands Active 0
Command Openings 1
Max Tagged Openings 0
Device Queue Frozen Count 0

Kinda explains the abysmal data rate. I am guessing that this is a bug.
Anyone looked at this?

Thanks,

Denny

author
#2 lore raw

Further research shows that this defect is new to kernel version 2.6.14.
I've tested 2.6.13 and a couple of previous kernels, and they
correctly negotiate U160.

With 2.6.13, I am now receiving the expected 60+ MB per second with uncompressed data.

The defect appears to still be present in 2.6.15-rc4.

Hints and suggestions welcomed.

Thanks,

Denny

author
#3 lore raw

Is there anyone that would offer any suggestions on progressing the diagnosis?

Thanks,

Denny

Quoted 16 lines · Denny Page

Further research shows that this defect is new to kernel version 2.6.14. I've tested 2.6.13 and a couple of previous kernels, and they correctly negotiate U160.

With 2.6.13, I am now receiving the expected 60+ MB per second with uncompressed data.

The defect appears to still be present in 2.6.15-rc4.

Hints and suggestions welcomed.

Thanks,

Denny
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author
#4 lore raw
In reply to Denny Page

Boot verbose output for the aic79xx controller follows.

Denny

-----

Dec  3 02:46:07 marvin ahd_pci:6:1:0: Reading VPD from SEEPROM...ahd_pci:6:1:0: VPD parsing successful
Dec  3 02:46:07 marvin ahd_pci:6:1:0: Reading SEEPROM...done.
Dec  3 02:46:07 marvin ahd_pci:6:1:0: STPWLEVEL is on
Dec  3 02:46:07 marvin ahd_pci:6:1:0: Manual Primary Termination
Dec  3 02:46:07 marvin ahd_pci:6:1:0: Manual Secondary Termination
Dec  3 02:46:07 marvin ahd_pci:6:1:0: Primary High byte termination Disabled
Dec  3 02:46:07 marvin ahd_pci:6:1:0: Primary Low byte termination Enabled
Dec  3 02:46:07 marvin ahd_pci:6:1:0: Secondary High byte termination Disabled
Dec  3 02:46:07 marvin ahd_pci:6:1:0: Secondary Low byte termination Disabled
Dec  3 02:46:07 marvin ahd_pci:6:1:0: Downloading Sequencer Program... 650 instructions downloaded
Dec  3 02:46:07 marvin ahd_pci:6:1:0: Features 0x3c001, Bugs 0x500000, Flags 0x3d1
Dec  3 02:46:07 marvin scsi0 : Adaptec AIC79XX PCI-X SCSI HBA DRIVER, Rev 1.3.11
Dec  3 02:46:07 marvin <Adaptec 29320ALP Ultra320 SCSI adapter>
Dec  3 02:46:07 marvin aic7901: Ultra320 Wide Channel A, SCSI Id=7, PCI-X 101-133Mhz, 512 SCBs
Dec  3 02:46:07 marvin
Dec  3 02:46:07 marvin scsi0: Slave Alloc 0
Dec  3 02:46:07 marvin scsi0: Slave Destroy 0
Dec  3 02:46:07 marvin scsi0: Slave Alloc 1
Dec  3 02:46:07 marvin scsi0: Slave Destroy 1
Dec  3 02:46:07 marvin scsi0: Slave Alloc 2
Dec  3 02:46:07 marvin scsi0: Slave Destroy 2
Dec  3 02:46:07 marvin scsi0: Slave Alloc 3
Dec  3 02:46:07 marvin Vendor: HP        Model: Ultrium 2-SCSI    Rev: F5CD
Dec  3 02:46:07 marvin Type:   Sequential-Access                  ANSI SCSI revision: 03
Dec  3 02:46:07 marvin scsi0: Slave Configure 3
Dec  3 02:46:07 marvin target0:0:3: asynchronous.
Dec  3 02:46:07 marvin target0:0:3: Beginning Domain Validation
Dec  3 02:46:07 marvin (scsi0:A:3:0): Sending WDTR 1
Dec  3 02:46:07 marvin (scsi0:A:3:0): Received WDTR 1 filtered to 1
Dec  3 02:46:07 marvin target0:0:3: FAST-5 WIDE SCSI 2.0 MB/s ST (1020 ns, offset 255)
Dec  3 02:46:07 marvin scsi0: target 3 using 16bit transfers
Dec  3 02:46:07 marvin (scsi0:A:3:0): Sending SDTR period 44, offset 0
Dec  3 02:46:07 marvin (scsi0:A:3:0): Received SDTR period 44, offset 0
Dec  3 02:46:07 marvin 	Filtered to period 0, offset 0
Dec  3 02:46:07 marvin target0:0:3: wide asynchronous.
Dec  3 02:46:07 marvin scsi0: target 3 using asynchronous transfers
Dec  3 02:46:07 marvin (scsi0:A:3:0): Sending WDTR 1
Dec  3 02:46:07 marvin (scsi0:A:3:0): Received WDTR 1 filtered to 1
Dec  3 02:46:07 marvin target0:0:3: FAST-5 WIDE SCSI 2.0 MB/s ST (1020 ns, offset 255)
Dec  3 02:46:07 marvin scsi0: target 3 using 16bit transfers
Dec  3 02:46:07 marvin (scsi0:A:3:0): Sending SDTR period 44, offset 0
Dec  3 02:46:07 marvin (scsi0:A:3:0): Received SDTR period 44, offset 0
Dec  3 02:46:07 marvin 	Filtered to period 0, offset 0
Dec  3 02:46:07 marvin target0:0:3: wide asynchronous.
Dec  3 02:46:07 marvin scsi0: target 3 using asynchronous transfers
Dec  3 02:46:07 marvin (scsi0:A:3:0): Sending WDTR 1
Dec  3 02:46:07 marvin (scsi0:A:3:0): Received WDTR 1 filtered to 1
Dec  3 02:46:07 marvin target0:0:3: FAST-5 WIDE SCSI 2.0 MB/s ST (1020 ns, offset 255)
Dec  3 02:46:07 marvin scsi0: target 3 using 16bit transfers
Dec  3 02:46:07 marvin (scsi0:A:3:0): Sending SDTR period 44, offset 0
Dec  3 02:46:07 marvin (scsi0:A:3:0): Received SDTR period 44, offset 0
Dec  3 02:46:07 marvin 	Filtered to period 0, offset 0
Dec  3 02:46:07 marvin target0:0:3: wide asynchronous.
Dec  3 02:46:07 marvin scsi0: target 3 using asynchronous transfers
Dec  3 02:46:07 marvin (scsi0:A:3:0): Sending WDTR 1
Dec  3 02:46:07 marvin (scsi0:A:3:0): Received WDTR 1 filtered to 1
Dec  3 02:46:07 marvin target0:0:3: FAST-5 WIDE SCSI 2.0 MB/s ST (1020 ns, offset 255)
Dec  3 02:46:07 marvin scsi0: target 3 using 16bit transfers
Dec  3 02:46:07 marvin (scsi0:A:3:0): Sending SDTR period 44, offset 0
Dec  3 02:46:07 marvin (scsi0:A:3:0): Received SDTR period 44, offset 0
Dec  3 02:46:07 marvin 	Filtered to period 0, offset 0
Dec  3 02:46:07 marvin target0:0:3: wide asynchronous.
Dec  3 02:46:07 marvin scsi0: target 3 using asynchronous transfers
Dec  3 02:46:07 marvin (scsi0:A:3:0): Sending WDTR 1
Dec  3 02:46:07 marvin (scsi0:A:3:0): Received WDTR 1 filtered to 1
Dec  3 02:46:07 marvin target0:0:3: FAST-5 WIDE SCSI 2.0 MB/s ST (1020 ns, offset 255)
Dec  3 02:46:07 marvin scsi0: target 3 using 16bit transfers
Dec  3 02:46:07 marvin (scsi0:A:3:0): Sending SDTR period 44, offset 0
Dec  3 02:46:07 marvin (scsi0:A:3:0): Received SDTR period 44, offset 0
Dec  3 02:46:07 marvin 	Filtered to period 0, offset 0
Dec  3 02:46:07 marvin target0:0:3: wide asynchronous.
Dec  3 02:46:07 marvin scsi0: target 3 using asynchronous transfers
Dec  3 02:46:07 marvin target0:0:3: Domain Validation skipping write tests
Dec  3 02:46:07 marvin (scsi0:A:3:0): Sending PPR bus_width 1, period 8, offset fe, ppr_options f3
Dec  3 02:46:07 marvin (scsi0:A:3:0): Received PPR width 1, period 9, offset fe,options 2
Dec  3 02:46:07 marvin 	Filtered to width 0, period 0, offset 0, options 0
Dec  3 02:46:07 marvin target0:0:3: asynchronous.
Dec  3 02:46:07 marvin scsi0: target 3 using 8bit transfers
Dec  3 02:46:07 marvin target0:0:3: Ending Domain Validation
Dec  3 02:46:07 marvin scsi0: Slave Alloc 4
Dec  3 02:46:07 marvin scsi0: Slave Destroy 4
Dec  3 02:46:07 marvin scsi0: Slave Alloc 5
Dec  3 02:46:07 marvin scsi0: Slave Destroy 5
Dec  3 02:46:07 marvin scsi0: Slave Alloc 6
Dec  3 02:46:07 marvin scsi0: Slave Destroy 6
Dec  3 02:46:07 marvin scsi0: Slave Alloc 8
Dec  3 02:46:07 marvin scsi0: Slave Destroy 8
Dec  3 02:46:07 marvin scsi0: Slave Alloc 9
Dec  3 02:46:07 marvin scsi0: Slave Destroy 9
Dec  3 02:46:07 marvin scsi0: Slave Alloc 10
Dec  3 02:46:07 marvin scsi0: Slave Destroy 10
Dec  3 02:46:07 marvin scsi0: Slave Alloc 11
Dec  3 02:46:07 marvin scsi0: Slave Destroy 11
Dec  3 02:46:07 marvin scsi0: Slave Alloc 12
Dec  3 02:46:07 marvin scsi0: Slave Destroy 12
Dec  3 02:46:07 marvin scsi0: Slave Alloc 13
Dec  3 02:46:07 marvin scsi0: Slave Destroy 13
Dec  3 02:46:07 marvin scsi0: Slave Alloc 14
Dec  3 02:46:07 marvin scsi0: Slave Destroy 14
Dec  3 02:46:07 marvin scsi0: Slave Alloc 15
Dec  3 02:46:07 marvin scsi0: Slave Destroy 15