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MAINTAINERS: add microchip soc binding directory to microchip soc driver entry

PATCH Applied Conor Dooley 3 participants 7 messages Jun 26, 2024 – Jun 27, 2024

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#0 lore raw

PATCH 1/2 MAINTAINERS: add microchip soc binding directory to microchip soc driver entry

From: Conor Dooley <[email protected]>

I noticed that there's technically not an explicit maintainer for this directory, even if the files currently in it are covered by either the Mircochip FPGA or AT91 entries. Add it to the entry covering the corresponding driver directory.

---
CC: Rob Herring <[email protected]>
CC: Krzysztof Kozlowski <[email protected]>
CC: Conor Dooley <[email protected]>
CC: [email protected]
CC: Nicolas Ferre <[email protected]>
CC: Alexandre Belloni <[email protected]>
CC: Claudiu Beznea <[email protected]>
CC: Lars Povlsen <[email protected]>
CC: Steen Hegelund <[email protected]>
CC: Daniel Machon <[email protected]>

---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)
MAINTAINERS +1 -0
index e2d8fdda1737..c74fd2b70532 100644
@@ -14975,6 +14975,7 @@ MICROCHIP SOC DRIVERS
 M:	Conor Dooley <[email protected]>
 S:	Supported
 T:	git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
+F:	Documentation/devicetree/bindings/soc/microchip/
 F:	drivers/soc/microchip/
 
 MICROCHIP SPI DRIVER
Signature · 1 line
2.43.0
#1 lore raw

PATCH 2/2 MAINTAINERS: add cache binding directory to cache driver entry

From: Conor Dooley <[email protected]>

The directory covering cache controller bindings has no MAINTAINER other than the fallback to myself, Rob and Krzysztof. Add it to the entry for the corresponding drivers.

---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)
MAINTAINERS +1 -0
index c74fd2b70532..19d67bb04d0b 100644
@@ -21503,6 +21503,7 @@ M:	Conor Dooley <[email protected]>
 L:	[email protected]
 S:	Maintained
 T:	git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
+F:	Documentation/devicetree/bindings/cache/
 F:	drivers/cache
 
 STARFIRE/DURALAN NETWORK DRIVER
Signature · 1 line
2.43.0
Acked-by on v1 2/2
#2 lore raw

Re: [PATCH 2/2] MAINTAINERS: add cache binding directory to cache driver entry

Quoted 7 lines · Conor Dooley

From: Conor Dooley <[email protected]>

The directory covering cache controller bindings has no MAINTAINER other than the fallback to myself, Rob and Krzysztof. Add it to the entry for the corresponding drivers.

Best regards,
Krzysztof

#3 lore raw
In reply to Conor Dooley
Quoted 8 lines · Conor Dooley

From: Conor Dooley <[email protected]>

I noticed that there's technically not an explicit maintainer for this directory, even if the files currently in it are covered by either the Mircochip FPGA or AT91 entries. Add it to the entry covering the corresponding driver directory.

Quoted 11 lines

---
CC: Rob Herring <[email protected]>
CC: Krzysztof Kozlowski <[email protected]>
CC: Conor Dooley <[email protected]>
CC: [email protected]
CC: Nicolas Ferre <[email protected]>
CC: Alexandre Belloni <[email protected]>
CC: Claudiu Beznea <[email protected]>
CC: Lars Povlsen <[email protected]>
CC: Steen Hegelund <[email protected]>
CC: Daniel Machon <[email protected]>

Huh, I somehow didn't save my updated commit message. The long list of microchip people here is because it was a move of a sparx5 binding to this directly that caused me to notice the lack of explicit coverage of the directory.

Quoted 19 lines
---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)
MAINTAINERS +1 -0
index e2d8fdda1737..c74fd2b70532 100644
@@ -14975,6 +14975,7 @@ MICROCHIP SOC DRIVERS
 M:	Conor Dooley <[email protected]>
 S:	Supported
 T:	git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
+F:	Documentation/devicetree/bindings/soc/microchip/
 F:	drivers/soc/microchip/
 
 MICROCHIP SPI DRIVER
Signature · 1 line
2.43.0
Acked-by on v1 1/2
#4 lore raw
In reply to Conor Dooley
Quoted 7 lines · Conor Dooley

From: Conor Dooley <[email protected]>

I noticed that there's technically not an explicit maintainer for this directory, even if the files currently in it are covered by either the Mircochip FPGA or AT91 entries. Add it to the entry covering the corresponding driver directory.

Quoted 7 lines

---
CC: Rob Herring <[email protected]>
CC: Krzysztof Kozlowski <[email protected]>
CC: Conor Dooley <[email protected]>
CC: [email protected]
CC: Nicolas Ferre <[email protected]>

Thanks Conor, best regards,
Nicolas

Quoted 24 lines
CC Alexandre Belloni <[email protected]>
CC Claudiu Beznea <[email protected]>
CC Lars Povlsen <[email protected]>
CC Steen Hegelund <[email protected]>
CC Daniel Machon <[email protected]>
---
  MAINTAINERS | 1 +
  1 file changed, 1 insertion(+)
MAINTAINERS +1 -1
index e2d8fdda1737..c74fd2b70532 100644
@@ -14975,6 +14975,7 @@ MICROCHIP SOC DRIVERS
  M:     Conor Dooley <[email protected]>
  S:     Supported
  T:     git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
+F:     Documentation/devicetree/bindings/soc/microchip/
  F:     drivers/soc/microchip/
 
  MICROCHIP SPI DRIVER
--

2.43.0

Acked-by on v1 1/2
#5 lore raw
In reply to Conor Dooley
Quoted 9 lines · Conor Dooley

From: Conor Dooley <[email protected]>

I noticed that there's technically not an explicit maintainer for this directory, even if the files currently in it are covered by either the Mircochip FPGA or AT91 entries. Add it to the entry covering the corresponding driver directory.

---

Best regards,
Krzysztof

author Applied
#6 lore raw
In reply to Conor Dooley

From: Conor Dooley <[email protected]>

Quoted 6 lines · Conor Dooley

I noticed that there's technically not an explicit maintainer for this directory, even if the files currently in it are covered by either the Mircochip FPGA or AT91 entries. Add it to the entry covering the corresponding driver directory.

Applied to riscv-cache-for-next, thanks!

[2/2] MAINTAINERS: add cache binding directory to cache driver entry

      https://git.kernel.org/conor/c/4ca47d8bcca0

Thanks,
Conor.