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Fix the build error of Wind River PPMC board

PATCH In review Mark.Zhan 2 participants 3 messages Jun 20, 2006 MIPS

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Mark.Zhan

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#0 lore raw

PATCH 1/1 Fix the build error of Wind River PPMC board

Hi,

This patch will fix the build error of building wind river ppmc board, which is caused by the change of plat_setup hook interface. And because Ralf has introduced the new interrupt handling framework in 2.6.17-rc2, so the assembly interrupt handling codes in "int-handler.S" should be removed and replaced by the new plat_irq_dispatch() hook.

Signed-off-by Rongkai.Zhan <[email protected]>

-----

arch/mips/Kconfig +1 -1
index 89ec332..e38f0cd 100644
@@ -360,7 +360,7 @@ config MIPS_SEAD
 	  board.
 
 config WR_PPMC
-	bool "Support for Wind River PPMC board"
+	bool "Wind River PPMC board"
 	select IRQ_CPU
 	select BOOT_ELF32
 	select DMA_NONCOHERENT
arch/mips/gt64120/wrppmc/Makefile +1 -1
index 72606b9..7cf5220 100644
@@ -9,6 +9,6 @@
 # Makefile for the Wind River MIPS 4KC PPMC Eval Board
 #
 
-obj-y	+= int-handler.o irq.o reset.o setup.o time.o pci.o
+obj-y += irq.o reset.o setup.o time.o pci.o
 
 EXTRA_AFLAGS := $(CFLAGS)
arch/mips/gt64120/wrppmc/int-handler.S deleted +0 -59

59 lines not on this page · raw message

arch/mips/gt64120/wrppmc/irq.c +13 -4
index 8605687..80d6b79 100644
@@ -30,7 +30,19 @@
 #include <asm/irq_cpu.h>
 #include <asm/gt64120.h>
 
-extern asmlinkage void handle_IRQ(void);
+asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+{
+	unsigned int pending = read_c0_status() & read_c0_cause();
+	
+	if (pending & STATUSF_IP7)
+		do_IRQ(WRPPMC_MIPS_TIMER_IRQ, regs);	/* CPU Compare/Count internal timer */
+	else if (pending & STATUSF_IP6)
+		do_IRQ(WRPPMC_UART16550_IRQ, regs);	/* UART 16550 port */
+	else if (pending & STATUSF_IP3)
+		do_IRQ(WRPPMC_PCI_INTA_IRQ, regs);	/* PCI INT_A */
+	else
+		spurious_interrupt(regs);
+}
 
 /**
  * Initialize GT64120 Interrupt Controller

@@ -53,9 +65,6 @@ void __init arch_init_irq(void)
 	/* enable all CPU interrupt bits. */
 	set_c0_status(ST0_IM);	/* IE bit is still 0 */
 
-	/* Install MIPS Interrupt Trap Vector */
-	set_except_vector(0, handle_IRQ);
-
 	/* IRQ 0 - 7 are for MIPS common irq_cpu controller */
 	mips_cpu_irq_init(0);
arch/mips/gt64120/wrppmc/setup.c +1 -1
index 20c591e..2db6375 100644
@@ -125,7 +125,7 @@ static void wrppmc_setup_serial(void)
 }
 #endif
 
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
 	extern void wrppmc_time_init(void);
 	extern void wrppmc_timer_setup(struct irqaction *);
author
#1 lore raw

Hi,

Sorry for the stupid line wrap problem, again.

It is re-posted.

Signed-off-by Rongkai.Zhan <[email protected]>

------

arch/mips/Kconfig +1 -1
index 89ec332..e38f0cd 100644
@@ -360,7 +360,7 @@ config MIPS_SEAD
 	  board.
 
 config WR_PPMC
-	bool "Support for Wind River PPMC board"
+	bool "Wind River PPMC board"
 	select IRQ_CPU
 	select BOOT_ELF32
 	select DMA_NONCOHERENT
arch/mips/gt64120/wrppmc/Makefile +1 -1
index 72606b9..7cf5220 100644
@@ -9,6 +9,6 @@
 # Makefile for the Wind River MIPS 4KC PPMC Eval Board
 #
 
-obj-y	+= int-handler.o irq.o reset.o setup.o time.o pci.o
+obj-y += irq.o reset.o setup.o time.o pci.o
 
 EXTRA_AFLAGS := $(CFLAGS)
arch/mips/gt64120/wrppmc/int-handler.S deleted +0 -59

59 lines not on this page · raw message

arch/mips/gt64120/wrppmc/irq.c +13 -4
index 8605687..80d6b79 100644
@@ -30,7 +30,19 @@
 #include <asm/irq_cpu.h>
 #include <asm/gt64120.h>
 
-extern asmlinkage void handle_IRQ(void);
+asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+{
+	unsigned int pending = read_c0_status() & read_c0_cause();
+	
+	if (pending & STATUSF_IP7)
+		do_IRQ(WRPPMC_MIPS_TIMER_IRQ, regs);	/* CPU Compare/Count internal timer */
+	else if (pending & STATUSF_IP6)
+		do_IRQ(WRPPMC_UART16550_IRQ, regs);	/* UART 16550 port */
+	else if (pending & STATUSF_IP3)
+		do_IRQ(WRPPMC_PCI_INTA_IRQ, regs);	/* PCI INT_A */
+	else
+		spurious_interrupt(regs);
+}
 
 /**
  * Initialize GT64120 Interrupt Controller

@@ -53,9 +65,6 @@ void __init arch_init_irq(void)
 	/* enable all CPU interrupt bits. */
 	set_c0_status(ST0_IM);	/* IE bit is still 0 */
 
-	/* Install MIPS Interrupt Trap Vector */
-	set_except_vector(0, handle_IRQ);
-
 	/* IRQ 0 - 7 are for MIPS common irq_cpu controller */
 	mips_cpu_irq_init(0);
arch/mips/gt64120/wrppmc/setup.c +1 -1
index 20c591e..2db6375 100644
@@ -125,7 +125,7 @@ static void wrppmc_setup_serial(void)
 }
 #endif
 
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
 	extern void wrppmc_time_init(void);
 	extern void wrppmc_timer_setup(struct irqaction *);
#2 lore raw
Quoted 1 line · Mark.Zhan

Sorry for the stupid line wrap problem, again.

git didn't moan about the first patch being corrupt, so I applied it.

Ralf