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arch/mips/au1000/time.c cleanup

PATCH New Sergei Shtylylov 1 participant 4 messages Nov 7, 2005 – Sep 3, 2006 MIPS

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Sergei Shtylylov

author
#0 lore raw

PATCH 1/1 arch/mips/au1000/time.c cleanup

Hello.

Mark au1xxx_timer_setup() __init, just because it is. Get rid of
unneeded extrns (note that (*do_gettimeoffset)() is already declared by <asm/time.c>) and an unused variable. Kill some whitespace...

WBR, Sergei

Signed-off-by Sergei Shtylyov <[email protected]>
mips/au1000/common/time.c renamed from mips/au1000/common/time.c~ +2 -7
Index: arch/mips/au1000/common/time.c
===================================================================
@@ -50,10 +50,6 @@
 #include <linux/mc146818rtc.h>
 #include <linux/timex.h>
 
-extern void do_softirq(void);
-extern volatile unsigned long wall_jiffies;
-unsigned long missed_heart_beats = 0;
-
 static unsigned long r4k_offset; /* Amount to increment compare reg each time */
 static unsigned long r4k_cur;    /* What counter should be at next timer irq */
 int	no_au1xxx_32khz;

@@ -387,10 +383,9 @@ static unsigned long do_fast_pm_gettimeo
 }
 #endif
 
-void au1xxx_timer_setup(struct irqaction *irq)
+void __init au1xxx_timer_setup(struct irqaction *irq)
 {
-        unsigned int est_freq;
-	extern unsigned long (*do_gettimeoffset)(void);
+	unsigned int est_freq;
 
 	printk("calculating r4koff... ");
 	r4k_offset = cal_r4koff();
author
#1 lore raw

PATCH 1/1 arch/mips/au1000/common/time.c cleanup (take 2)

Au1xx0 CPU counter ticks at the full CPU clock speed, not at the halved
one -- this is not an issue with the current kernel since Alchemy uses its own timer handler here which pays no attention to mips_hpt_frequency.
Additionally, mark au1xxx_timer_setup() __init because it is, get rid of
unneeded externs (note that (*do_gettimeoffset)() is already declared by <asm/time.c>) and an unused variable, and kill some whitespace...

Signed-off-by Sergei Shtylyov <[email protected]>
arch/mips/au1000/common/time.c +3 -10
Index: linux-mips/arch/mips/au1000/common/time.c
===================================================================
@@ -50,10 +50,6 @@
 #include <linux/mc146818rtc.h>
 #include <linux/timex.h>
 
-extern void do_softirq(void);
-extern volatile unsigned long wall_jiffies;
-unsigned long missed_heart_beats = 0;
-
 static unsigned long r4k_offset; /* Amount to increment compare reg each time */
 static unsigned long r4k_cur;    /* What counter should be at next timer irq */
 int	no_au1xxx_32khz;

@@ -287,7 +283,6 @@ unsigned long cal_r4koff(void)
 #else
 		cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) *
 			AU1000_SRC_CLK;
-		count = cpu_speed / 2;
 #endif
 	}
 	else {

@@ -296,10 +291,9 @@ unsigned long cal_r4koff(void)
 		 * NOTE: some old silicon doesn't allow reading the PLL.
 		 */
 		cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) * AU1000_SRC_CLK;
-		count = cpu_speed / 2;
 		no_au1xxx_32khz = 1;
 	}
-	mips_hpt_frequency = count;
+	mips_hpt_frequency = cpu_speed;
 	// Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16)
 	set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16));
 	spin_unlock_irqrestore(&time_lock, flags);

@@ -388,10 +382,9 @@ static unsigned long do_fast_pm_gettimeo
 }
 #endif
 
-void au1xxx_timer_setup(struct irqaction *irq)
+void __init au1xxx_timer_setup(struct irqaction *irq)
 {
-        unsigned int est_freq;
-	extern unsigned long (*do_gettimeoffset)(void);
+	unsigned int est_freq;
 
 	printk("calculating r4koff... ");
 	r4k_offset = cal_r4koff();
author
#2 lore raw

PATCH 1/1 Au1xx0 code sets incorrect mips_hpt_frequency

Alchemy CPU counter ticks at the full CPU clock speed, not at the halved one -- this is not an issue with the current kernel since Alchemy uses its own timer handler here which pays no attention to mips_hpt_frequency.

Signed-off-by Sergei Shtylyov <[email protected]>

---
I joined this fix to the arch/mips/au1000/common/time.c cleanup patch previously but its earlier verison has been finally committed, so here's the recast which fixes the warning about the 'count' variable being unused...

arch/mips/au1000/common/time.c +2 -5
Index: linux-mips/arch/mips/au1000/common/time.c
===================================================================
@@ -231,7 +231,6 @@ wakeup_counter0_set(int ticks)
  */
 unsigned long cal_r4koff(void)
 {
-	unsigned long count;
 	unsigned long cpu_speed;
 	unsigned long flags;
 	unsigned long counter;

@@ -258,7 +257,7 @@ unsigned long cal_r4koff(void)
 
 #if defined(CONFIG_AU1000_USE32K)
 		{
-			unsigned long start, end;
+			unsigned long start, end, count;
 
 			start = au_readl(SYS_RTCREAD);
 			start += 2;

@@ -282,7 +281,6 @@ unsigned long cal_r4koff(void)
 #else
 		cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) *
 			AU1000_SRC_CLK;
-		count = cpu_speed / 2;
 #endif
 	}
 	else {

@@ -291,10 +289,9 @@ unsigned long cal_r4koff(void)
 		 * NOTE: some old silicon doesn't allow reading the PLL.
 		 */
 		cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) * AU1000_SRC_CLK;
-		count = cpu_speed / 2;
 		no_au1xxx_32khz = 1;
 	}
-	mips_hpt_frequency = count;
+	mips_hpt_frequency = cpu_speed;
 	// Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16)
 	set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16));
 	spin_unlock_irqrestore(&time_lock, flags);
author
#3 lore raw

PATCH 1/1 Alchemy counter runs at full CPU speed

In reply to Sergei Shtylylov

Au1xx0 CPU counter ticks at the full CPU clock speed, not at the halved one. This is not an issue with the current kernel since Alchemy uses its own timer handler here which pays no attention to mips_hpt_frequency, so this is a cleanup type patch (though our kernel had its clock ticking at double speed because of this :-).

Signed-off-by Sergei Shtylyov <[email protected]>
arch/mips/au1000/common/time.c +1 -3
Index: linux-mips/arch/mips/au1000/common/time.c
===================================================================
@@ -287,7 +287,6 @@ unsigned long cal_r4koff(void)
 #else
 		cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) *
 			AU1000_SRC_CLK;
-		count = cpu_speed / 2;
 #endif
 	}
 	else {

@@ -296,10 +295,9 @@ unsigned long cal_r4koff(void)
 		 * NOTE: some old silicon doesn't allow reading the PLL.
 		 */
 		cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) * AU1000_SRC_CLK;
-		count = cpu_speed / 2;
 		no_au1xxx_32khz = 1;
 	}
-	mips_hpt_frequency = count;
+	mips_hpt_frequency = cpu_speed;
 	// Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16)
 	set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16));
 	spin_unlock_irqrestore(&time_lock, flags);