mips: PMC MSP71xx mips common

Quoted 10 lines · Marc St-Jean

Quoted 9 lines · Ralf Baechle

Quoted 7 lines · Thiemo Seufer

Something like

#if LOADADDR == 0xffffffff80000000
      .fill   0x400

#endif

but by defining an appropriate name in arch/mips/Makefile

instead of

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externalizing the load-y/LOADADDR there.

Basically a good idea but it will fail for 64-bit kernels so the test would need to be extended to cover XKPHYS as well. Also R2 processors which have the c0_ebase registers do no need to reserve space for exception handlers as they can easily move them elsewhere.

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Ralf

Hi Ralf,

From your description it sounds like not all R2 CPUs have c0_ebase

registers?

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I don't know how to check for c0_ebase from the pre-processor, the

test below

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assumes they all do.

Sorry for being ambigous. All R2 processors have ebase. However Linux happens to support older processors as well, that was my point.

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How about something like:

#if (defined(CONFIG_SYS_HAS_CPU_MIPS32_R1) && \
                 VMLINUX_LOAD_ADDRESS == CKSEG0) || \
         ((defined(CONFIG_SYS_HAS_CPU_MIPS64_R1) || 

defined(CONFIG_SYS_HAS_CPU_MIPS64_R2)) && \

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                 VMLINUX_LOAD_ADDRESS == XKPHYS)
      .fill 0x400

#endif

There are several potencial addresses in XKPHYS, so if anything:

#if !defined(CONFIG_CPU_MIPSR2) && \
    ((VMLINUX_LOAD_ADDRESS == CKSEG0) || \
     (VMLINUX_LOAD_ADDRESS & 0xc7ffffffffffffffUL) == XKPHYS)

However even where ebase actually exists there might be reasons not to use it. So a config option might be the safe thing to do.

Ralf