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last myri10ge updates for 2.6.21

PATCH In review Brice Goglin 2 participants 7 messages Apr 10, 2007 – Apr 11, 2007

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#0 lore raw

cover last myri10ge updates for 2.6.21

Hi Jeff,

In case it is not too late for 2.6.21, here are 3 minor fixes for myri10ge:
1. fix management of the firmware 4KB boundary crossing restriction
2. more Intel chipsets providing aligned PCIe completions
3. update driver version to 1.3.0-1.233

Thanks,
Brice

#1 lore raw

PATCH 1/3 myri10ge: fix management of the firmware 4KB boundary crossing restriction

Simpler way of dealing with the firmware 4KB boundary crossing restriction for rx buffers. This fixes a variety of memory corruption issues when using an "uncommon" MTU with a 16KB page size.

---
 drivers/net/myri10ge/myri10ge.c |   19 ++++++++-----------
 1 file changed, 8 insertions(+), 11 deletions(-)
drivers/net/myri10ge/myri10ge.c +8 -11
Index: linux-rc/drivers/net/myri10ge/myri10ge.c
===================================================================
@@ -900,19 +900,9 @@
 	/* try to refill entire ring */
 	while (rx->fill_cnt != (rx->cnt + rx->mask + 1)) {
 		idx = rx->fill_cnt & rx->mask;
-
-		if ((bytes < MYRI10GE_ALLOC_SIZE / 2) &&
-		    (rx->page_offset + bytes <= MYRI10GE_ALLOC_SIZE)) {
+		if (rx->page_offset + bytes <= MYRI10GE_ALLOC_SIZE) {
 			/* we can use part of previous page */
 			get_page(rx->page);
-#if MYRI10GE_ALLOC_SIZE > 4096
-			/* Firmware cannot cross 4K boundary.. */
-			if ((rx->page_offset >> 12) !=
-			    ((rx->page_offset + bytes - 1) >> 12)) {
-				rx->page_offset =
-				    (rx->page_offset + bytes) & ~4095;
-			}
-#endif
 		} else {
 			/* we need a new page */
 			page =
@@ -941,6 +931,13 @@
 
 		/* start next packet on a cacheline boundary */
 		rx->page_offset += SKB_DATA_ALIGN(bytes);
+
+#if MYRI10GE_ALLOC_SIZE > 4096
+		/* don't cross a 4KB boundary */
+		if ((rx->page_offset >> 12) !=
+		    ((rx->page_offset + bytes - 1) >> 12))
+			rx->page_offset = (rx->page_offset + 4096) & ~4095;
+#endif
 		rx->fill_cnt++;
 
 		/* copy 8 descriptors to the firmware at a time */
#2 lore raw

Re: [PATCH 1/3] myri10ge: fix management of the firmware 4KB boundary crossing restriction

Quoted 40 lines · Brice Goglin

Simpler way of dealing with the firmware 4KB boundary crossing restriction for rx buffers. This fixes a variety of memory corruption issues when using an "uncommon" MTU with a 16KB page size.

---
 drivers/net/myri10ge/myri10ge.c |   19 ++++++++-----------
 1 file changed, 8 insertions(+), 11 deletions(-)

Index: linux-rc/drivers/net/myri10ge/myri10ge.c
===================================================================

drivers/net/myri10ge/myri10ge.c +1 -11
@@ -900,19 +900,9 @@
 	/* try to refill entire ring */
 	while (rx->fill_cnt != (rx->cnt + rx->mask + 1)) {
 		idx = rx->fill_cnt & rx->mask;
-
-		if ((bytes < MYRI10GE_ALLOC_SIZE / 2) &&
-		    (rx->page_offset + bytes <= MYRI10GE_ALLOC_SIZE)) {
+		if (rx->page_offset + bytes <= MYRI10GE_ALLOC_SIZE) {
 			/* we can use part of previous page */
 			get_page(rx->page);
-#if MYRI10GE_ALLOC_SIZE > 4096
-			/* Firmware cannot cross 4K boundary.. */
-			if ((rx->page_offset >> 12) !=
-			    ((rx->page_offset + bytes - 1) >> 12)) {
-				rx->page_offset =
-				    (rx->page_offset + bytes) & ~4095;
-			}
-#endif
 		} else {
 			/* we need a new page */
 			page =
@@ -941,6 +931,13 @@
 
 		/* start next packet on a cacheline boundary */
 		rx->page_offset += SKB_DATA_ALIGN(bytes);

drivers/net/myri10ge/myri10ge.c line 943

Quoted 10 lines
drivers/net/myri10ge/myri10ge.c +7 -0
+
+#if MYRI10GE_ALLOC_SIZE > 4096
+		/* don't cross a 4KB boundary */
+		if ((rx->page_offset >> 12) !=
+		    ((rx->page_offset + bytes - 1) >> 12))
+			rx->page_offset = (rx->page_offset + 4096) & ~4095;
+#endif
 		rx->fill_cnt++;
 
 		/* copy 8 descriptors to the firmware at a time */

applied 1-3

#3 lore raw

PATCH 2/3 myri10ge: more Intel chipsets providing aligned PCIe completions

In reply to Brice Goglin

Add the Intel 5000 southbridge (aka Intel 6310/6311/6321ESB) PCIe ports and the Intel E30x0 chipsets to the whitelist of aligned PCIe completion.

---
 drivers/net/myri10ge/myri10ge.c |   17 +++++++++++++++++
 1 file changed, 17 insertions(+)
drivers/net/myri10ge/myri10ge.c +16 -0
Index: linux-rc/drivers/net/myri10ge/myri10ge.c
===================================================================
@@ -2487,6 +2487,10 @@
 
 #define PCI_DEVICE_ID_INTEL_E5000_PCIE23 0x25f7
 #define PCI_DEVICE_ID_INTEL_E5000_PCIE47 0x25fa
+#define PCI_DEVICE_ID_INTEL_6300ESB_PCIEE1 0x3510
+#define PCI_DEVICE_ID_INTEL_6300ESB_PCIEE4 0x351b
+#define PCI_DEVICE_ID_INTEL_E3000_PCIE	0x2779
+#define PCI_DEVICE_ID_INTEL_E3010_PCIE	0x277a
 #define PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_FIRST 0x140
 #define PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_LAST 0x142
 
@@ -2526,6 +2530,18 @@
 				PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_FIRST
 				&& bridge->device <=
 				PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_LAST)
+			    /* All Intel E3000/E3010 PCIE ports */
+			    || (bridge->vendor == PCI_VENDOR_ID_INTEL
+				&& (bridge->device ==
+				    PCI_DEVICE_ID_INTEL_E3000_PCIE
+				    || bridge->device ==
+				    PCI_DEVICE_ID_INTEL_E3010_PCIE))
+			    /* All Intel 6310/6311/6321ESB PCIE ports */
+			    || (bridge->vendor == PCI_VENDOR_ID_INTEL
+				&& bridge->device >=
+				PCI_DEVICE_ID_INTEL_6300ESB_PCIEE1
+				&& bridge->device <=
+				PCI_DEVICE_ID_INTEL_6300ESB_PCIEE4)
 			    /* All Intel E5000 PCIE ports */
 			    || (bridge->vendor == PCI_VENDOR_ID_INTEL
 				&& bridge->device >=
#4 lore raw

Re: [PATCH 2/3] myri10ge: more Intel chipsets providing aligned PCIe completions

Quoted 32 lines · Brice Goglin

Add the Intel 5000 southbridge (aka Intel 6310/6311/6321ESB) PCIe ports and the Intel E30x0 chipsets to the whitelist of aligned PCIe completion.

---
 drivers/net/myri10ge/myri10ge.c |   17 +++++++++++++++++
 1 file changed, 17 insertions(+)

Index: linux-rc/drivers/net/myri10ge/myri10ge.c
===================================================================

drivers/net/myri10ge/myri10ge.c +9 -0
@@ -2487,6 +2487,10 @@
 
 #define PCI_DEVICE_ID_INTEL_E5000_PCIE23 0x25f7
 #define PCI_DEVICE_ID_INTEL_E5000_PCIE47 0x25fa
+#define PCI_DEVICE_ID_INTEL_6300ESB_PCIEE1 0x3510
+#define PCI_DEVICE_ID_INTEL_6300ESB_PCIEE4 0x351b
+#define PCI_DEVICE_ID_INTEL_E3000_PCIE	0x2779
+#define PCI_DEVICE_ID_INTEL_E3010_PCIE	0x277a
 #define PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_FIRST 0x140
 #define PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_LAST 0x142
 
@@ -2526,6 +2530,18 @@
 				PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_FIRST
 				&& bridge->device <=
 				PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_LAST)
+			    /* All Intel E3000/E3010 PCIE ports */
+			    || (bridge->vendor == PCI_VENDOR_ID_INTEL
+				&& (bridge->device ==
+				    PCI_DEVICE_ID_INTEL_E3000_PCIE
+				    || bridge->device ==

drivers/net/myri10ge/myri10ge.c line 2547

Quoted 10 lines
drivers/net/myri10ge/myri10ge.c +7 -0
+				    PCI_DEVICE_ID_INTEL_E3010_PCIE))
+			    /* All Intel 6310/6311/6321ESB PCIE ports */
+			    || (bridge->vendor == PCI_VENDOR_ID_INTEL
+				&& bridge->device >=
+				PCI_DEVICE_ID_INTEL_6300ESB_PCIEE1
+				&& bridge->device <=
+				PCI_DEVICE_ID_INTEL_6300ESB_PCIEE4)
 			    /* All Intel E5000 PCIE ports */
 			    || (bridge->vendor == PCI_VENDOR_ID_INTEL
 				&& bridge->device >=

though I'm applying this, long term this should probably move out of myri driver

#5 lore raw

Re: [PATCH 2/3] myri10ge: more Intel chipsets providing aligned PCIe completions

Quoted 14 lines · Jeff Garzik
Quoted 14 lines
drivers/net/myri10ge/myri10ge.c +10 -0
@@ -2526,6 +2530,18 @@
                 PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_FIRST
                 && bridge->device <=
                 PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_LAST)
+                /* All Intel E3000/E3010 PCIE ports */
+                || (bridge->vendor == PCI_VENDOR_ID_INTEL
+                && (bridge->device ==
+                    PCI_DEVICE_ID_INTEL_E3000_PCIE
+                    || bridge->device ==
+                    PCI_DEVICE_ID_INTEL_E3010_PCIE))
+                /* All Intel 6310/6311/6321ESB PCIE ports */
+                || (bridge->vendor == PCI_VENDOR_ID_INTEL
+                && bridge->device >=
+                PCI_DEVICE_ID_INTEL_6300ESB_PCIEE1
Quoted 8 lines

drivers/net/myri10ge/myri10ge.c line 2547

Quoted 5 lines
drivers/net/myri10ge/myri10ge.c +2 -0
+                && bridge->device <=
+                PCI_DEVICE_ID_INTEL_6300ESB_PCIEE4)
                 /* All Intel E5000 PCIE ports */
                 || (bridge->vendor == PCI_VENDOR_ID_INTEL
                 && bridge->device >=

though I'm applying this, long term this should probably move out of myri driver

Right, we are worried about this already-too-long list. Even if we could imagine having some dedicated functions/quirks or whatever to do this in the PCI core, we are not sure somebody else will ever use this feature. For now, we are exploring better ways to decide which firmware to use, and we currently hope to remove the whitelist entirely in the near future.

Brice

#6 lore raw

PATCH 3/3 myri10ge: update driver version to 1.3.0-1.233

In reply to Brice Goglin

Update the myri10ge driver version number to 1.3.0-1.233.

---
 drivers/net/myri10ge/myri10ge.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/net/myri10ge/myri10ge.c +1 -1
Index: linux-rc/drivers/net/myri10ge/myri10ge.c
===================================================================
@@ -71,7 +71,7 @@
 #include "myri10ge_mcp.h"
 #include "myri10ge_mcp_gen_header.h"
 
-#define MYRI10GE_VERSION_STR "1.3.0-1.227"
+#define MYRI10GE_VERSION_STR "1.3.0-1.233"
 
 MODULE_DESCRIPTION("Myricom 10G driver (10GbE)");
 MODULE_AUTHOR("Maintainer: [email protected]");