Patchset to establish sanity in Xilinx Virtex support
Quoted 7 lines · Grant Likely
The Virtex support in Linus' tree is a mess. When I ported the common devices over to using the platform bus I tried the use the
ppc_sysinfrastructure.ppc_sysis intended for SoCs that have a fixed set of devices. It is the *wrong* approach for FPGA support, and I made a royal mess of things. This patch set fixes that problem and makes a number of other changes that make supporting Virtex boards easier.
Quoted 8 lines
I do know that changes to
arch/ppcare frowned upon at the moment. However, 4xx support inarch/powerpcis not merged yet, and Virtex support needs additional work beyond that. I suspect thatarch/ppcsupport for the 4xx parts is going to need to stay alive for the next 2-3 kernel releases anyway whilearch/powerpcsupport stablizes. Getting these patches in will make it easier to support the Virtex ports while I hack on gettingarch/powerpcstuff figured out.
I have applied your patches to a 2.6.20.4 kernel, along with your SystemACE driver. I am fully up and running on a simple ML405-based system setup with a Uartlite and a SystemACE. (I made the Kconfig changes suggested by Dale Farnsworth to my copy). So, thank you very much. I appreciate the neatness of your patches, the fact that I now have early boot text support on my uartlite port and the fact that (somehow) you've shaved a good couple of seconds of my boot time against the Xilinx SystemACE driver. Thanks!
In your reply to Mohamed Sadegh Sadri you mentioned that you will be publishing your GIT tree with TEMAC support. Two very quick questions: where do I find this, and does it support auto-negotiation properly? I am having serious problems with auto-negotiation and the various flavours of driver out there. It seems like the best long term plan would be to use the PHYLIB support to handle the PHY side of things but I have only just started looking into this.
Thanks again,
-- Peter
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Quoted 8 lines · Peter Mendham
I have applied your patches to a 2.6.20.4 kernel, along with your SystemACE driver. I am fully up and running on a simple ML405-based system setup with a Uartlite and a SystemACE. (I made the
Kconfigchanges suggested by Dale Farnsworth to my copy). So, thank you very much. I appreciate the neatness of your patches, the fact that I now have early boot text support on my uartlite port and the fact that (somehow) you've shaved a good couple of seconds of my boot time against the Xilinx SystemACE driver. Thanks!
Thanks for your feedback.
I'm glad to hear that the driver is faster; I was hoping that was the case, but I haven't benchmarked it against the Xilinx driver yet. Please,
please, PLEASE let me know if you have any problems with it. Any information you can provide me on your usage would be fantastic.
So, I assume that your rootfs is mounted from the CF card, correct? If so, very cool. I hadn't gotten to that point in my testing, so I didn't know if that would work. :-)
Quoted 7 lines
In your reply to Mohamed Sadegh Sadri you mentioned that you will be publishing your GIT tree with TEMAC support. Two very quick questions:
where do I find this, and does it support auto-negotiation properly? I am having serious problems with auto-negotiation and the various flavours of driver out there. It seems like the best long term plan would be to use the PHYLIB support to handle the PHY side of things but I have only just started looking into this.
I'll be posting it on my git server at http://git.secretlab.ca, and yes it does support autonegotiation, at least when using the Phy that is on the ML403 board. I'm going to take a close look a the TEMAC patch that Andrei recently posted on the list which makes use of phylib. It looks interesting.
Cheers and thanks,
g.
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Grant Likely, B.Sc. P.Eng. Secret Lab Technologies Ltd. [email protected] (403) 399-0195
Quoted 1 line · Grant Likely
So, I assume that your rootfs is mounted from the CF card, correct?
It is indeed - no problems yet :)
-- Peter
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