s3fb: Driver fixes
Subsystems (2)
PATCH 35/41 s3fb: Driver fixes
From: Ondrej Zajicek <[email protected]>
This fixes broken fbcon on Virge VX in 24 bpp mode, and contains several other small updates.
Signed-off-by Ondrej Zajicek <[email protected]>
Signed-off-by Antonino Daplas <[email protected]>
---
Documentation/fb/s3fb.txt | 12 ++++++++---- drivers/video/s3fb.c | 21 ++++++++++----------- 2 files changed, 18 insertions(+), 15 deletions(-)
Documentation/fb/s3fb.txt +8 -4
@@ -35,10 +35,12 @@ Supported Features * suspend/resume support * DPMS support -Text mode is supported even in higher resolutions, but there is limitation -to lower pixclocks (maximum between 50-60 MHz, depending on specific hardware). -This limitation is not enforced by driver. Text mode supports 8bit wide fonts -only (hardware limitation) and 16bit tall fonts (driver limitation). +Text mode is supported even in higher resolutions, but there is limitation to +lower pixclocks (maximum usually between 50-60 MHz, depending on specific +hardware, i get best results from plain S3 Trio32 card - about 75 MHz). This +limitation is not enforced by driver. Text mode supports 8bit wide fonts only +(hardware limitation) and 16bit tall fonts (driver limitation). Text mode +support is broken on S3 Trio64 V2/DX. There are two 4 bpp modes. First mode (selected if nonstd == 0) is mode with packed pixels, high nibble first. Second mode (selected if nonstd == 1) is mode
@@ -73,6 +75,8 @@ Known bugs ========== * cursor disable in text mode doesn't work + * text mode broken on S3 Trio64 V2/DX + -- Ondrej Zajicek <[email protected]>
drivers/video/s3fb.c +10 -11
@@ -65,7 +65,7 @@ static const struct svga_fb_format s3fb_static const struct svga_pll s3_pll = {3 ,129 ,3 ,33 ,0 ,3 , -60000 ,240000 ,14318 }; +35000 ,240000 ,14318 };static const int s3_memsizes[] = {4096 ,0 ,3072 ,8192 ,2048 ,6144 ,1024 ,512 };
@@ -331,8 +331,13 @@ static void s3_set_pixclock(struct fb_in {u16 m, n, r;u8 regval; +int rv; -svga_compute_pll (&s3_pll,1000000000 / pixclock, &m, &n, &r, info->node); + rv =svga_compute_pll (&s3_pll,1000000000 / pixclock, &m, &n, &r, info->node); +if (rv <0 ) { +printk (KERN_ERR "fb%d: cannot set requested pixclock, keeping old value\n" , info->node); +return ; + }/* Set VGA misc register */ regval =vga_r (NULL ,VGA_MIS_R );
@@ -710,7 +715,7 @@ static int s3fb_setcolreg(u_int regno, ubreak ;case 16 :if (regno >=16 ) -return -EINVAL ; +return 0 ;if (fb->var.green.length ==5 ) ((u32*)fb->pseudo_palette)[regno] = ((red & 0xF800) >> 1) |
@@ -723,9 +728,9 @@ static int s3fb_setcolreg(u_int regno, ucase 24 :case 32 :if (regno >=16 ) -return -EINVAL ; +return 0 ; - ((u32 *)fb->pseudo_palette)[regno] = ((transp &0xFF00 ) <<16 ) | ((red &0xFF00 ) <<8 ) | + ((u32 *)fb->pseudo_palette)[regno] = ((red &0xFF00 ) <<8 ) | (green &0xFF00 ) | ((blue &0xFF00 ) >>8 );break ;default :
@@ -778,12 +783,6 @@ static int s3fb_pan_display(struct fb_vaunsigned int offset; -/* Validate the offsets */ -if ((var->xoffset + var->xres) > var->xres_virtual) -return -EINVAL ; -if ((var->yoffset + var->yres) > var->yres_virtual) -return -EINVAL ; -/* Calculate the offset */ if (var->bits_per_pixel ==0 ) { offset = (var->yoffset /16 ) * (var->xres_virtual /2 ) + (var->xoffset /2 );
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