fix for "fpga load" on spartan3 in slave parallel mode
PATCH 1/1 fix for "fpga load" on spartan3 in slave parallel mode
The while loop exits too soon if the "busy" function is a dummy function which always returns false.
common/spartan3.c 2007-06-30 05:17:30.000000000 -0700 renamed from common/spartan3.c 2007-06-30 05:15:22.000000000 -0700 +2 -2
@@ -176,7 +176,7 @@ static int Spartan3_sp_load (Xilinx_desc "read data:\t0x%p\n" "write data:\t0x%p\n" "busy:\t0x%p\n" - "abort:\t0x%p\n", + "abort:\t0x%p\n" "post:\t0x%p\n\n", __FUNCTION__, &fn, fn, fn->pre, fn->pgm, fn->init, fn->err, fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata, fn->busy,
@@ -213,7 +213,7 @@ static int Spartan3_sp_load (Xilinx_desc (*fn->abort) (cookie); /* abort the burn */ return FPGA_FAIL; } - } while ((*fn->init) (cookie) && (*fn->busy) (cookie)); + } while ((*fn->init) (cookie) || (*fn->busy) (cookie)); (*fn->wr) (TRUE, TRUE, cookie); /* Assert write, commit */ (*fn->cs) (TRUE, TRUE, cookie); /* Assert chip select, commit */
PATCH 1/1 fix for "fpga load" on spartan3 in slave parallel mode
Quoted 3 lines · Bruce Adler
The while loop exits too soon if the "busy" function is a dummy function which always returns false.
But what if it isn't? Shouldn't the old behaviour be preserved, or is this another bug?
Should the dummy function always return true instead?
g.
Signature · 4 lines
Grant Likely, B.Sc., P.Eng. Secret Lab Technologies Ltd. grant.likely at secretlab.ca (403) 399-0195